1 /******************************************************************************
2  *
3  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4  * Analog Devices, Inc.),
5  * Copyright (C) 2023-2024 Analog Devices, Inc.
6  *
7  * Licensed under the Apache License, Version 2.0 (the "License");
8  * you may not use this file except in compliance with the License.
9  * You may obtain a copy of the License at
10  *
11  *     http://www.apache.org/licenses/LICENSE-2.0
12  *
13  * Unless required by applicable law or agreed to in writing, software
14  * distributed under the License is distributed on an "AS IS" BASIS,
15  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  * See the License for the specific language governing permissions and
17  * limitations under the License.
18  *
19  ******************************************************************************/
20 
21 /****** Includes *******/
22 #include <stddef.h>
23 #include <stdint.h>
24 #include "mxc_device.h"
25 #include "mxc_assert.h"
26 #include "mxc_lock.h"
27 #include "mxc_sys.h"
28 #include "spixr.h"
29 #include "spixr_reva.h"
30 
31 /****** Functions ******/
32 
MXC_SPIXR_RevA_ReadRXFIFO(mxc_spixr_reva_regs_t * spixr,uint8_t * buf,int len)33 int MXC_SPIXR_RevA_ReadRXFIFO(mxc_spixr_reva_regs_t *spixr, uint8_t *buf, int len)
34 {
35     int i;
36 
37     if (buf == NULL) {
38         return E_NULL_PTR;
39     }
40 
41     for (i = 0; i < len; i++) {
42         buf[i] = spixr->data8[0];
43     }
44 
45     return E_NO_ERROR;
46 }
47 
MXC_SPIXR_RevA_WriteTXFIFO(mxc_spixr_reva_regs_t * spixr,uint8_t * buf,int len)48 int MXC_SPIXR_RevA_WriteTXFIFO(mxc_spixr_reva_regs_t *spixr, uint8_t *buf, int len)
49 {
50     int i;
51 
52     if (buf == NULL) {
53         return E_NULL_PTR;
54     }
55 
56     for (i = 0; i < len; i++) {
57         spixr->data8[0] = buf[i];
58     }
59 
60     return E_NO_ERROR;
61 }
62 
MXC_SPIXR_RevA_SetSS(mxc_spixr_reva_regs_t * spixr,int ssIdx)63 void MXC_SPIXR_RevA_SetSS(mxc_spixr_reva_regs_t *spixr, int ssIdx)
64 {
65     MXC_SETFIELD(spixr->ctrl1, MXC_F_SPIXR_REVA_CTRL1_SS,
66                  ((1 << ssIdx) << MXC_F_SPIXR_REVA_CTRL1_SS_POS));
67 }
68 
MXC_SPIXR_RevA_GetSS(mxc_spixr_reva_regs_t * spixr)69 int MXC_SPIXR_RevA_GetSS(mxc_spixr_reva_regs_t *spixr)
70 {
71     return (spixr->ctrl1 & MXC_F_SPIXR_REVA_CTRL1_SS) >> MXC_F_SPIXR_REVA_CTRL1_SS_POS;
72 }
73 
MXC_SPIXR_RevA_SetSSCtrl(mxc_spixr_reva_regs_t * spixr,int stayActive)74 void MXC_SPIXR_RevA_SetSSCtrl(mxc_spixr_reva_regs_t *spixr, int stayActive)
75 {
76     MXC_SETFIELD(spixr->ctrl1, MXC_F_SPIXR_REVA_CTRL1_SS_CTRL,
77                  ((!!stayActive) << MXC_F_SPIXR_REVA_CTRL1_SS_CTRL_POS));
78 }
79 
MXC_SPIXR_RevA_GetSSCtrl(mxc_spixr_reva_regs_t * spixr)80 int MXC_SPIXR_RevA_GetSSCtrl(mxc_spixr_reva_regs_t *spixr)
81 {
82     return (spixr->ctrl1 & MXC_F_SPIXR_REVA_CTRL1_SS_CTRL) >> MXC_F_SPIXR_REVA_CTRL1_SS_CTRL_POS;
83 }
84 
MXC_SPIXR_RevA_Enable(mxc_spixr_reva_regs_t * spixr)85 void MXC_SPIXR_RevA_Enable(mxc_spixr_reva_regs_t *spixr)
86 {
87     spixr->ctrl1 |= MXC_F_SPIXR_REVA_CTRL1_SPIEN;
88     spixr->ctrl1 |= MXC_F_SPIXR_REVA_CTRL1_MMEN;
89 }
90 
MXC_SPIXR_RevA_Disable(mxc_spixr_reva_regs_t * spixr)91 void MXC_SPIXR_RevA_Disable(mxc_spixr_reva_regs_t *spixr)
92 {
93     while (MXC_SPIXR_Busy()) {}
94 
95     spixr->ctrl1 &= ~MXC_F_SPIXR_REVA_CTRL1_SPIEN;
96     spixr->ctrl1 &= ~(MXC_F_SPIXR_REVA_CTRL1_MMEN);
97 }
98 
MXC_SPIXR_RevA_IsEnabled(mxc_spixr_reva_regs_t * spixr)99 int MXC_SPIXR_RevA_IsEnabled(mxc_spixr_reva_regs_t *spixr)
100 {
101     return !!(spixr->ctrl1 & MXC_F_SPIXR_REVA_CTRL1_SPIEN);
102 }
103 
MXC_SPIXR_RevA_ThreeWireModeEnable(mxc_spixr_reva_regs_t * spixr)104 void MXC_SPIXR_RevA_ThreeWireModeEnable(mxc_spixr_reva_regs_t *spixr)
105 {
106     spixr->ctrl3 |= MXC_F_SPIXR_REVA_CTRL3_THREE_WIRE;
107 }
108 
MXC_SPIXR_RevA_ThreeWireModeDisable(mxc_spixr_reva_regs_t * spixr)109 void MXC_SPIXR_RevA_ThreeWireModeDisable(mxc_spixr_reva_regs_t *spixr)
110 {
111     while (MXC_SPIXR_Busy()) {}
112 
113     spixr->ctrl3 &= ~MXC_F_SPIXR_REVA_CTRL3_THREE_WIRE;
114 }
115 
MXC_SPIXR_RevA_ThreeWireModeIsEnabled(mxc_spixr_reva_regs_t * spixr)116 int MXC_SPIXR_RevA_ThreeWireModeIsEnabled(mxc_spixr_reva_regs_t *spixr)
117 {
118     return !!(spixr->ctrl3 & MXC_F_SPIXR_REVA_CTRL3_THREE_WIRE);
119 }
120 
MXC_SPIXR_RevA_GetTXFIFOCount(mxc_spixr_reva_regs_t * spixr)121 int MXC_SPIXR_RevA_GetTXFIFOCount(mxc_spixr_reva_regs_t *spixr)
122 {
123     return (spixr->dma & MXC_F_SPIXR_REVA_DMA_TX_FIFO_CNT) >> MXC_F_SPIXR_REVA_DMA_TX_FIFO_CNT_POS;
124 }
125 
MXC_SPIXR_RevA_GetRXFIFOCount(mxc_spixr_reva_regs_t * spixr)126 int MXC_SPIXR_RevA_GetRXFIFOCount(mxc_spixr_reva_regs_t *spixr)
127 {
128     return (spixr->dma & MXC_F_SPIXR_REVA_DMA_RX_FIFO_CNT) >> MXC_F_SPIXR_REVA_DMA_RX_FIFO_CNT_POS;
129 }
130 
MXC_SPIXR_RevA_SetWidth(mxc_spixr_reva_regs_t * spixr,mxc_spixr_reva_width_t width)131 int MXC_SPIXR_RevA_SetWidth(mxc_spixr_reva_regs_t *spixr, mxc_spixr_reva_width_t width)
132 {
133     if (width == MXC_SPIXR_REVA_INVALID) {
134         return E_BAD_PARAM;
135     }
136 
137     MXC_SETFIELD(spixr->ctrl3, MXC_F_SPIXR_REVA_CTRL3_DATA_WIDTH,
138                  (width << MXC_F_SPIXR_REVA_CTRL3_DATA_WIDTH_POS));
139 
140     return E_NO_ERROR;
141 }
142 
MXC_SPIXR_RevA_SetSPIMode(mxc_spixr_reva_regs_t * spixr,mxc_spixr_reva_mode_t mode)143 int MXC_SPIXR_RevA_SetSPIMode(mxc_spixr_reva_regs_t *spixr, mxc_spixr_reva_mode_t mode)
144 {
145     if (mode > MXC_SPIXR_REVA_MODE_3) {
146         return E_BAD_PARAM;
147     }
148 
149     if ((mode == MXC_SPIXR_REVA_MODE_0) || (mode == MXC_SPIXR_REVA_MODE_1)) {
150         MXC_SETFIELD(spixr->ctrl3, MXC_F_SPIXR_REVA_CTRL3_CPOL,
151                      (0 << MXC_F_SPIXR_REVA_CTRL3_CPOL_POS));
152 
153     } else {
154         MXC_SETFIELD(spixr->ctrl3, MXC_F_SPIXR_REVA_CTRL3_CPOL,
155                      (1 << MXC_F_SPIXR_REVA_CTRL3_CPOL_POS));
156     }
157 
158     if ((mode == MXC_SPIXR_REVA_MODE_0) || (mode == MXC_SPIXR_REVA_MODE_2)) {
159         MXC_SETFIELD(spixr->ctrl3, MXC_F_SPIXR_REVA_CTRL3_CPHA,
160                      (0 << MXC_F_SPIXR_REVA_CTRL3_CPHA_POS));
161 
162     } else {
163         MXC_SETFIELD(spixr->ctrl3, MXC_F_SPIXR_REVA_CTRL3_CPHA,
164                      (1 << MXC_F_SPIXR_REVA_CTRL3_CPHA_POS));
165     }
166 
167     return E_NO_ERROR;
168 }
169 
MXC_SPIXR_RevA_SetSSPolarity(mxc_spixr_reva_regs_t * spixr,int active)170 int MXC_SPIXR_RevA_SetSSPolarity(mxc_spixr_reva_regs_t *spixr, int active)
171 {
172     MXC_SETFIELD(spixr->ctrl3, MXC_F_SPIXR_REVA_CTRL3_SSPOL,
173                  (active << MXC_F_SPIXR_REVA_CTRL3_SSPOL_POS));
174     return E_NO_ERROR;
175 }
176 
MXC_SPIXR_RevA_SetSSTiming(mxc_spixr_reva_regs_t * spixr,unsigned int ssIActDelay,unsigned int postActive,unsigned int preActive)177 void MXC_SPIXR_RevA_SetSSTiming(mxc_spixr_reva_regs_t *spixr, unsigned int ssIActDelay,
178                                 unsigned int postActive, unsigned int preActive)
179 {
180     MXC_ASSERT(ssIActDelay < 0x100 && postActive < 0x100 && preActive < 0x100);
181     MXC_SETFIELD(spixr->ss_time, MXC_F_SPIXR_REVA_SS_TIME_SSACT1,
182                  (preActive << MXC_F_SPIXR_REVA_SS_TIME_SSACT1_POS));
183     MXC_SETFIELD(spixr->ss_time, MXC_F_SPIXR_REVA_SS_TIME_SSACT2,
184                  (postActive << MXC_F_SPIXR_REVA_SS_TIME_SSACT2_POS));
185     MXC_SETFIELD(spixr->ss_time, MXC_F_SPIXR_REVA_SS_TIME_SSINACT,
186                  (ssIActDelay << MXC_F_SPIXR_REVA_SS_TIME_SSINACT_POS));
187 }
188 
MXC_SPIXR_RevA_SetFrequency(mxc_spixr_reva_regs_t * spixr,int hz)189 int MXC_SPIXR_RevA_SetFrequency(mxc_spixr_reva_regs_t *spixr, int hz)
190 {
191     int freq_div, hi_clk, lo_clk, scale;
192 
193     // Check if frequency is too high
194     if (hz > (int)PeripheralClock) {
195         return E_BAD_PARAM;
196     }
197 
198     // Set the clock high and low
199     freq_div = PeripheralClock / (hz);
200     hi_clk = freq_div / 2;
201     lo_clk = freq_div / 2;
202     scale = 0;
203 
204     if (freq_div % 2) {
205         hi_clk += 1;
206     }
207 
208     while (hi_clk >= 16 && scale < 8) {
209         hi_clk /= 2;
210         lo_clk /= 2;
211         scale++;
212     }
213 
214     spixr->brg_ctrl = (lo_clk << MXC_F_SPIXR_REVA_BRG_CTRL_LOW_POS) |
215                       (hi_clk << MXC_F_SPIXR_REVA_BRG_CTRL_HI_POS) |
216                       (scale << MXC_F_SPIXR_REVA_BRG_CTRL_SCALE_POS);
217 
218     return MXC_SPIXR_GetFrequency();
219 }
220 
MXC_SPIXR_RevA_GetFrequency(mxc_spixr_reva_regs_t * spixr)221 int MXC_SPIXR_RevA_GetFrequency(mxc_spixr_reva_regs_t *spixr)
222 {
223     int spixr_periph_clock, scale, hi, lo;
224 
225     scale = ((spixr->brg_ctrl & MXC_F_SPIXR_REVA_BRG_CTRL_SCALE) >>
226              MXC_F_SPIXR_REVA_BRG_CTRL_SCALE_POS);
227     hi = ((spixr->brg_ctrl & MXC_F_SPIXR_REVA_BRG_CTRL_HI) >> MXC_F_SPIXR_REVA_BRG_CTRL_HI_POS);
228     lo = ((spixr->brg_ctrl & MXC_F_SPIXR_REVA_BRG_CTRL_LOW) >> MXC_F_SPIXR_REVA_BRG_CTRL_LOW_POS);
229 
230     spixr_periph_clock = PeripheralClock / (1 << scale);
231 
232     if (hi == 0) {
233         hi = 1;
234     }
235 
236     if (lo == 0) {
237         lo = 1;
238     }
239 
240     return spixr_periph_clock / (hi + lo);
241 }
242 
MXC_SPIXR_RevA_GetIntFlags(mxc_spixr_reva_regs_t * spixr)243 int MXC_SPIXR_RevA_GetIntFlags(mxc_spixr_reva_regs_t *spixr)
244 {
245     return spixr->int_fl;
246 }
247 
MXC_SPIXR_RevA_EnableInt(mxc_spixr_reva_regs_t * spixr,int flags)248 void MXC_SPIXR_RevA_EnableInt(mxc_spixr_reva_regs_t *spixr, int flags)
249 {
250     spixr->int_en |= flags;
251 }
252 
MXC_SPIXR_RevA_DisableInt(mxc_spixr_reva_regs_t * spixr,int flags)253 void MXC_SPIXR_RevA_DisableInt(mxc_spixr_reva_regs_t *spixr, int flags)
254 {
255     spixr->int_en &= ~flags;
256 }
257 
MXC_SPIXR_RevA_GetWakeUpFlags(mxc_spixr_reva_regs_t * spixr)258 int MXC_SPIXR_RevA_GetWakeUpFlags(mxc_spixr_reva_regs_t *spixr)
259 {
260     return spixr->wake_fl;
261 }
262 
MXC_SPIXR_RevA_EnableWakeUp(mxc_spixr_reva_regs_t * spixr,int flags)263 void MXC_SPIXR_RevA_EnableWakeUp(mxc_spixr_reva_regs_t *spixr, int flags)
264 {
265     spixr->wake_en |= flags;
266 }
267 
MXC_SPIXR_RevA_DisableWakeUp(mxc_spixr_reva_regs_t * spixr,int flags)268 void MXC_SPIXR_RevA_DisableWakeUp(mxc_spixr_reva_regs_t *spixr, int flags)
269 {
270     spixr->wake_en &= ~flags;
271 }
272 
MXC_SPIXR_RevA_ExMemEnable(mxc_spixr_reva_regs_t * spixr)273 void MXC_SPIXR_RevA_ExMemEnable(mxc_spixr_reva_regs_t *spixr)
274 {
275     MXC_SETFIELD(spixr->xmem_ctrl, MXC_F_SPIXR_REVA_XMEM_CTRL_XMEM_EN,
276                  ((unsigned)1 << MXC_F_SPIXR_REVA_XMEM_CTRL_XMEM_EN_POS));
277 }
278 
MXC_SPIXR_RevA_ExMemDisable(mxc_spixr_reva_regs_t * spixr)279 void MXC_SPIXR_RevA_ExMemDisable(mxc_spixr_reva_regs_t *spixr)
280 {
281     MXC_SETFIELD(spixr->xmem_ctrl, MXC_F_SPIXR_REVA_XMEM_CTRL_XMEM_EN,
282                  (0 << MXC_F_SPIXR_REVA_XMEM_CTRL_XMEM_EN_POS));
283 }
284 
MXC_SPIXR_RevA_ExMemUseDummy(mxc_spixr_reva_regs_t * spixr,int delay255)285 void MXC_SPIXR_RevA_ExMemUseDummy(mxc_spixr_reva_regs_t *spixr, int delay255)
286 {
287     MXC_SETFIELD(spixr->xmem_ctrl, MXC_F_SPIXR_REVA_XMEM_CTRL_DUMMY_CLK,
288                  (delay255 << MXC_F_SPIXR_REVA_XMEM_CTRL_DUMMY_CLK_POS));
289 }
290 
MXC_SPIXR_RevA_ExMemSetWriteCommand(mxc_spixr_reva_regs_t * spixr,uint8_t command)291 void MXC_SPIXR_RevA_ExMemSetWriteCommand(mxc_spixr_reva_regs_t *spixr, uint8_t command)
292 {
293     MXC_SETFIELD(spixr->xmem_ctrl, MXC_F_SPIXR_REVA_XMEM_CTRL_WR_CMD,
294                  (command << MXC_F_SPIXR_REVA_XMEM_CTRL_WR_CMD_POS));
295 }
296 
MXC_SPIXR_RevA_ExMemGetWriteCommand(mxc_spixr_reva_regs_t * spixr)297 uint8_t MXC_SPIXR_RevA_ExMemGetWriteCommand(mxc_spixr_reva_regs_t *spixr)
298 {
299     return ((spixr->xmem_ctrl & MXC_F_SPIXR_REVA_XMEM_CTRL_WR_CMD) >>
300             MXC_F_SPIXR_REVA_XMEM_CTRL_WR_CMD_POS);
301 }
302 
MXC_SPIXR_RevA_ExMemSetReadCommand(mxc_spixr_reva_regs_t * spixr,uint8_t command)303 void MXC_SPIXR_RevA_ExMemSetReadCommand(mxc_spixr_reva_regs_t *spixr, uint8_t command)
304 {
305     MXC_SETFIELD(spixr->xmem_ctrl, MXC_F_SPIXR_REVA_XMEM_CTRL_RD_CMD,
306                  (command << MXC_F_SPIXR_REVA_XMEM_CTRL_RD_CMD_POS));
307 }
308 
MXC_SPIXR_RevA_ExMemGetReadCommand(mxc_spixr_reva_regs_t * spixr)309 uint8_t MXC_SPIXR_RevA_ExMemGetReadCommand(mxc_spixr_reva_regs_t *spixr)
310 {
311     return ((spixr->xmem_ctrl & MXC_F_SPIXR_REVA_XMEM_CTRL_RD_CMD) >>
312             MXC_F_SPIXR_REVA_XMEM_CTRL_RD_CMD_POS);
313 }
314 
MXC_SPIXR_RevA_Busy(mxc_spixr_reva_regs_t * spixr)315 int MXC_SPIXR_RevA_Busy(mxc_spixr_reva_regs_t *spixr)
316 {
317     return (spixr->stat == MXC_F_SPIXR_REVA_STAT_BUSY);
318 }
319 
MXC_SPIXR_RevA_Init(mxc_spixr_reva_regs_t * spixr,mxc_spixr_reva_cfg_t * cfg)320 int MXC_SPIXR_RevA_Init(mxc_spixr_reva_regs_t *spixr, mxc_spixr_reva_cfg_t *cfg)
321 {
322     MXC_ASSERT(cfg);
323     MXC_SPIXR_Enable();
324     spixr->ctrl1 |= (1 << MXC_F_SPIXR_REVA_CTRL1_SS_POS);
325 
326     spixr->ctrl3 |= ((cfg->numbits) << MXC_F_SPIXR_REVA_CTRL3_NUMBITS_POS) |
327                     ((cfg->data_width) << MXC_F_SPIXR_REVA_CTRL3_DATA_WIDTH_POS);
328 
329     spixr->ss_time = ((cfg->ssel_act_1) << MXC_F_SPIXR_REVA_SS_TIME_SSACT1_POS) |
330                      ((cfg->ssel_act_2) << MXC_F_SPIXR_REVA_SS_TIME_SSACT2_POS) |
331                      ((cfg->ssel_inact) << MXC_F_SPIXR_REVA_SS_TIME_SSINACT_POS);
332 
333     MXC_SPIXR_SetFrequency(cfg->baud_freq);
334 
335     return E_NO_ERROR;
336 }
337 
MXC_SPIXR_RevA_Shutdown(mxc_spixr_reva_regs_t * spixr)338 int MXC_SPIXR_RevA_Shutdown(mxc_spixr_reva_regs_t *spixr)
339 {
340     return E_NO_ERROR;
341 }
342 
MXC_SPIXR_RevA_SendCommand(mxc_spixr_reva_regs_t * spixr,uint8_t * cmd,uint32_t length,uint32_t tx_num_char)343 void MXC_SPIXR_RevA_SendCommand(mxc_spixr_reva_regs_t *spixr, uint8_t *cmd, uint32_t length,
344                                 uint32_t tx_num_char)
345 {
346     uint32_t i;
347 
348     spixr->ctrl2 = ((tx_num_char) << MXC_F_SPIXR_REVA_CTRL2_TX_NUM_CHAR_POS) |
349                    (spixr->ctrl2 & MXC_F_SPIXR_REVA_CTRL2_RX_NUM_CHAR);
350 
351     while (MXC_SPIXR_Busy()) {}
352 
353     for (i = 0; i < length; i++) {
354         spixr->data8[0] = cmd[i];
355     }
356 
357     spixr->ctrl1 |= MXC_F_SPIXR_REVA_CTRL1_TX_START; /* Send command to RAM */
358 
359     while (!(spixr->dma & MXC_F_SPIXR_REVA_DMA_TX_FIFO_CNT)) {}
360     /* Wait for TXFIFO cnt to reach 0*/
361 }
362 
MXC_SPIXR_RevA_TXFIFOEnable(mxc_spixr_reva_regs_t * spixr)363 void MXC_SPIXR_RevA_TXFIFOEnable(mxc_spixr_reva_regs_t *spixr)
364 {
365     spixr->dma |= MXC_F_SPIXR_REVA_DMA_TX_FIFO_EN;
366 }
367 
MXC_SPIXR_RevA_TXFIFODisable(mxc_spixr_reva_regs_t * spixr)368 void MXC_SPIXR_RevA_TXFIFODisable(mxc_spixr_reva_regs_t *spixr)
369 {
370     spixr->dma &= ~(MXC_F_SPIXR_REVA_DMA_TX_FIFO_EN);
371 }
372 
MXC_SPIXR_RevA_TXFIFOIsEnabled(mxc_spixr_reva_regs_t * spixr)373 int MXC_SPIXR_RevA_TXFIFOIsEnabled(mxc_spixr_reva_regs_t *spixr)
374 {
375     return !!(spixr->dma & MXC_F_SPIXR_REVA_DMA_TX_FIFO_EN);
376 }
377 
MXC_SPIXR_RevA_DmaTXFIFOEnable(mxc_spixr_reva_regs_t * spixr)378 void MXC_SPIXR_RevA_DmaTXFIFOEnable(mxc_spixr_reva_regs_t *spixr)
379 {
380     spixr->dma |= MXC_F_SPIXR_REVA_DMA_TX_DMA_EN;
381 }
382 
MXC_SPIXR_RevA_DmaTXFIFODisable(mxc_spixr_reva_regs_t * spixr)383 void MXC_SPIXR_RevA_DmaTXFIFODisable(mxc_spixr_reva_regs_t *spixr)
384 {
385     spixr->dma &= ~(MXC_F_SPIXR_REVA_DMA_TX_DMA_EN);
386 }
387 
MXC_SPIXR_RevA_DmaTXFIFOIsEnabled(mxc_spixr_reva_regs_t * spixr)388 int MXC_SPIXR_RevA_DmaTXFIFOIsEnabled(mxc_spixr_reva_regs_t *spixr)
389 {
390     return !!(spixr->dma & MXC_F_SPIXR_REVA_DMA_TX_DMA_EN);
391 }
392 
MXC_SPIXR_RevA_RXFIFOEnable(mxc_spixr_reva_regs_t * spixr)393 void MXC_SPIXR_RevA_RXFIFOEnable(mxc_spixr_reva_regs_t *spixr)
394 {
395     spixr->dma |= MXC_F_SPIXR_REVA_DMA_RX_FIFO_EN;
396 }
397 
MXC_SPIXR_RevA_RXFIFODisable(mxc_spixr_reva_regs_t * spixr)398 void MXC_SPIXR_RevA_RXFIFODisable(mxc_spixr_reva_regs_t *spixr)
399 {
400     spixr->dma &= ~(MXC_F_SPIXR_REVA_DMA_RX_FIFO_EN);
401 }
402 
MXC_SPIXR_RevA_RXFIFOIsEnabled(mxc_spixr_reva_regs_t * spixr)403 int MXC_SPIXR_RevA_RXFIFOIsEnabled(mxc_spixr_reva_regs_t *spixr)
404 {
405     return !!(spixr->dma & MXC_F_SPIXR_REVA_DMA_RX_FIFO_EN);
406 }
407 
MXC_SPIXR_RevA_DmaRXFIFOEnable(mxc_spixr_reva_regs_t * spixr)408 void MXC_SPIXR_RevA_DmaRXFIFOEnable(mxc_spixr_reva_regs_t *spixr)
409 {
410     spixr->dma |= MXC_F_SPIXR_REVA_DMA_RX_DMA_EN;
411 }
412 
MXC_SPIXR_RevA_DmaRXFIFODisable(mxc_spixr_reva_regs_t * spixr)413 void MXC_SPIXR_RevA_DmaRXFIFODisable(mxc_spixr_reva_regs_t *spixr)
414 {
415     spixr->dma &= ~(MXC_F_SPIXR_REVA_DMA_RX_DMA_EN);
416 }
417 
MXC_SPIXR_RevA_DmaRXFIFOIsEnabled(mxc_spixr_reva_regs_t * spixr)418 int MXC_SPIXR_RevA_DmaRXFIFOIsEnabled(mxc_spixr_reva_regs_t *spixr)
419 {
420     return !!(spixr->dma & MXC_F_SPIXR_REVA_DMA_RX_DMA_EN);
421 }
422 
MXC_SPIXR_RevA_TXFIFOClear(mxc_spixr_reva_regs_t * spixr)423 void MXC_SPIXR_RevA_TXFIFOClear(mxc_spixr_reva_regs_t *spixr)
424 {
425     spixr->dma |= MXC_F_SPIXR_REVA_DMA_TX_FIFO_CLEAR;
426 }
427 
MXC_SPIXR_RevA_RXFIFOClear(mxc_spixr_reva_regs_t * spixr)428 void MXC_SPIXR_RevA_RXFIFOClear(mxc_spixr_reva_regs_t *spixr)
429 {
430     spixr->dma |= MXC_F_SPIXR_REVA_DMA_RX_FIFO_CLEAR;
431 }
432