1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20 #include <string.h>
21 #include <stdio.h>
22 #include "mxc_device.h"
23 #include "mxc_assert.h"
24 #include "mxc_sys.h"
25 #include "simo.h"
26 #include "simo_reva.h"
27
MXC_SIMO_RevA_SetVregO_A(mxc_simo_reva_regs_t * simo,uint32_t voltage)28 void MXC_SIMO_RevA_SetVregO_A(mxc_simo_reva_regs_t *simo, uint32_t voltage)
29 {
30 uint32_t base_voltage = 0;
31 if (simo->vrego_a & MXC_F_SIMO_REVA_VREGO_A_RANGEA) {
32 base_voltage = VREGO_HIGH_RANGE_BASE;
33 } else {
34 base_voltage = VREGO_LOW_RANGE_BASE;
35 }
36
37 uint32_t setpoint = (voltage - base_voltage) / 10;
38 uint32_t value = (simo->vrego_a & ~MXC_F_SIMO_REVA_VREGO_A_VSETA) |
39 (setpoint & MXC_F_SIMO_REVA_VREGO_A_VSETA);
40
41 // Write the SIMO Registers twice due to clock glitch
42 simo->vrego_a = value;
43 simo->vrego_a = value;
44 }
45
MXC_SIMO_RevA_SetVregO_B(mxc_simo_reva_regs_t * simo,uint32_t voltage)46 void MXC_SIMO_RevA_SetVregO_B(mxc_simo_reva_regs_t *simo, uint32_t voltage)
47 {
48 uint32_t base_voltage = 0;
49 if (simo->vrego_b & MXC_F_SIMO_REVA_VREGO_B_RANGEB) {
50 base_voltage = VREGO_HIGH_RANGE_BASE;
51 } else {
52 base_voltage = VREGO_LOW_RANGE_BASE;
53 }
54
55 uint32_t setpoint = (voltage - base_voltage) / 10;
56 uint32_t value = (simo->vrego_b & ~MXC_F_SIMO_REVA_VREGO_B_VSETB) |
57 (setpoint & MXC_F_SIMO_REVA_VREGO_B_VSETB);
58
59 // Write the SIMO Registers twice due to clock glitch
60 simo->vrego_b = value;
61 simo->vrego_b = value;
62 }
63
MXC_SIMO_RevA_SetVregO_C(mxc_simo_reva_regs_t * simo,uint32_t voltage)64 void MXC_SIMO_RevA_SetVregO_C(mxc_simo_reva_regs_t *simo, uint32_t voltage)
65 {
66 uint32_t base_voltage = 0;
67 if (simo->vrego_c & MXC_F_SIMO_REVA_VREGO_C_RANGEC) {
68 base_voltage = VREGO_HIGH_RANGE_BASE;
69 } else {
70 base_voltage = VREGO_LOW_RANGE_BASE;
71 }
72
73 uint32_t setpoint = (voltage - base_voltage) / 10;
74 uint32_t value = (simo->vrego_c & ~MXC_F_SIMO_REVA_VREGO_C_VSETC) |
75 (setpoint & MXC_F_SIMO_REVA_VREGO_C_VSETC);
76
77 // Write the SIMO Registers twice due to clock glitch
78 simo->vrego_c = value;
79 simo->vrego_c = value;
80 }
81
MXC_SIMO_RevA_SetVregO_D(mxc_simo_reva_regs_t * simo,uint32_t voltage)82 void MXC_SIMO_RevA_SetVregO_D(mxc_simo_reva_regs_t *simo, uint32_t voltage)
83 {
84 uint32_t base_voltage = 0;
85 if (simo->vrego_d & MXC_F_SIMO_REVA_VREGO_D_RANGED) {
86 base_voltage = VREGO_HIGH_RANGE_BASE;
87 } else {
88 base_voltage = VREGO_LOW_RANGE_BASE;
89 }
90
91 uint32_t setpoint = (voltage - base_voltage) / 10;
92 uint32_t value = (simo->vrego_d & ~MXC_F_SIMO_REVA_VREGO_D_VSETD) |
93 (setpoint & MXC_F_SIMO_REVA_VREGO_D_VSETD);
94
95 // Write the SIMO Registers twice due to clock glitch
96 simo->vrego_d = value;
97 simo->vrego_d = value;
98 }
99
MXC_SIMO_RevA_GetOutReadyA(mxc_simo_reva_regs_t * simo)100 uint32_t MXC_SIMO_RevA_GetOutReadyA(mxc_simo_reva_regs_t *simo)
101 {
102 return (simo->buck_out_ready & MXC_F_SIMO_REVA_BUCK_OUT_READY_BUCKOUTRDYA) ? E_NO_ERROR :
103 E_BAD_STATE;
104 }
105
MXC_SIMO_RevA_GetOutReadyB(mxc_simo_reva_regs_t * simo)106 uint32_t MXC_SIMO_RevA_GetOutReadyB(mxc_simo_reva_regs_t *simo)
107 {
108 return (simo->buck_out_ready & MXC_F_SIMO_REVA_BUCK_OUT_READY_BUCKOUTRDYB) ? E_NO_ERROR :
109 E_BAD_STATE;
110 }
111
MXC_SIMO_RevA_GetOutReadyC(mxc_simo_reva_regs_t * simo)112 uint32_t MXC_SIMO_RevA_GetOutReadyC(mxc_simo_reva_regs_t *simo)
113 {
114 return (simo->buck_out_ready & MXC_F_SIMO_REVA_BUCK_OUT_READY_BUCKOUTRDYC) ? E_NO_ERROR :
115 E_BAD_STATE;
116 }
117
MXC_SIMO_RevA_GetOutReadyD(mxc_simo_reva_regs_t * simo)118 uint32_t MXC_SIMO_RevA_GetOutReadyD(mxc_simo_reva_regs_t *simo)
119 {
120 return (simo->buck_out_ready & MXC_F_SIMO_REVA_BUCK_OUT_READY_BUCKOUTRDYD) ? E_NO_ERROR :
121 E_BAD_STATE;
122 }
123
