1 /** 2 * @file wdt_revb_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the WDT_REVB Peripheral Module. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 #ifndef _WDT_REVB_REGS_H_ 27 #define _WDT_REVB_REGS_H_ 28 29 /* **** Includes **** */ 30 #include <stdint.h> 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 #if defined (__ICCARM__) 37 #pragma system_include 38 #endif 39 40 #if defined (__CC_ARM) 41 #pragma anon_unions 42 #endif 43 /// @cond 44 /* 45 If types are not defined elsewhere (CMSIS) define them here 46 */ 47 #ifndef __IO 48 #define __IO volatile 49 #endif 50 #ifndef __I 51 #define __I volatile const 52 #endif 53 #ifndef __O 54 #define __O volatile 55 #endif 56 #ifndef __R 57 #define __R volatile const 58 #endif 59 /// @endcond 60 61 /* **** Definitions **** */ 62 63 /** 64 * @ingroup wdt_revb 65 * @defgroup wdt_revb_registers WDT_REVB_Registers 66 * @brief Registers, Bit Masks and Bit Positions for the WDT_REVB Peripheral Module. 67 * @details Windowed Watchdog Timer 68 */ 69 70 /** 71 * @ingroup wdt_revb_registers 72 * Structure type to access the WDT_REVB Registers. 73 */ 74 typedef struct { 75 __IO uint32_t ctrl; /**< <tt>\b 0x00:</tt> WDT_REVB CTRL Register */ 76 __O uint32_t rst; /**< <tt>\b 0x04:</tt> WDT_REVB RST Register */ 77 __IO uint32_t clksel; /**< <tt>\b 0x08:</tt> WDT_REVB CLKSEL Register */ 78 __I uint32_t cnt; /**< <tt>\b 0x0C:</tt> WDT_REVB CNT Register */ 79 } mxc_wdt_revb_regs_t; 80 81 /* Register offsets for module WDT_REVB */ 82 /** 83 * @ingroup wdt_revb_registers 84 * @defgroup WDT_REVB_Register_Offsets Register Offsets 85 * @brief WDT_REVB Peripheral Register Offsets from the WDT_REVB Base Peripheral Address. 86 * @{ 87 */ 88 #define MXC_R_WDT_REVB_CTRL ((uint32_t)0x00000000UL) /**< Offset from WDT_REVB Base Address: <tt> 0x0000</tt> */ 89 #define MXC_R_WDT_REVB_RST ((uint32_t)0x00000004UL) /**< Offset from WDT_REVB Base Address: <tt> 0x0004</tt> */ 90 #define MXC_R_WDT_REVB_CLKSEL ((uint32_t)0x00000008UL) /**< Offset from WDT_REVB Base Address: <tt> 0x0008</tt> */ 91 #define MXC_R_WDT_REVB_CNT ((uint32_t)0x0000000CUL) /**< Offset from WDT_REVB Base Address: <tt> 0x000C</tt> */ 92 /**@} end of group wdt_revb_registers */ 93 94 /** 95 * @ingroup wdt_revb_registers 96 * @defgroup WDT_REVB_CTRL WDT_REVB_CTRL 97 * @brief Watchdog Timer Control Register. 98 * @{ 99 */ 100 #define MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS 0 /**< CTRL_INT_LATE_VAL Position */ 101 #define MXC_F_WDT_REVB_CTRL_INT_LATE_VAL ((uint32_t)(0xFUL << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS)) /**< CTRL_INT_LATE_VAL Mask */ 102 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW31 ((uint32_t)0x0UL) /**< CTRL_INT_LATE_VAL_WDT2POW31 Value */ 103 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW31 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW31 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW31 Setting */ 104 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW30 ((uint32_t)0x1UL) /**< CTRL_INT_LATE_VAL_WDT2POW30 Value */ 105 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW30 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW30 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW30 Setting */ 106 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW29 ((uint32_t)0x2UL) /**< CTRL_INT_LATE_VAL_WDT2POW29 Value */ 107 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW29 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW29 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW29 Setting */ 108 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW28 ((uint32_t)0x3UL) /**< CTRL_INT_LATE_VAL_WDT2POW28 Value */ 109 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW28 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW28 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW28 Setting */ 110 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW27 ((uint32_t)0x4UL) /**< CTRL_INT_LATE_VAL_WDT2POW27 Value */ 111 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW27 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW27 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW27 Setting */ 112 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW26 ((uint32_t)0x5UL) /**< CTRL_INT_LATE_VAL_WDT2POW26 Value */ 113 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW26 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW26 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW26 Setting */ 114 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW25 ((uint32_t)0x6UL) /**< CTRL_INT_LATE_VAL_WDT2POW25 Value */ 115 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW25 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW25 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW25 Setting */ 116 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW24 ((uint32_t)0x7UL) /**< CTRL_INT_LATE_VAL_WDT2POW24 Value */ 117 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW24 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW24 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW24 Setting */ 118 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW23 ((uint32_t)0x8UL) /**< CTRL_INT_LATE_VAL_WDT2POW23 Value */ 119 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW23 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW23 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW23 Setting */ 120 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW22 ((uint32_t)0x9UL) /**< CTRL_INT_LATE_VAL_WDT2POW22 Value */ 121 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW22 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW22 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW22 Setting */ 122 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW21 ((uint32_t)0xAUL) /**< CTRL_INT_LATE_VAL_WDT2POW21 Value */ 123 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW21 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW21 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW21 Setting */ 124 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW20 ((uint32_t)0xBUL) /**< CTRL_INT_LATE_VAL_WDT2POW20 Value */ 125 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW20 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW20 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW20 Setting */ 126 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW19 ((uint32_t)0xCUL) /**< CTRL_INT_LATE_VAL_WDT2POW19 Value */ 127 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW19 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW19 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW19 Setting */ 128 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW18 ((uint32_t)0xDUL) /**< CTRL_INT_LATE_VAL_WDT2POW18 Value */ 129 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW18 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW18 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW18 Setting */ 130 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW17 ((uint32_t)0xEUL) /**< CTRL_INT_LATE_VAL_WDT2POW17 Value */ 131 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW17 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW17 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW17 Setting */ 132 #define MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW16 ((uint32_t)0xFUL) /**< CTRL_INT_LATE_VAL_WDT2POW16 Value */ 133 #define MXC_S_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW16 (MXC_V_WDT_REVB_CTRL_INT_LATE_VAL_WDT2POW16 << MXC_F_WDT_REVB_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW16 Setting */ 134 135 #define MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS 4 /**< CTRL_RST_LATE_VAL Position */ 136 #define MXC_F_WDT_REVB_CTRL_RST_LATE_VAL ((uint32_t)(0xFUL << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS)) /**< CTRL_RST_LATE_VAL Mask */ 137 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW31 ((uint32_t)0x0UL) /**< CTRL_RST_LATE_VAL_WDT2POW31 Value */ 138 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW31 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW31 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW31 Setting */ 139 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW30 ((uint32_t)0x1UL) /**< CTRL_RST_LATE_VAL_WDT2POW30 Value */ 140 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW30 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW30 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW30 Setting */ 141 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW29 ((uint32_t)0x2UL) /**< CTRL_RST_LATE_VAL_WDT2POW29 Value */ 142 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW29 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW29 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW29 Setting */ 143 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW28 ((uint32_t)0x3UL) /**< CTRL_RST_LATE_VAL_WDT2POW28 Value */ 144 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW28 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW28 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW28 Setting */ 145 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW27 ((uint32_t)0x4UL) /**< CTRL_RST_LATE_VAL_WDT2POW27 Value */ 146 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW27 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW27 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW27 Setting */ 147 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW26 ((uint32_t)0x5UL) /**< CTRL_RST_LATE_VAL_WDT2POW26 Value */ 148 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW26 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW26 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW26 Setting */ 149 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW25 ((uint32_t)0x6UL) /**< CTRL_RST_LATE_VAL_WDT2POW25 Value */ 150 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW25 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW25 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW25 Setting */ 151 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW24 ((uint32_t)0x7UL) /**< CTRL_RST_LATE_VAL_WDT2POW24 Value */ 152 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW24 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW24 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW24 Setting */ 153 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW23 ((uint32_t)0x8UL) /**< CTRL_RST_LATE_VAL_WDT2POW23 Value */ 154 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW23 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW23 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW23 Setting */ 155 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW22 ((uint32_t)0x9UL) /**< CTRL_RST_LATE_VAL_WDT2POW22 Value */ 156 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW22 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW22 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW22 Setting */ 157 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW21 ((uint32_t)0xAUL) /**< CTRL_RST_LATE_VAL_WDT2POW21 Value */ 158 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW21 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW21 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW21 Setting */ 159 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW20 ((uint32_t)0xBUL) /**< CTRL_RST_LATE_VAL_WDT2POW20 Value */ 160 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW20 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW20 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW20 Setting */ 161 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW19 ((uint32_t)0xCUL) /**< CTRL_RST_LATE_VAL_WDT2POW19 Value */ 162 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW19 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW19 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW19 Setting */ 163 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW18 ((uint32_t)0xDUL) /**< CTRL_RST_LATE_VAL_WDT2POW18 Value */ 164 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW18 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW18 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW18 Setting */ 165 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW17 ((uint32_t)0xEUL) /**< CTRL_RST_LATE_VAL_WDT2POW17 Value */ 166 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW17 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW17 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW17 Setting */ 167 #define MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW16 ((uint32_t)0xFUL) /**< CTRL_RST_LATE_VAL_WDT2POW16 Value */ 168 #define MXC_S_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW16 (MXC_V_WDT_REVB_CTRL_RST_LATE_VAL_WDT2POW16 << MXC_F_WDT_REVB_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW16 Setting */ 169 170 #define MXC_F_WDT_REVB_CTRL_EN_POS 8 /**< CTRL_EN Position */ 171 #define MXC_F_WDT_REVB_CTRL_EN ((uint32_t)(0x1UL << MXC_F_WDT_REVB_CTRL_EN_POS)) /**< CTRL_EN Mask */ 172 173 #define MXC_F_WDT_REVB_CTRL_INT_LATE_POS 9 /**< CTRL_INT_LATE Position */ 174 #define MXC_F_WDT_REVB_CTRL_INT_LATE ((uint32_t)(0x1UL << MXC_F_WDT_REVB_CTRL_INT_LATE_POS)) /**< CTRL_INT_LATE Mask */ 175 176 #define MXC_F_WDT_REVB_CTRL_WDT_INT_EN_POS 10 /**< CTRL_WDT_INT_EN Position */ 177 #define MXC_F_WDT_REVB_CTRL_WDT_INT_EN ((uint32_t)(0x1UL << MXC_F_WDT_REVB_CTRL_WDT_INT_EN_POS)) /**< CTRL_WDT_INT_EN Mask */ 178 179 #define MXC_F_WDT_REVB_CTRL_WDT_RST_EN_POS 11 /**< CTRL_WDT_RST_EN Position */ 180 #define MXC_F_WDT_REVB_CTRL_WDT_RST_EN ((uint32_t)(0x1UL << MXC_F_WDT_REVB_CTRL_WDT_RST_EN_POS)) /**< CTRL_WDT_RST_EN Mask */ 181 182 #define MXC_F_WDT_REVB_CTRL_INT_EARLY_POS 12 /**< CTRL_INT_EARLY Position */ 183 #define MXC_F_WDT_REVB_CTRL_INT_EARLY ((uint32_t)(0x1UL << MXC_F_WDT_REVB_CTRL_INT_EARLY_POS)) /**< CTRL_INT_EARLY Mask */ 184 185 #define MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS 16 /**< CTRL_INT_EARLY_VAL Position */ 186 #define MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL ((uint32_t)(0xFUL << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS)) /**< CTRL_INT_EARLY_VAL Mask */ 187 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW31 ((uint32_t)0x0UL) /**< CTRL_INT_EARLY_VAL_WDT2POW31 Value */ 188 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW31 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW31 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW31 Setting */ 189 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW30 ((uint32_t)0x1UL) /**< CTRL_INT_EARLY_VAL_WDT2POW30 Value */ 190 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW30 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW30 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW30 Setting */ 191 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW29 ((uint32_t)0x2UL) /**< CTRL_INT_EARLY_VAL_WDT2POW29 Value */ 192 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW29 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW29 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW29 Setting */ 193 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW28 ((uint32_t)0x3UL) /**< CTRL_INT_EARLY_VAL_WDT2POW28 Value */ 194 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW28 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW28 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW28 Setting */ 195 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW27 ((uint32_t)0x4UL) /**< CTRL_INT_EARLY_VAL_WDT2POW27 Value */ 196 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW27 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW27 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW27 Setting */ 197 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW26 ((uint32_t)0x5UL) /**< CTRL_INT_EARLY_VAL_WDT2POW26 Value */ 198 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW26 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW26 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW26 Setting */ 199 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW25 ((uint32_t)0x6UL) /**< CTRL_INT_EARLY_VAL_WDT2POW25 Value */ 200 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW25 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW25 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW25 Setting */ 201 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW24 ((uint32_t)0x7UL) /**< CTRL_INT_EARLY_VAL_WDT2POW24 Value */ 202 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW24 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW24 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW24 Setting */ 203 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW23 ((uint32_t)0x8UL) /**< CTRL_INT_EARLY_VAL_WDT2POW23 Value */ 204 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW23 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW23 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW23 Setting */ 205 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW22 ((uint32_t)0x9UL) /**< CTRL_INT_EARLY_VAL_WDT2POW22 Value */ 206 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW22 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW22 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW22 Setting */ 207 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW21 ((uint32_t)0xAUL) /**< CTRL_INT_EARLY_VAL_WDT2POW21 Value */ 208 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW21 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW21 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW21 Setting */ 209 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW20 ((uint32_t)0xBUL) /**< CTRL_INT_EARLY_VAL_WDT2POW20 Value */ 210 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW20 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW20 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW20 Setting */ 211 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW19 ((uint32_t)0xCUL) /**< CTRL_INT_EARLY_VAL_WDT2POW19 Value */ 212 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW19 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW19 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW19 Setting */ 213 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW18 ((uint32_t)0xDUL) /**< CTRL_INT_EARLY_VAL_WDT2POW18 Value */ 214 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW18 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW18 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW18 Setting */ 215 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW17 ((uint32_t)0xEUL) /**< CTRL_INT_EARLY_VAL_WDT2POW17 Value */ 216 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW17 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW17 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW17 Setting */ 217 #define MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW16 ((uint32_t)0xFUL) /**< CTRL_INT_EARLY_VAL_WDT2POW16 Value */ 218 #define MXC_S_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW16 (MXC_V_WDT_REVB_CTRL_INT_EARLY_VAL_WDT2POW16 << MXC_F_WDT_REVB_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW16 Setting */ 219 220 #define MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS 20 /**< CTRL_RST_EARLY_VAL Position */ 221 #define MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL ((uint32_t)(0xFUL << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS)) /**< CTRL_RST_EARLY_VAL Mask */ 222 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW31 ((uint32_t)0x0UL) /**< CTRL_RST_EARLY_VAL_WDT2POW31 Value */ 223 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW31 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW31 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW31 Setting */ 224 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW30 ((uint32_t)0x1UL) /**< CTRL_RST_EARLY_VAL_WDT2POW30 Value */ 225 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW30 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW30 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW30 Setting */ 226 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW29 ((uint32_t)0x2UL) /**< CTRL_RST_EARLY_VAL_WDT2POW29 Value */ 227 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW29 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW29 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW29 Setting */ 228 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW28 ((uint32_t)0x3UL) /**< CTRL_RST_EARLY_VAL_WDT2POW28 Value */ 229 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW28 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW28 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW28 Setting */ 230 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW27 ((uint32_t)0x4UL) /**< CTRL_RST_EARLY_VAL_WDT2POW27 Value */ 231 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW27 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW27 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW27 Setting */ 232 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW26 ((uint32_t)0x5UL) /**< CTRL_RST_EARLY_VAL_WDT2POW26 Value */ 233 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW26 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW26 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW26 Setting */ 234 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW25 ((uint32_t)0x6UL) /**< CTRL_RST_EARLY_VAL_WDT2POW25 Value */ 235 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW25 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW25 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW25 Setting */ 236 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW24 ((uint32_t)0x7UL) /**< CTRL_RST_EARLY_VAL_WDT2POW24 Value */ 237 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW24 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW24 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW24 Setting */ 238 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW23 ((uint32_t)0x8UL) /**< CTRL_RST_EARLY_VAL_WDT2POW23 Value */ 239 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW23 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW23 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW23 Setting */ 240 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW22 ((uint32_t)0x9UL) /**< CTRL_RST_EARLY_VAL_WDT2POW22 Value */ 241 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW22 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW22 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW22 Setting */ 242 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW21 ((uint32_t)0xAUL) /**< CTRL_RST_EARLY_VAL_WDT2POW21 Value */ 243 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW21 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW21 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW21 Setting */ 244 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW20 ((uint32_t)0xBUL) /**< CTRL_RST_EARLY_VAL_WDT2POW20 Value */ 245 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW20 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW20 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW20 Setting */ 246 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW19 ((uint32_t)0xCUL) /**< CTRL_RST_EARLY_VAL_WDT2POW19 Value */ 247 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW19 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW19 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW19 Setting */ 248 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW18 ((uint32_t)0xDUL) /**< CTRL_RST_EARLY_VAL_WDT2POW18 Value */ 249 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW18 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW18 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW18 Setting */ 250 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW17 ((uint32_t)0xEUL) /**< CTRL_RST_EARLY_VAL_WDT2POW17 Value */ 251 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW17 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW17 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW17 Setting */ 252 #define MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW16 ((uint32_t)0xFUL) /**< CTRL_RST_EARLY_VAL_WDT2POW16 Value */ 253 #define MXC_S_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW16 (MXC_V_WDT_REVB_CTRL_RST_EARLY_VAL_WDT2POW16 << MXC_F_WDT_REVB_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW16 Setting */ 254 255 #define MXC_F_WDT_REVB_CTRL_CLKRDY_IE_POS 27 /**< CTRL_CLKRDY_IE Position */ 256 #define MXC_F_WDT_REVB_CTRL_CLKRDY_IE ((uint32_t)(0x1UL << MXC_F_WDT_REVB_CTRL_CLKRDY_IE_POS)) /**< CTRL_CLKRDY_IE Mask */ 257 258 #define MXC_F_WDT_REVB_CTRL_CLKRDY_POS 28 /**< CTRL_CLKRDY Position */ 259 #define MXC_F_WDT_REVB_CTRL_CLKRDY ((uint32_t)(0x1UL << MXC_F_WDT_REVB_CTRL_CLKRDY_POS)) /**< CTRL_CLKRDY Mask */ 260 261 #define MXC_F_WDT_REVB_CTRL_WIN_EN_POS 29 /**< CTRL_WIN_EN Position */ 262 #define MXC_F_WDT_REVB_CTRL_WIN_EN ((uint32_t)(0x1UL << MXC_F_WDT_REVB_CTRL_WIN_EN_POS)) /**< CTRL_WIN_EN Mask */ 263 264 #define MXC_F_WDT_REVB_CTRL_RST_EARLY_POS 30 /**< CTRL_RST_EARLY Position */ 265 #define MXC_F_WDT_REVB_CTRL_RST_EARLY ((uint32_t)(0x1UL << MXC_F_WDT_REVB_CTRL_RST_EARLY_POS)) /**< CTRL_RST_EARLY Mask */ 266 267 #define MXC_F_WDT_REVB_CTRL_RST_LATE_POS 31 /**< CTRL_RST_LATE Position */ 268 #define MXC_F_WDT_REVB_CTRL_RST_LATE ((uint32_t)(0x1UL << MXC_F_WDT_REVB_CTRL_RST_LATE_POS)) /**< CTRL_RST_LATE Mask */ 269 270 /**@} end of group WDT_REVB_CTRL_Register */ 271 272 /** 273 * @ingroup wdt_revb_registers 274 * @defgroup WDT_REVB_RST WDT_REVB_RST 275 * @brief Windowed Watchdog Timer Reset Register. 276 * @{ 277 */ 278 #define MXC_F_WDT_REVB_RST_RESET_POS 0 /**< RST_RESET Position */ 279 #define MXC_F_WDT_REVB_RST_RESET ((uint32_t)(0xFFUL << MXC_F_WDT_REVB_RST_RESET_POS)) /**< RST_RESET Mask */ 280 #define MXC_V_WDT_REVB_RST_RESET_SEQ0 ((uint32_t)0xA5UL) /**< RST_RESET_SEQ0 Value */ 281 #define MXC_S_WDT_REVB_RST_RESET_SEQ0 (MXC_V_WDT_REVB_RST_RESET_SEQ0 << MXC_F_WDT_REVB_RST_RESET_POS) /**< RST_RESET_SEQ0 Setting */ 282 #define MXC_V_WDT_REVB_RST_RESET_SEQ1 ((uint32_t)0x5AUL) /**< RST_RESET_SEQ1 Value */ 283 #define MXC_S_WDT_REVB_RST_RESET_SEQ1 (MXC_V_WDT_REVB_RST_RESET_SEQ1 << MXC_F_WDT_REVB_RST_RESET_POS) /**< RST_RESET_SEQ1 Setting */ 284 285 /**@} end of group WDT_REVB_RST_Register */ 286 287 /** 288 * @ingroup wdt_revb_registers 289 * @defgroup WDT_REVB_CLKSEL WDT_REVB_CLKSEL 290 * @brief Windowed Watchdog Timer Clock Select Register. 291 * @{ 292 */ 293 #define MXC_F_WDT_REVB_CLKSEL_SOURCE_POS 0 /**< CLKSEL_SOURCE Position */ 294 #define MXC_F_WDT_REVB_CLKSEL_SOURCE ((uint32_t)(0x7UL << MXC_F_WDT_REVB_CLKSEL_SOURCE_POS)) /**< CLKSEL_SOURCE Mask */ 295 296 /**@} end of group WDT_REVB_CLKSEL_Register */ 297 298 /** 299 * @ingroup wdt_revb_registers 300 * @defgroup WDT_REVB_CNT WDT_REVB_CNT 301 * @brief Windowed Watchdog Timer Count Register. 302 * @{ 303 */ 304 #define MXC_F_WDT_REVB_CNT_COUNT_POS 0 /**< CNT_COUNT Position */ 305 #define MXC_F_WDT_REVB_CNT_COUNT ((uint32_t)(0xFFFFFFFFUL << MXC_F_WDT_REVB_CNT_COUNT_POS)) /**< CNT_COUNT Mask */ 306 307 /**@} end of group WDT_REVB_CNT_Register */ 308 309 #ifdef __cplusplus 310 } 311 #endif 312 313 #endif /* _WDT_REVB_REGS_H_ */ 314
