1 /**
2  * @file    crc_reva_regs.h
3  * @brief   Registers, Bit Masks and Bit Positions for the CRC_REVA Peripheral Module.
4  */
5 
6 /******************************************************************************
7  *
8  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
9  * Analog Devices, Inc.),
10  * Copyright (C) 2023-2024 Analog Devices, Inc.
11  *
12  * Licensed under the Apache License, Version 2.0 (the "License");
13  * you may not use this file except in compliance with the License.
14  * You may obtain a copy of the License at
15  *
16  *     http://www.apache.org/licenses/LICENSE-2.0
17  *
18  * Unless required by applicable law or agreed to in writing, software
19  * distributed under the License is distributed on an "AS IS" BASIS,
20  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21  * See the License for the specific language governing permissions and
22  * limitations under the License.
23  *
24  ******************************************************************************/
25 
26 #ifndef _CRC_REVA_REGS_H_
27 #define _CRC_REVA_REGS_H_
28 
29 /* **** Includes **** */
30 #include <stdint.h>
31 
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 
36 #if defined (__ICCARM__)
37   #pragma system_include
38 #endif
39 
40 #if defined (__CC_ARM)
41   #pragma anon_unions
42 #endif
43 /// @cond
44 /*
45     If types are not defined elsewhere (CMSIS) define them here
46 */
47 #ifndef __IO
48 #define __IO volatile
49 #endif
50 #ifndef __I
51 #define __I  volatile const
52 #endif
53 #ifndef __O
54 #define __O  volatile
55 #endif
56 #ifndef __R
57 #define __R  volatile const
58 #endif
59 /// @endcond
60 
61 /* **** Definitions **** */
62 
63 /**
64  * @ingroup     crc_reva
65  * @defgroup    crc_reva_registers CRC_REVA_Registers
66  * @brief       Registers, Bit Masks and Bit Positions for the CRC_REVA Peripheral Module.
67  * @details CRC Registers.
68  */
69 
70 /**
71  * @ingroup crc_reva_registers
72  * Structure type to access the CRC_REVA Registers.
73  */
74 typedef struct {
75     __IO uint32_t ctrl;                 /**< <tt>\b 0x0000:</tt> CRC_REVA CTRL Register */
76   union{
77     __IO uint32_t datain32;             /**< <tt>\b 0x0004:</tt> CRC_REVA DATAIN32 Register */
78     __IO uint16_t datain16[2];          /**< <tt>\b 0x0004:</tt> CRC_REVA DATAIN16 Register */
79     __IO uint8_t  datain8[4];           /**< <tt>\b 0x0004:</tt> CRC_REVA DATAIN8 Register */
80   };
81     __IO uint32_t poly;                 /**< <tt>\b 0x0008:</tt> CRC_REVA POLY Register */
82     __IO uint32_t val;                  /**< <tt>\b 0x000C:</tt> CRC_REVA VAL Register */
83 } mxc_crc_reva_regs_t;
84 
85 /* Register offsets for module CRC_REVA */
86 /**
87  * @ingroup    crc_reva_registers
88  * @defgroup   CRC_REVA_Register_Offsets Register Offsets
89  * @brief      CRC_REVA Peripheral Register Offsets from the CRC_REVA Base Peripheral Address.
90  * @{
91  */
92  #define MXC_R_CRC_REVA_CTRL                ((uint32_t)0x00000000UL) /**< Offset from CRC_REVA Base Address: <tt> 0x0000</tt> */
93  #define MXC_R_CRC_REVA_DATAIN32            ((uint32_t)0x00000004UL) /**< Offset from CRC_REVA Base Address: <tt> 0x0004</tt> */
94  #define MXC_R_CRC_REVA_DATAIN16            ((uint32_t)0x00000004UL) /**< Offset from CRC_REVA Base Address: <tt> 0x0004</tt> */
95  #define MXC_R_CRC_REVA_DATAIN8             ((uint32_t)0x00000004UL) /**< Offset from CRC_REVA Base Address: <tt> 0x0004</tt> */
96  #define MXC_R_CRC_REVA_POLY                ((uint32_t)0x00000008UL) /**< Offset from CRC_REVA Base Address: <tt> 0x0008</tt> */
97  #define MXC_R_CRC_REVA_VAL                 ((uint32_t)0x0000000CUL) /**< Offset from CRC_REVA Base Address: <tt> 0x000C</tt> */
98 /**@} end of group crc_reva_registers */
99 
100 /**
101  * @ingroup  crc_reva_registers
102  * @defgroup CRC_REVA_CTRL CRC_REVA_CTRL
103  * @brief    CRC Control
104  * @{
105  */
106  #define MXC_F_CRC_REVA_CTRL_EN_POS                     0 /**< CTRL_EN Position */
107  #define MXC_F_CRC_REVA_CTRL_EN                         ((uint32_t)(0x1UL << MXC_F_CRC_REVA_CTRL_EN_POS)) /**< CTRL_EN Mask */
108 
109  #define MXC_F_CRC_REVA_CTRL_DMA_EN_POS                 1 /**< CTRL_DMA_EN Position */
110  #define MXC_F_CRC_REVA_CTRL_DMA_EN                     ((uint32_t)(0x1UL << MXC_F_CRC_REVA_CTRL_DMA_EN_POS)) /**< CTRL_DMA_EN Mask */
111 
112  #define MXC_F_CRC_REVA_CTRL_MSB_POS                    2 /**< CTRL_MSB Position */
113  #define MXC_F_CRC_REVA_CTRL_MSB                        ((uint32_t)(0x1UL << MXC_F_CRC_REVA_CTRL_MSB_POS)) /**< CTRL_MSB Mask */
114 
115  #define MXC_F_CRC_REVA_CTRL_BYTE_SWAP_IN_POS           3 /**< CTRL_BYTE_SWAP_IN Position */
116  #define MXC_F_CRC_REVA_CTRL_BYTE_SWAP_IN               ((uint32_t)(0x1UL << MXC_F_CRC_REVA_CTRL_BYTE_SWAP_IN_POS)) /**< CTRL_BYTE_SWAP_IN Mask */
117 
118  #define MXC_F_CRC_REVA_CTRL_BYTE_SWAP_OUT_POS          4 /**< CTRL_BYTE_SWAP_OUT Position */
119  #define MXC_F_CRC_REVA_CTRL_BYTE_SWAP_OUT              ((uint32_t)(0x1UL << MXC_F_CRC_REVA_CTRL_BYTE_SWAP_OUT_POS)) /**< CTRL_BYTE_SWAP_OUT Mask */
120 
121  #define MXC_F_CRC_REVA_CTRL_BUSY_POS                   16 /**< CTRL_BUSY Position */
122  #define MXC_F_CRC_REVA_CTRL_BUSY                       ((uint32_t)(0x1UL << MXC_F_CRC_REVA_CTRL_BUSY_POS)) /**< CTRL_BUSY Mask */
123 
124 /**@} end of group CRC_REVA_CTRL_Register */
125 
126 /**
127  * @ingroup  crc_reva_registers
128  * @defgroup CRC_REVA_DATAIN32 CRC_REVA_DATAIN32
129  * @brief    CRC Data Input
130  * @{
131  */
132  #define MXC_F_CRC_REVA_DATAIN32_DATA_POS               0 /**< DATAIN32_DATA Position */
133  #define MXC_F_CRC_REVA_DATAIN32_DATA                   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CRC_REVA_DATAIN32_DATA_POS)) /**< DATAIN32_DATA Mask */
134 
135 /**@} end of group CRC_REVA_DATAIN32_Register */
136 
137 /**
138  * @ingroup  crc_reva_registers
139  * @defgroup CRC_REVA_DATAIN16 CRC_REVA_DATAIN16
140  * @brief    CRC Data Input
141  * @{
142  */
143  #define MXC_F_CRC_REVA_DATAIN16_DATA_POS               0 /**< DATAIN16_DATA Position */
144  #define MXC_F_CRC_REVA_DATAIN16_DATA                   ((uint16_t)(0xFFFFUL << MXC_F_CRC_REVA_DATAIN16_DATA_POS)) /**< DATAIN16_DATA Mask */
145 
146 /**@} end of group CRC_REVA_DATAIN16_Register */
147 
148 /**
149  * @ingroup  crc_reva_registers
150  * @defgroup CRC_REVA_DATAIN8 CRC_REVA_DATAIN8
151  * @brief    CRC Data Input
152  * @{
153  */
154  #define MXC_F_CRC_REVA_DATAIN8_DATA_POS                0 /**< DATAIN8_DATA Position */
155  #define MXC_F_CRC_REVA_DATAIN8_DATA                    ((uint8_t)(0xFFUL << MXC_F_CRC_REVA_DATAIN8_DATA_POS)) /**< DATAIN8_DATA Mask */
156 
157 /**@} end of group CRC_REVA_DATAIN8_Register */
158 
159 /**
160  * @ingroup  crc_reva_registers
161  * @defgroup CRC_REVA_POLY CRC_REVA_POLY
162  * @brief    CRC Polynomial
163  * @{
164  */
165  #define MXC_F_CRC_REVA_POLY_POLY_POS                   0 /**< POLY_POLY Position */
166  #define MXC_F_CRC_REVA_POLY_POLY                       ((uint32_t)(0xFFFFFFFFUL << MXC_F_CRC_REVA_POLY_POLY_POS)) /**< POLY_POLY Mask */
167 
168 /**@} end of group CRC_REVA_POLY_Register */
169 
170 /**
171  * @ingroup  crc_reva_registers
172  * @defgroup CRC_REVA_VAL CRC_REVA_VAL
173  * @brief    Current CRC Value
174  * @{
175  */
176  #define MXC_F_CRC_REVA_VAL_VALUE_POS                   0 /**< VAL_VALUE Position */
177  #define MXC_F_CRC_REVA_VAL_VALUE                       ((uint32_t)(0xFFFFFFFFUL << MXC_F_CRC_REVA_VAL_VALUE_POS)) /**< VAL_VALUE Mask */
178 
179 /**@} end of group CRC_REVA_VAL_Register */
180 
181 #ifdef __cplusplus
182 }
183 #endif
184 
185 #endif /* _CRC_REVA_REGS_H_ */
186