1 /*
2  * Copyright (c) 2024, Ambiq Micro Inc. <www.ambiq.com>
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef MSPI_AMBIQ_H_
8 #define MSPI_AMBIQ_H_
9 
10 #include <am_mcu_apollo.h>
11 
12 /* Hand-calculated minimum heap sizes needed to return a successful
13  * 1-byte allocation.  See details in lib/os/heap.[ch]
14  */
15 #define MSPI_AMBIQ_HEAP_MIN_SIZE (sizeof(void *) > 4 ? 56 : 44)
16 
17 #define MSPI_AMBIQ_HEAP_DEFINE(name, bytes)                                                       \
18 	char __attribute__((section(".mspi_buff")))                                               \
19 		kheap_##name[MAX(bytes, MSPI_AMBIQ_HEAP_MIN_SIZE)];                               \
20 	STRUCT_SECTION_ITERABLE(k_heap, name) = {                                                 \
21 		.heap =                                                                           \
22 			{                                                                         \
23 				.init_mem = kheap_##name,                                         \
24 				.init_bytes = MAX(bytes, MSPI_AMBIQ_HEAP_MIN_SIZE),               \
25 			},                                                                        \
26 	}
27 
28 struct mspi_ambiq_timing_cfg {
29 	uint8_t ui8WriteLatency;
30 	uint8_t ui8TurnAround;
31 	bool bTxNeg;
32 	bool bRxNeg;
33 	bool bRxCap;
34 	uint32_t ui32TxDQSDelay;
35 	uint32_t ui32RxDQSDelay;
36 	uint32_t ui32RXDQSDelayEXT;
37 };
38 
39 enum mspi_ambiq_timing_param {
40 	MSPI_AMBIQ_SET_WLC            = BIT(0),
41 	MSPI_AMBIQ_SET_RLC            = BIT(1),
42 	MSPI_AMBIQ_SET_TXNEG          = BIT(2),
43 	MSPI_AMBIQ_SET_RXNEG          = BIT(3),
44 	MSPI_AMBIQ_SET_RXCAP          = BIT(4),
45 	MSPI_AMBIQ_SET_TXDQSDLY       = BIT(5),
46 	MSPI_AMBIQ_SET_RXDQSDLY       = BIT(6),
47 	MSPI_AMBIQ_SET_RXDQSDLYEXT    = BIT(7),
48 };
49 
50 #define TIMING_CFG_GET_RX_DUMMY(cfg)                                                              \
51 	{                                                                                         \
52 		mspi_timing_cfg *timing = (mspi_timing_cfg *)cfg;                                 \
53 		timing->ui8TurnAround;                                                            \
54 	}
55 
56 #define TIMING_CFG_SET_RX_DUMMY(cfg, num)                                                         \
57 	{                                                                                         \
58 		mspi_timing_cfg *timing = (mspi_timing_cfg *)cfg;                                 \
59 		timing->ui8TurnAround = num;                                                      \
60 	}
61 
62 #endif
63