1 /*
2  * Copyright 2022-2024 NXP
3 *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef MRU_IP_CFG_DEFINES_H_
8 #define MRU_IP_CFG_DEFINES_H_
9 
10 #ifdef __cplusplus
11 extern "C"{
12 #endif
13 /*==================================================================================================
14                                          INCLUDE FILES
15 ==================================================================================================*/
16 #include "Std_Types.h"
17 
18 /*==================================================================================================
19 *                              SOURCE FILE VERSION INFORMATION
20 ==================================================================================================*/
21 #define CDD_PLATFORM_MRU_IP_CFG_DEFINES_VENDOR_ID                          43
22 #define CDD_PLATFORM_MRU_IP_CFG_DEFINES_SW_MAJOR_VERSION                   2
23 #define CDD_PLATFORM_MRU_IP_CFG_DEFINES_SW_MINOR_VERSION                   0
24 #define CDD_PLATFORM_MRU_IP_CFG_DEFINES_SW_PATCH_VERSION                   0
25 #define CDD_PLATFORM_MRU_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION           4
26 #define CDD_PLATFORM_MRU_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION           7
27 #define CDD_PLATFORM_MRU_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION        0
28 /*==================================================================================================
29                                             CONSTANTS
30 ==================================================================================================*/
31 
32 /*==================================================================================================
33  *                                     DEFINES AND MACROS
34 ==================================================================================================*/
35 
36 /** @brief    IP enablement checking */
37 #define PLATFORM_IP_ENABLE_MRU      (STD_ON)
38 
39 /**
40 * @brief          Enable User Mode Support.
41 * @details        When MruEnableUserModeSupport = TRUE,
42 *                 the MRU driver can be executed from both supervisor and user mode.
43 *
44 * @api
45 */
46 #define MRU_IP_ENABLE_USER_MODE_SUPPORT  (STD_OFF)
47 
48 /** @brief Adds or removes the service Mru_Ip_ResetChannel(). */
49 #define MRU_IP_CHANNEL_RESET_API     (STD_OFF)
50 
51 /** @brief Adds or removes the service Mru_Ip_ResetInstance(). */
52 #define MRU_IP_INSTANCE_RESET_API     (STD_OFF)
53 
54 /** @brief Adds or removes the service Mru_Ip_EnableChannel(). */
55 #define MRU_IP_CHANNEL_ENABLE_API     (STD_OFF)
56 
57 /** @brief Adds or removes the service Mru_Ip_DisableChannel(). */
58 #define MRU_IP_CHANNEL_DISABLE_API     (STD_OFF)
59 
60 /**
61 * @brief Switches ON or OFF for the detection and reporting of development errors(API parameter checking) at IP level.
62 */
63 /** @implements MRU_IP_DEV_ERROR_DETECT_define  */
64 #define MRU_IP_DEV_ERROR_DETECT     (STD_OFF)
65 
66 
67 #define NOTIFY_STATUS_COUNT (2U)
68 
69 #define INTERRUPT_GROUP_0                 (0U)
70 #define INTERRUPT_GROUP_1                 (1U)
71 
72 #define MRU_IP_CH_CFG0_CHE_MASK                 (0x1U)
73 #define MRU_IP_CH_CFG0_IE_MASK                  (0x4U)
74 #define MRU_IP_CH_MBSTAT_MBS0_MASK              (0x10000U)
75 #define MRU_IP_CH_CFG0_MBE0_MASK                (0x10000U)
76 #define MRU_CH_MBSTAT_MBS0_WIDTH                (1U)
77 #define MRU_IP_MRU_CH_CFG0_MBE0_SHIFT           (16U)
78 #define MRU_IP_CH_MBSTAT_MBS0_SHIFT             (16U)
79 #define MRU_IP_CH_CFG1_MBIC0_MASK               (0x10000U)
80 #define MRU_IP_CH_CFG1_MBIC0_SHIFT              (16U)
81 #define MRU_CH_CFG1_MBIC0_WIDTH                 (1U)
82 
83 #define MRU_IP_NOTIFY_CH1_IS_MASK               (0x1U) /*The notify status mask of first channel*/
84 
85 #define PLATFORM_TIMEOUT_TYPE                   (OSIF_COUNTER_DUMMY)
86 
87 #ifdef __cplusplus
88 }
89 #endif
90 
91 #endif /* MRU_IP_CFG_DEFINES_H_ */
92 
93 /** @} */
94 
95 
96