Searched defs:MISR (Results 1 – 4 of 4) sorted by relevance
| /trusted-firmware-m-latest/platform/ext/target/stm/common/stm32u5xx/Device/Include/ |
| D | stm32u585xx.h | 421 …__IO uint32_t MISR; /*!< DCMI masked interrupt status register, Address offset: 0x10 */ member
438 …__IO uint32_t MISR; /*!< DMA non secure masked interrupt status register, Address offset: 0… member
1119 …__IO uint32_t MISR; /*!< RTC masked interrupt status register, Address offset: 0x… member
1145 …__IO uint32_t MISR; /*!< TAMP masked interrupt status register, Address offset: 0x3… member
|
| /trusted-firmware-m-latest/platform/ext/target/stm/common/stm32h5xx/Device/Include/ |
| D | stm32h573xx.h | 489 …__IO uint32_t MISR; /*!< DCMI masked interrupt status register, Address offset: 0x10 */ member
521 …__IO uint32_t MISR; /*!< DMA non secure masked interrupt status register, Address offset: 0… member
1264 …__IO uint32_t MISR; /*!< RTC masked interrupt status register, Address offset: 0x… member
1291 __IO uint32_t MISR; /*!< TAMP masked interrupt status register, Address offset: 0x34 */ member
|
| /trusted-firmware-m-latest/platform/ext/target/stm/common/stm32l5xx/Device/Include/ |
| D | stm32l562xx.h | 1058 …__IO uint32_t MISR; /*!< RTC masked interrupt status register, Address offset: 0x… member
1095 __IO uint32_t MISR; /*!< TAMP masked interrupt status register, Address offset: 0x34 */ member
|
| D | stm32l552xx.h | 984 …__IO uint32_t MISR; /*!< RTC masked interrupt status register, Address offset: 0x… member
1021 __IO uint32_t MISR; /*!< TAMP masked interrupt status register, Address offset: 0x34 */ member
|
