1 /* 2 * Copyright 2014-2016 Freescale Semiconductor, Inc. 3 * Copyright 2016-2023 NXP 4 * All rights reserved. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 * 8 */ 9 10 #ifndef __FSL_DEVICE_REGISTERS_H__ 11 #define __FSL_DEVICE_REGISTERS_H__ 12 13 /* 14 * Include the cpu specific register header files. 15 * 16 * The CPU macro should be declared in the project or makefile. 17 */ 18 #if (defined(CPU_MIMXRT735SGAWAR_cm33_core0) || defined(CPU_MIMXRT735SGFOA_cm33_core0)) 19 20 #define MIMXRT735S_cm33_core0_SERIES 21 22 /* CMSIS-style register definitions */ 23 #include "MIMXRT735S_cm33_core0.h" 24 /* CPU specific feature definitions */ 25 #include "MIMXRT735S_cm33_core0_features.h" 26 27 #elif (defined(CPU_MIMXRT735SGAWAR_cm33_core1) || defined(CPU_MIMXRT735SGFOA_cm33_core1)) 28 29 #define MIMXRT735S_cm33_core1_SERIES 30 31 /* CMSIS-style register definitions */ 32 #include "MIMXRT735S_cm33_core1.h" 33 /* CPU specific feature definitions */ 34 #include "MIMXRT735S_cm33_core1_features.h" 35 36 #elif (defined(CPU_MIMXRT735SGAWAR_hifi1) || defined(CPU_MIMXRT735SGFOA_hifi1)) 37 38 #define MIMXRT735S_hifi1_SERIES 39 40 /* CMSIS-style register definitions */ 41 #include "MIMXRT735S_hifi1.h" 42 /* CPU specific feature definitions */ 43 #include "MIMXRT735S_hifi1_features.h" 44 45 #elif (defined(CPU_MIMXRT735SGAWAR_ezhv) || defined(CPU_MIMXRT735SGFOA_ezhv)) 46 47 #define MIMXRT735S_ezhv_SERIES 48 49 /* CMSIS-style register definitions */ 50 #include "MIMXRT735S_ezhv.h" 51 /* CPU specific feature definitions */ 52 #include "MIMXRT735S_ezhv_features.h" 53 54 #else 55 #error "No valid CPU defined!" 56 #endif 57 58 #endif /* __FSL_DEVICE_REGISTERS_H__ */ 59 60 /******************************************************************************* 61 * EOF 62 ******************************************************************************/ 63
