1 /* 2 * Copyright (c) 2023-2024 Arm Limited. All rights reserved. 3 * 4 * Licensed under the Apache License Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing software 11 * distributed under the License is distributed on an "AS IS" BASIS 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 /** 18 * \file rse_expansion_device_definition.c 19 * \brief This file defines exports the structures based on the peripheral 20 * definitions from device_cfg.h. 21 */ 22 23 #include "rse_expansion_device_definition.h" 24 #include "platform_base_address.h" 25 26 /* Arm UART PL011 driver structures */ 27 #ifdef UART0_PL011_S 28 static const struct uart_pl011_dev_cfg_t UART0_PL011_DEV_CFG_S = { 29 .base = UART0_BASE_S, 30 .def_baudrate = DEFAULT_UART_BAUDRATE, 31 .def_wlen = UART_PL011_WLEN_8, 32 .def_parity = UART_PL011_PARITY_DISABLED, 33 .def_stopbit = UART_PL011_STOPBIT_1 34 }; 35 static struct uart_pl011_dev_data_t UART0_PL011_DEV_DATA_S = { 36 .state = 0, 37 .uart_clk = 0, 38 .baudrate = 0 39 }; 40 struct uart_pl011_dev_t UART0_PL011_DEV_S = { 41 &(UART0_PL011_DEV_CFG_S), 42 &(UART0_PL011_DEV_DATA_S) 43 }; 44 #endif 45 46 #if (defined (SPI_STRATAFLASHJ3_S) && defined (CFI_S)) 47 static const struct cfi_dev_cfg_t CFI_DEV_CFG_S = { 48 .base = BOOT_FLASH_BASE_S, 49 }; 50 struct cfi_dev_t CFI_DEV_S = { 51 .cfg = &CFI_DEV_CFG_S, 52 }; 53 #endif 54 55 #if (defined(SPI_STRATAFLASHJ3_S) && defined(CFI_S)) 56 struct cfi_strataflashj3_dev_t SPI_STRATAFLASHJ3_DEV = { 57 .controller = &CFI_DEV_S, 58 .total_sector_cnt = 0, 59 .page_size = 0, 60 .sector_size = 0, 61 .program_unit = 0, 62 .is_initialized = false 63 }; 64 #endif 65 66 #ifdef MHU_RSE_TO_RSE_SIDEBAND_RECEIVER_COUNT 67 struct mhu_v2_x_dev_t MHU_RSE_TO_RSE_RECEIVER_DEVS[RSE_AMOUNT - 1] = { 68 { 69 .base = MHU_SIDEBAND_0_RECEIVER_BASE_S, 70 .frame = MHU_V2_X_RECEIVER_FRAME, 71 .subversion = 0 72 }, 73 #if MHU_RSE_TO_RSE_SIDEBAND_RECEIVER_COUNT > 1 74 { 75 .base = MHU_SIDEBAND_1_RECEIVER_BASE_S, 76 .frame = MHU_V2_X_RECEIVER_FRAME, 77 .subversion = 0 78 }, 79 #endif 80 #if MHU_RSE_TO_RSE_SIDEBAND_RECEIVER_COUNT > 2 81 { 82 .base = MHU_SIDEBAND_2_RECEIVER_BASE_S, 83 .frame = MHU_V2_X_RECEIVER_FRAME, 84 .subversion = 0 85 }, 86 #endif 87 }; 88 #endif /* MHU_RSE_TO_RSE_SIDEBAND_RECEIVER_COUNT */ 89 90 #ifdef MHU_RSE_TO_RSE_SIDEBAND_SENDER_COUNT 91 struct mhu_v2_x_dev_t MHU_RSE_TO_RSE_SENDER_DEVS[RSE_AMOUNT - 1] = { 92 { 93 .base = MHU_SIDEBAND_0_SENDER_BASE_S, 94 .frame = MHU_V2_X_SENDER_FRAME, 95 .subversion = 0 96 }, 97 #if MHU_RSE_TO_RSE_SIDEBAND_SENDER_COUNT > 1 98 { 99 .base = MHU_SIDEBAND_1_SENDER_BASE_S, 100 .frame = MHU_V2_X_SENDER_FRAME, 101 .subversion = 0 102 }, 103 #endif 104 #if MHU_RSE_TO_RSE_SIDEBAND_SENDER_COUNT > 2 105 { 106 .base = MHU_SIDEBAND_2_SENDER_BASE_S, 107 .frame = MHU_V2_X_SENDER_FRAME, 108 .subversion = 0 109 }, 110 #endif 111 }; 112 #endif /* MHU_RSE_TO_RSE_SIDEBAND_SENDER_COUNT */ 113
