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Searched defs:MER (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h15420 …__IO uint32_t MER; /**< RTC Monotonic Enable Register, offset: 0x24 … member
DRV32M1_zero_riscy.h16248 …__IO uint32_t MER; /**< RTC Monotonic Enable Register, offset: 0x24 … member