1 /* 2 * Copyright (c) 2020 Vestas Wind Systems A/S 3 * Copyright 2022, 2024 NXP 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8 /** 9 * @file 10 * @brief Extended public API for the NXP MCUX Analog Comparator (ACMP) 11 */ 12 13 #ifndef ZEPHYR_INCLUDE_DRIVERS_SENSOR_MCUX_ACMP_H_ 14 #define ZEPHYR_INCLUDE_DRIVERS_SENSOR_MCUX_ACMP_H_ 15 16 #ifdef __cplusplus 17 extern "C" { 18 #endif 19 20 #include <zephyr/drivers/sensor.h> 21 22 #if defined(FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT) && (FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT == 1U) 23 #define MCUX_ACMP_HAS_INPSEL 1 24 #else 25 #define MCUX_ACMP_HAS_INPSEL 0 26 #endif 27 28 #if defined(FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT) && (FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT == 1U) 29 #define MCUX_ACMP_HAS_INNSEL 1 30 #else 31 #define MCUX_ACMP_HAS_INNSEL 0 32 #endif 33 34 #if defined(FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT) && (FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT == 1U) 35 #define MCUX_ACMP_HAS_OFFSET 1 36 #else 37 #define MCUX_ACMP_HAS_OFFSET 0 38 #endif 39 40 #if defined(FSL_FEATURE_ACMP_HAS_C3_REG) && (FSL_FEATURE_ACMP_HAS_C3_REG != 0U) 41 #define MCUX_ACMP_HAS_DISCRETE_MODE 1 42 #else 43 #define MCUX_ACMP_HAS_DISCRETE_MODE 0 44 #endif 45 46 #if defined(FSL_FEATURE_ACMP_HAS_C0_HYSTCTR_BIT) && (FSL_FEATURE_ACMP_HAS_C0_HYSTCTR_BIT == 1U) 47 #define MCUX_ACMP_HAS_HYSTCTR 1 48 #else 49 #define MCUX_ACMP_HAS_HYSTCTR 0 50 #endif 51 52 enum sensor_channel_mcux_acmp { 53 /** Analog Comparator Output. */ 54 SENSOR_CHAN_MCUX_ACMP_OUTPUT = SENSOR_CHAN_PRIV_START, 55 }; 56 57 enum sensor_trigger_type_mcux_acmp { 58 /** Analog Comparator Output rising event trigger. */ 59 SENSOR_TRIG_MCUX_ACMP_OUTPUT_RISING = SENSOR_TRIG_PRIV_START, 60 /** Analog Comparator Output falling event trigger. */ 61 SENSOR_TRIG_MCUX_ACMP_OUTPUT_FALLING, 62 }; 63 64 enum sensor_attribute_mcux_acmp { 65 /** Analog Comparator hard block offset. */ 66 SENSOR_ATTR_MCUX_ACMP_OFFSET_LEVEL = SENSOR_ATTR_COMMON_COUNT, 67 /** Analog Comparator hysteresis level. */ 68 SENSOR_ATTR_MCUX_ACMP_HYSTERESIS_LEVEL, 69 /** 70 * Analog Comparator Digital-to-Analog Converter voltage 71 * reference source. 72 */ 73 SENSOR_ATTR_MCUX_ACMP_DAC_VOLTAGE_REFERENCE, 74 /** Analog Comparator Digital-to-Analog Converter value. */ 75 SENSOR_ATTR_MCUX_ACMP_DAC_VALUE, 76 /** Analog Comparator positive port input. */ 77 SENSOR_ATTR_MCUX_ACMP_POSITIVE_PORT_INPUT, 78 /** Analog Comparator positive mux input. */ 79 SENSOR_ATTR_MCUX_ACMP_POSITIVE_MUX_INPUT, 80 /** Analog Comparator negative port input. */ 81 SENSOR_ATTR_MCUX_ACMP_NEGATIVE_PORT_INPUT, 82 /** Analog Comparator negative mux input. */ 83 SENSOR_ATTR_MCUX_ACMP_NEGATIVE_MUX_INPUT, 84 #if MCUX_ACMP_HAS_DISCRETE_MODE 85 /** Analog Comparator Positive Channel Discrete Mode Enable. */ 86 SENSOR_ATTR_MCUX_ACMP_POSITIVE_DISCRETE_MODE, 87 /** Analog Comparator Negative Channel Discrete Mode Enable. */ 88 SENSOR_ATTR_MCUX_ACMP_NEGATIVE_DISCRETE_MODE, 89 /** Analog Comparator discrete mode clock selection. */ 90 SENSOR_ATTR_MCUX_ACMP_DISCRETE_CLOCK, 91 /** Analog Comparator resistor divider enable. */ 92 SENSOR_ATTR_MCUX_ACMP_DISCRETE_ENABLE_RESISTOR_DIVIDER, 93 /** Analog Comparator discrete sample selection. */ 94 SENSOR_ATTR_MCUX_ACMP_DISCRETE_SAMPLE_TIME, 95 /** Analog Comparator discrete phase1 sampling time selection. */ 96 SENSOR_ATTR_MCUX_ACMP_DISCRETE_PHASE1_TIME, 97 /** Analog Comparator discrete phase2 sampling time selection. */ 98 SENSOR_ATTR_MCUX_ACMP_DISCRETE_PHASE2_TIME, 99 #endif 100 }; 101 102 #ifdef __cplusplus 103 } 104 #endif 105 106 #endif /* ZEPHYR_INCLUDE_DRIVERS_SENSOR_MCUX_ACMP_H_ */ 107
