1 /* 2 * Copyright (c) 2020 Linaro Ltd. 3 * Copyright (c) 2021 Gerson Fernando Budke 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8 /** @file 9 * @brief Atmel SAM0 MCU family devicetree helper macros 10 */ 11 12 #ifndef _ATMEL_SAM0_DT_H_ 13 #define _ATMEL_SAM0_DT_H_ 14 15 /* Helper macro to get MCLK register address for corresponding 16 * that has corresponding clock enable bit. 17 */ 18 #define MCLK_MASK_DT_INT_REG_ADDR(n) \ 19 (DT_REG_ADDR(DT_INST_PHANDLE_BY_NAME(n, clocks, mclk)) + \ 20 DT_INST_CLOCKS_CELL_BY_NAME(n, mclk, offset)) 21 22 /* Helper macros for use with ATMEL SAM0 DMAC controller 23 * return 0xff as default value if there is no 'dmas' property 24 */ 25 #define ATMEL_SAM0_DT_INST_DMA_CELL(n, name, cell) \ 26 COND_CODE_1(DT_INST_NODE_HAS_PROP(n, dmas), \ 27 (DT_INST_DMAS_CELL_BY_NAME(n, name, cell)), \ 28 (0xff)) 29 #define ATMEL_SAM0_DT_INST_DMA_TRIGSRC(n, name) \ 30 ATMEL_SAM0_DT_INST_DMA_CELL(n, name, trigsrc) 31 #define ATMEL_SAM0_DT_INST_DMA_CHANNEL(n, name) \ 32 ATMEL_SAM0_DT_INST_DMA_CELL(n, name, channel) 33 #define ATMEL_SAM0_DT_INST_DMA_CTLR(n, name) \ 34 COND_CODE_1(DT_INST_NODE_HAS_PROP(n, dmas), \ 35 (DT_INST_DMAS_CTLR_BY_NAME(n, name)), \ 36 (DT_INVALID_NODE)) 37 38 39 /* Use to check if a sercom 'n' is enabled for a given 'compat' */ 40 #define ATMEL_SAM0_DT_SERCOM_CHECK(n, compat) \ 41 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(sercom##n), compat, okay) 42 43 /* Use to check if TCC 'n' is enabled for a given 'compat' */ 44 #define ATMEL_SAM0_DT_TCC_CHECK(n, compat) \ 45 DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(tcc##n), compat, okay) 46 47 /* Common macro for use to set HCLK_FREQ_HZ */ 48 #define ATMEL_SAM0_DT_CPU_CLK_FREQ_HZ \ 49 DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency) 50 51 #endif /* _ATMEL_SAM0_SOC_DT_H_ */ 52
