1 /** 2 ****************************************************************************** 3 * @file stm32u0xx_hal_lptim.h 4 * @author MCD Application Team 5 * @brief Header file of LPTIM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U0xx_HAL_LPTIM_H 21 #define STM32U0xx_HAL_LPTIM_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32u0xx_hal_def.h" 29 30 /* Include low level driver */ 31 #include "stm32u0xx_ll_lptim.h" 32 33 /** @addtogroup STM32U0xx_HAL_Driver 34 * @{ 35 */ 36 37 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) 38 39 /** @addtogroup LPTIM 40 * @{ 41 */ 42 43 /* Exported types ------------------------------------------------------------*/ 44 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types 45 * @{ 46 */ 47 48 /** 49 * @brief LPTIM Clock configuration definition 50 */ 51 typedef struct 52 { 53 uint32_t Source; /*!< Selects the clock source. 54 This parameter can be a value of @ref LPTIM_Clock_Source */ 55 56 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. 57 This parameter can be a value of @ref LPTIM_Clock_Prescaler */ 58 59 } LPTIM_ClockConfigTypeDef; 60 61 /** 62 * @brief LPTIM Clock configuration definition 63 */ 64 typedef struct 65 { 66 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit 67 if the ULPTIM input is selected. 68 Note: This parameter is used only when Ultra low power clock source is used. 69 Note: If the polarity is configured on 'both edges', an auxiliary clock 70 (one of the Low power oscillator) must be active. 71 This parameter can be a value of @ref LPTIM_Clock_Polarity */ 72 73 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. 74 Note: This parameter is used only when Ultra low power clock source is used. 75 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ 76 77 } LPTIM_ULPClockConfigTypeDef; 78 79 /** 80 * @brief LPTIM Trigger configuration definition 81 */ 82 typedef struct 83 { 84 uint32_t Source; /*!< Selects the Trigger source. 85 This parameter can be a value of @ref LPTIM_Trigger_Source */ 86 87 uint32_t ActiveEdge; /*!< Selects the Trigger active edge. 88 Note: This parameter is used only when an external trigger is used. 89 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ 90 91 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. 92 Note: This parameter is used only when an external trigger is used. 93 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ 94 } LPTIM_TriggerConfigTypeDef; 95 96 /** 97 * @brief LPTIM Initialization Structure definition 98 */ 99 typedef struct 100 { 101 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ 102 103 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */ 104 105 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ 106 107 uint32_t Period; /*!< Specifies the period value to be loaded into the active 108 Auto-Reload Register at the next update event. 109 This parameter can be a number between 110 Min_Data = 0x0001 and Max_Data = 0xFFFF. */ 111 112 uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare 113 values is done immediately or after the end of current period. 114 This parameter can be a value of @ref LPTIM_Updating_Mode */ 115 116 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event 117 or each external event. 118 This parameter can be a value of @ref LPTIM_Counter_Source */ 119 120 uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output). 121 This parameter can be a value of @ref LPTIM_Input1_Source */ 122 123 uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output). 124 Note: This parameter is used only for encoder feature so is used only 125 for LPTIM1 instance. 126 This parameter can be a value of @ref LPTIM_Input2_Source */ 127 128 uint32_t RepetitionCounter;/*!< Specifies the repetition counter value. 129 Each time the RCR downcounter reaches zero, an update event is 130 generated and counting restarts from the RCR value (N). 131 Note: When using repetition counter the UpdateMode field must be 132 set to LPTIM_UPDATE_ENDOFPERIOD otherwise unpredictable 133 behavior may occur. 134 This parameter must be a number between Min_Data = 0x00 and 135 Max_Data = 0xFF. */ 136 } LPTIM_InitTypeDef; 137 138 /** 139 * @brief LPTIM Output Compare Configuration Structure definition 140 */ 141 typedef struct 142 { 143 uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 144 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 145 uint32_t OCPolarity; /*!< Specifies the output polarity. 146 This parameter can be a value of @ref LPTIM_Output_Compare_Polarity */ 147 } LPTIM_OC_ConfigTypeDef; 148 149 /** 150 * @brief LPTIM Input Capture Configuration Structure definition 151 */ 152 typedef struct 153 { 154 uint32_t ICInputSource; /*!< Specifies source selected for IC channel. 155 This parameter can be a value of @ref LPTIM_Input_Capture_Source */ 156 157 uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. 158 This parameter can be a value of @ref LPTIM_Input_Capture_Prescaler */ 159 160 uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. 161 This parameter can be a value of @ref LPTIM_Input_Capture_Polarity */ 162 163 uint32_t ICFilter; /*!< Specifies the input capture filter. 164 This parameter can be a value of @ref LPTIM_Input_Capture_Filter */ 165 } LPTIM_IC_ConfigTypeDef; 166 167 /** 168 * @brief HAL LPTIM State structure definition 169 */ 170 typedef enum 171 { 172 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ 173 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 174 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ 175 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ 176 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */ 177 } HAL_LPTIM_StateTypeDef; 178 179 /** 180 * @brief HAL Active channel structures definition 181 */ 182 typedef enum 183 { 184 HAL_LPTIM_ACTIVE_CHANNEL_1 = 0x01U, /*!< The active channel is 1 */ 185 HAL_LPTIM_ACTIVE_CHANNEL_2 = 0x02U, /*!< The active channel is 2 */ 186 HAL_LPTIM_ACTIVE_CHANNEL_3 = 0x04U, /*!< The active channel is 3 */ 187 HAL_LPTIM_ACTIVE_CHANNEL_4 = 0x08U, /*!< The active channel is 4 */ 188 HAL_LPTIM_ACTIVE_CHANNEL_CLEARED = 0x00U /*!< All active channels cleared */ 189 } HAL_LPTIM_ActiveChannel; 190 191 /** 192 * @brief LPTIM Channel States definition 193 */ 194 typedef enum 195 { 196 HAL_LPTIM_CHANNEL_STATE_RESET = 0x00U, /*!< LPTIM Channel initial state */ 197 HAL_LPTIM_CHANNEL_STATE_READY = 0x01U, /*!< LPTIM Channel ready for use */ 198 HAL_LPTIM_CHANNEL_STATE_BUSY = 0x02U, /*!< An internal process is ongoing on the LPTIM channel */ 199 } HAL_LPTIM_ChannelStateTypeDef; 200 201 /** 202 * @brief LPTIM handle Structure definition 203 */ 204 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 205 typedef struct __LPTIM_HandleTypeDef 206 #else 207 typedef struct 208 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 209 { 210 LPTIM_TypeDef *Instance; /*!< Register base address */ 211 212 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ 213 214 HAL_LPTIM_ActiveChannel Channel; /*!< Active channel */ 215 216 DMA_HandleTypeDef *hdma[5]; /*!< DMA Handlers array, This array is accessed by a @ref LPTIM_DMA_Handle_index */ 217 218 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ 219 220 HAL_LockTypeDef Lock; /*!< LPTIM locking object */ 221 222 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ 223 224 __IO HAL_LPTIM_ChannelStateTypeDef ChannelState[4]; /*!< LPTIM channel operation state */ 225 226 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 227 void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp Init Callback */ 228 void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp DeInit Callback */ 229 void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare match Callback */ 230 void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload match Callback */ 231 void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< External trigger event detection Callback */ 232 void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare register write complete Callback */ 233 void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload register write complete Callback */ 234 void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Up-counting direction change Callback */ 235 void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Down-counting direction change Callback */ 236 void (* UpdateEventCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Update event detection Callback */ 237 void (* RepCounterWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Repetition counter register write complete Callback */ 238 void (* UpdateEventHalfCpltCallback)(struct __LPTIM_HandleTypeDef *hlptim);/*!< Update event half complete detection Callback */ 239 void (* ErrorCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Error Callback */ 240 void (* IC_CaptureCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Input capture Callback */ 241 void (* IC_CaptureHalfCpltCallback)(struct __LPTIM_HandleTypeDef *htim); /*!< Input Capture half complete Callback */ 242 void (* IC_OverCaptureCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Over capture Callback */ 243 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 244 } LPTIM_HandleTypeDef; 245 246 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 247 /** 248 * @brief HAL LPTIM Callback ID enumeration definition 249 */ 250 typedef enum 251 { 252 HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM Base Msp Init Callback ID */ 253 HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM Base Msp DeInit Callback ID */ 254 HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< Compare match Callback ID */ 255 HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U, /*!< Auto-reload match Callback ID */ 256 HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< External trigger event detection Callback ID */ 257 HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< Compare register write complete Callback ID */ 258 HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U, /*!< Auto-reload register write complete Callback ID */ 259 HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< Up-counting direction change Callback ID */ 260 HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< Down-counting direction change Callback ID */ 261 HAL_LPTIM_UPDATE_EVENT_CB_ID = 0x09U, /*!< Update event detection Callback ID */ 262 HAL_LPTIM_REP_COUNTER_WRITE_CB_ID = 0x0AU, /*!< Repetition counter register write complete Callback ID */ 263 HAL_LPTIM_UPDATE_EVENT_HALF_CB_ID = 0x0BU, /*!< Update event half complete detection Callback ID */ 264 HAL_LPTIM_ERROR_CB_ID = 0x0CU, /*!< LPTIM Error Callback ID */ 265 HAL_LPTIM_IC_CAPTURE_CB_ID = 0x0DU, /*!< Input capture Callback ID */ 266 HAL_LPTIM_IC_CAPTURE_HALF_CB_ID = 0x0EU, /*!< Input capture half complete Callback ID */ 267 HAL_LPTIM_OVER_CAPTURE_CB_ID = 0x0FU, /*!< Over capture Callback ID */ 268 } HAL_LPTIM_CallbackIDTypeDef; 269 270 /** 271 * @brief HAL TIM Callback pointer definition 272 */ 273 typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< pointer to the LPTIM callback function */ 274 275 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 276 /** 277 * @} 278 */ 279 280 /* Exported constants --------------------------------------------------------*/ 281 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants 282 * @{ 283 */ 284 285 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source 286 * @{ 287 */ 288 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U 289 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL 290 /** 291 * @} 292 */ 293 294 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler 295 * @{ 296 */ 297 #define LPTIM_PRESCALER_DIV1 0x00000000U 298 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 299 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 300 #define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1) 301 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 302 #define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2) 303 #define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2) 304 #define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC 305 /** 306 * @} 307 */ 308 309 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time 310 * @{ 311 */ 312 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U 313 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 314 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 315 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT 316 /** 317 * @} 318 */ 319 320 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity 321 * @{ 322 */ 323 #define LPTIM_CLOCKPOLARITY_RISING 0x00000000U 324 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 325 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 326 /** 327 * @} 328 */ 329 330 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source 331 * @{ 332 */ 333 #define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU 334 #define LPTIM_TRIGSOURCE_0 0x00000000U 335 #define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0 336 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 337 #define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) 338 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 339 #define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) 340 #define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) 341 #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL 342 /** 343 * @} 344 */ 345 346 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity 347 * @{ 348 */ 349 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 350 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 351 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN 352 /** 353 * @} 354 */ 355 356 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time 357 * @{ 358 */ 359 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U 360 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 361 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 362 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT 363 /** 364 * @} 365 */ 366 367 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode 368 * @{ 369 */ 370 371 #define LPTIM_UPDATE_IMMEDIATE 0x00000000U 372 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD 373 /** 374 * @} 375 */ 376 377 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source 378 * @{ 379 */ 380 381 #define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U 382 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE 383 /** 384 * @} 385 */ 386 387 /** @defgroup LPTIM_Input1_Source LPTIM Input1 Source 388 * @{ 389 */ 390 391 #define LPTIM_INPUT1SOURCE_GPIO 0x00000000U /*!< For LPTIM1, LPTIM2 and LPTIM3 */ 392 #define LPTIM_INPUT1SOURCE_COMP1 LPTIM_CFGR2_IN1SEL_0 /*!< For LPTIM1, LPTIM2 and LPTIM3 */ 393 #if defined(COMP2) 394 #define LPTIM_INPUT1SOURCE_COMP2 LPTIM_CFGR2_IN1SEL_1 /*!< For LPTIM2 */ 395 #define LPTIM_INPUT1SOURCE_COMP1_COMP2 (LPTIM_CFGR2_IN1SEL_1 | LPTIM_CFGR2_IN1SEL_0) /*!< For LPTIM2 */ 396 #endif /* COMP2 */ 397 /** 398 * @} 399 */ 400 401 /** @defgroup LPTIM_Input2_Source LPTIM Input2 Source 402 * @{ 403 */ 404 405 #define LPTIM_INPUT2SOURCE_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM3 */ 406 #if defined(COMP2) 407 #define LPTIM_INPUT2SOURCE_COMP2 LPTIM_CFGR2_IN2SEL_0 /*!< For LPTIM1 and LPTIM3 */ 408 #endif /* COMP2 */ 409 /** 410 * @} 411 */ 412 413 /** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition 414 * @{ 415 */ 416 417 #define LPTIM_FLAG_CC1O LPTIM_ISR_CC1OF 418 #define LPTIM_FLAG_CC2O LPTIM_ISR_CC2OF 419 #define LPTIM_FLAG_CC3O LPTIM_ISR_CC3OF 420 #define LPTIM_FLAG_CC4O LPTIM_ISR_CC4OF 421 #define LPTIM_FLAG_CC1 LPTIM_ISR_CC1IF 422 #define LPTIM_FLAG_CC2 LPTIM_ISR_CC2IF 423 #define LPTIM_FLAG_CC3 LPTIM_ISR_CC3IF 424 #define LPTIM_FLAG_CC4 LPTIM_ISR_CC4IF 425 #define LPTIM_FLAG_CMP1OK LPTIM_ISR_CMP1OK 426 #define LPTIM_FLAG_CMP2OK LPTIM_ISR_CMP2OK 427 #define LPTIM_FLAG_CMP3OK LPTIM_ISR_CMP3OK 428 #define LPTIM_FLAG_CMP4OK LPTIM_ISR_CMP4OK 429 #define LPTIM_FLAG_DIEROK LPTIM_ISR_DIEROK 430 #define LPTIM_FLAG_REPOK LPTIM_ISR_REPOK 431 #define LPTIM_FLAG_UPDATE LPTIM_ISR_UE 432 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN 433 #define LPTIM_FLAG_UP LPTIM_ISR_UP 434 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK 435 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG 436 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM 437 /** 438 * @} 439 */ 440 441 /** @defgroup LPTIM_DMA_sources LPTIM DMA Sources 442 * @{ 443 */ 444 #define LPTIM_DMA_UPDATE LPTIM_DIER_UEDE /*!< DMA request is triggered by the update event */ 445 #define LPTIM_DMA_CC1 LPTIM_DIER_CC1DE /*!< DMA request is triggered by the capture 1 event */ 446 #define LPTIM_DMA_CC2 LPTIM_DIER_CC2DE /*!< DMA request is triggered by the capture 2 event */ 447 #define LPTIM_DMA_CC3 LPTIM_DIER_CC3DE /*!< DMA request is triggered by the capture 3 event */ 448 #define LPTIM_DMA_CC4 LPTIM_DIER_CC4DE /*!< DMA request is triggered by the capture 4 event */ 449 450 /** 451 * @} 452 */ 453 454 /** @defgroup LPTIM_DMA_Handle_index LPTIM DMA Handle Index 455 * @{ 456 */ 457 #define LPTIM_DMA_ID_UPDATE ((uint16_t) 0x0000) /*!< Index of the DMA handle used for Update DMA requests */ 458 #define LPTIM_DMA_ID_CC1 ((uint16_t) 0x0001) /*!< Index of the DMA handle used for Capture/Update event 1 DMA request */ 459 #define LPTIM_DMA_ID_CC2 ((uint16_t) 0x0002) /*!< Index of the DMA handle used for Capture/Update event 2 DMA request */ 460 #define LPTIM_DMA_ID_CC3 ((uint16_t) 0x0003) /*!< Index of the DMA handle used for Capture/Update event 3 DMA request */ 461 #define LPTIM_DMA_ID_CC4 ((uint16_t) 0x0004) /*!< Index of the DMA handle used for Capture/Update event 4 DMA request */ 462 /** 463 * @} 464 */ 465 466 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition 467 * @{ 468 */ 469 #define LPTIM_IT_CC1O LPTIM_DIER_CC1OIE 470 #define LPTIM_IT_CC2O LPTIM_DIER_CC2OIE 471 #define LPTIM_IT_CC3O LPTIM_DIER_CC3OIE 472 #define LPTIM_IT_CC4O LPTIM_DIER_CC4OIE 473 #define LPTIM_IT_CC1 LPTIM_DIER_CC1IE 474 #define LPTIM_IT_CC2 LPTIM_DIER_CC2IE 475 #define LPTIM_IT_CC3 LPTIM_DIER_CC3IE 476 #define LPTIM_IT_CC4 LPTIM_DIER_CC4IE 477 #define LPTIM_IT_CMP1OK LPTIM_DIER_CMP1OKIE 478 #define LPTIM_IT_CMP2OK LPTIM_DIER_CMP2OKIE 479 #define LPTIM_IT_CMP3OK LPTIM_DIER_CMP3OKIE 480 #define LPTIM_IT_CMP4OK LPTIM_DIER_CMP4OKIE 481 #define LPTIM_IT_REPOK LPTIM_DIER_REPOKIE 482 #define LPTIM_IT_UPDATE LPTIM_DIER_UEIE 483 #define LPTIM_IT_DOWN LPTIM_DIER_DOWNIE 484 #define LPTIM_IT_UP LPTIM_DIER_UPIE 485 #define LPTIM_IT_ARROK LPTIM_DIER_ARROKIE 486 #define LPTIM_IT_EXTTRIG LPTIM_DIER_EXTTRIGIE 487 #define LPTIM_IT_ARRM LPTIM_DIER_ARRMIE 488 /** 489 * @} 490 */ 491 492 /** @defgroup LPTIM_Channel LPTIM Channel 493 * @{ 494 */ 495 #define LPTIM_CHANNEL_1 LL_LPTIM_CHANNEL_CH1 /*!< Capture/compare channel 1 identifier */ 496 #define LPTIM_CHANNEL_2 LL_LPTIM_CHANNEL_CH2 /*!< Capture/compare channel 2 identifier */ 497 #define LPTIM_CHANNEL_3 LL_LPTIM_CHANNEL_CH3 /*!< Capture/compare channel 1 identifier */ 498 #define LPTIM_CHANNEL_4 LL_LPTIM_CHANNEL_CH4 /*!< Capture/compare channel 2 identifier */ 499 /** 500 * @} 501 */ 502 503 /** @defgroup LPTIM_Output_Compare_Polarity LPTIM Output Compare Polarity 504 * @{ 505 */ 506 #define LPTIM_OCPOLARITY_HIGH 0x00000000U /*!< Capture/Compare output polarity */ 507 #define LPTIM_OCPOLARITY_LOW 0x00000001U /*!< Capture/Compare output polarity */ 508 /** 509 * @} 510 */ 511 512 /** @defgroup LPTIM_Input_Capture_Prescaler LPTIM Input Capture Prescaler 513 * @{ 514 */ 515 #define LPTIM_ICPSC_DIV1 0x00000000UL /*!< Capture performed each time an edge is detected on the capture input */ 516 #define LPTIM_ICPSC_DIV2 LPTIM_CCMR1_IC1PSC_0 /*!< Capture performed once every 2 events */ 517 #define LPTIM_ICPSC_DIV4 LPTIM_CCMR1_IC1PSC_1 /*!< Capture performed once every 4 events */ 518 #define LPTIM_ICPSC_DIV8 (LPTIM_CCMR1_IC1PSC_0|LPTIM_CCMR1_IC1PSC_1) /*!< Capture performed once every 8 events */ 519 /** 520 * @} 521 */ 522 523 /** @defgroup LPTIM_Input_Capture_Polarity LPTIM Input Capture Polarity 524 * @{ 525 */ 526 #define LPTIM_ICPOLARITY_RISING 0x00000000UL /*!< Capture/Compare input rising polarity */ 527 #define LPTIM_ICPOLARITY_FALLING LPTIM_CCMR1_CC1P_0 /*!< Capture/Compare input falling polarity */ 528 #define LPTIM_ICPOLARITY_RISING_FALLING (LPTIM_CCMR1_CC1P_0|LPTIM_CCMR1_CC1P_1) /*!< Capture/Compare input rising and falling polarities */ 529 /** 530 * @} 531 */ 532 533 /** @defgroup LPTIM_Input_Capture_Filter LPTIM Input Capture Filter 534 * @{ 535 */ 536 #define LPTIM_ICFLT_CLOCK_DIV1 0x00000000UL /*!< any external input capture signal level change is considered as a valid transition */ 537 #define LPTIM_ICFLT_CLOCK_DIV2 LPTIM_CCMR1_IC1F_0 /*!< external input capture signal level change must be stable for at least 2 clock periods before it is considered as valid transition */ 538 #define LPTIM_ICFLT_CLOCK_DIV4 LPTIM_CCMR1_IC1F_1 /*!< external input capture signal level change must be stable for at least 4 clock periods before it is considered as valid transition */ 539 #define LPTIM_ICFLT_CLOCK_DIV8 (LPTIM_CCMR1_IC1F_0|LPTIM_CCMR1_IC1F_1) /*!< external input capture signal level change must be stable for at least 8 clock periods before it is considered as valid transition */ 540 /** 541 * @} 542 */ 543 544 /** @defgroup LPTIM_Input_Capture_Source LPTIM Input Capture Source 545 * @{ 546 */ 547 #define LPTIM_IC1SOURCE_GPIO 0x00000000UL /*!< For LPTIM1, LPTIM2 and LPTIM3 */ 548 #define LPTIM_IC1SOURCE_COMP1 LPTIM_CFGR2_IC1SEL_0 /*!< For LPTIM1, LPTIM2 and LPTIM3 */ 549 #if defined(COMP2) 550 #define LPTIM_IC1SOURCE_COMP2 LPTIM_CFGR2_IC1SEL_1 /*!< For LPTIM1, LPTIM2 and LPTIM3 */ 551 #endif /* COMP2 */ 552 #define LPTIM_IC2SOURCE_GPIO 0x00000000UL /*!< For LPTIM1, LPTIM2 and LPTIM3 */ 553 #define LPTIM_IC2SOURCE_MCO1 LPTIM_CFGR2_IC2SEL_0 /*!< For LPTIM1, LPTIM2 and LPTIM3 */ 554 #define LPTIM_IC2SOURCE_MCO2 LPTIM_CFGR2_IC2SEL_1 /*!< For LPTIM1, LPTIM2 and LPTIM3 */ 555 #define LPTIM_IC3SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM3 */ 556 #define LPTIM_IC3SOURCE_COMP1 LPTIM_CFGR2_IC3SEL_0 /*!< For LPTIM1 and LPTIM3 */ 557 #if defined(COMP2) 558 #define LPTIM_IC3SOURCE_COMP2 LPTIM_CFGR2_IC3SEL_1 /*!< For LPTIM1 and LPTIM3 */ 559 #endif /* COMP2 */ 560 #define LPTIM_IC4SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM3 */ 561 #define LPTIM_IC4SOURCE_COMP1 LPTIM_CFGR2_IC4SEL_0 /*!< For LPTIM1 and LPTIM3 */ 562 #if defined(COMP2) 563 #define LPTIM_IC4SOURCE_COMP2 LPTIM_CFGR2_IC4SEL_1 /*!< For LPTIM1 and LPTIM3 */ 564 #endif /* COMP2 */ 565 /** 566 * @} 567 */ 568 /** 569 * @} 570 */ 571 572 /* Exported macros -----------------------------------------------------------*/ 573 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros 574 * @{ 575 */ 576 577 /** @brief Reset LPTIM handle state. 578 * @param __HANDLE__ LPTIM handle 579 * @retval None 580 */ 581 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 582 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 583 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 584 (__HANDLE__)->ChannelState[0] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 585 (__HANDLE__)->ChannelState[1] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 586 (__HANDLE__)->ChannelState[2] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 587 (__HANDLE__)->ChannelState[3] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 588 (__HANDLE__)->MspInitCallback = NULL; \ 589 (__HANDLE__)->MspDeInitCallback = NULL; \ 590 } while(0) 591 #else 592 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 593 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 594 (__HANDLE__)->ChannelState[0] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 595 (__HANDLE__)->ChannelState[1] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 596 (__HANDLE__)->ChannelState[2] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 597 (__HANDLE__)->ChannelState[3] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 598 } while(0) 599 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 600 601 /** 602 * @brief Enable the LPTIM peripheral. 603 * @param __HANDLE__ LPTIM handle 604 * @retval None 605 */ 606 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) 607 608 /** 609 * @brief Disable the LPTIM peripheral. 610 * @param __HANDLE__ LPTIM handle 611 * @retval None 612 */ 613 #define __HAL_LPTIM_DISABLE(__HANDLE__) \ 614 do { \ 615 if (IS_LPTIM_CC4_INSTANCE((__HANDLE__)->Instance) == 1UL) \ 616 { \ 617 if (((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC1E) == 0UL) \ 618 { \ 619 if (((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC2E) == 0UL) \ 620 { \ 621 if (((__HANDLE__)->Instance->CCMR2 & LPTIM_CCMR2_CC3E) == 0UL) \ 622 { \ 623 if (((__HANDLE__)->Instance->CCMR2 & LPTIM_CCMR2_CC4E) == 0UL) \ 624 { \ 625 CLEAR_BIT((__HANDLE__)->Instance->CR, LPTIM_CR_ENABLE); \ 626 } \ 627 } \ 628 } \ 629 } \ 630 } \ 631 else if (IS_LPTIM_CC2_INSTANCE((__HANDLE__)->Instance) == 1UL) \ 632 { \ 633 if (((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC1E) == 0UL) \ 634 { \ 635 if (((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC2E) == 0UL) \ 636 { \ 637 CLEAR_BIT((__HANDLE__)->Instance->CR, LPTIM_CR_ENABLE); \ 638 } \ 639 } \ 640 } \ 641 else \ 642 { \ 643 CLEAR_BIT((__HANDLE__)->Instance->CR, LPTIM_CR_ENABLE); \ 644 } \ 645 } while(0) 646 647 /** 648 * @brief Start the LPTIM peripheral in Continuous mode. 649 * @param __HANDLE__ LPTIM handle 650 * @retval None 651 */ 652 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) 653 /** 654 * @brief Start the LPTIM peripheral in single mode. 655 * @param __HANDLE__ LPTIM handle 656 * @retval None 657 */ 658 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) 659 660 /** 661 * @brief Reset the LPTIM Counter register in synchronous mode. 662 * @param __HANDLE__ LPTIM handle 663 * @retval None 664 */ 665 #define __HAL_LPTIM_RESET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_COUNTRST) 666 667 /** 668 * @brief Reset after read of the LPTIM Counter register in asynchronous mode. 669 * @param __HANDLE__ LPTIM handle 670 * @retval None 671 */ 672 #define __HAL_LPTIM_RESET_COUNTER_AFTERREAD(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_RSTARE) 673 674 /** 675 * @brief Write the passed parameter in the Autoreload register. 676 * @param __HANDLE__ LPTIM handle 677 * @param __VALUE__ Autoreload value 678 * @retval None 679 * @note The ARR register can only be modified when the LPTIM instance is enabled. 680 */ 681 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) 682 683 /** 684 * @brief Write the passed parameter in the Compare register. 685 * @param __HANDLE__ LPTIM handle 686 * @param __VALUE__ Compare value 687 * @param __CHANNEL__ TIM Channel to be configured 688 * @retval None 689 * @note The CCRx registers can only be modified when the LPTIM instance is enabled. 690 */ 691 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __CHANNEL__, __VALUE__) \ 692 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__VALUE__)) :\ 693 ((__CHANNEL__) == LPTIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__VALUE__)) :\ 694 ((__CHANNEL__) == LPTIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__VALUE__)) :\ 695 ((__CHANNEL__) == LPTIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__VALUE__)) : 0U) 696 697 /** 698 * @brief Write the passed parameter in the Repetition register. 699 * @param __HANDLE__ LPTIM handle 700 * @param __VALUE__ Repetition value 701 * @retval None 702 */ 703 #define __HAL_LPTIM_REPETITIONCOUNTER_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->RCR = (__VALUE__)) 704 705 /** 706 * @brief Return the current Repetition value. 707 * @param __HANDLE__ LPTIM handle 708 * @retval Repetition register value 709 * @note The RCR register can only be modified when the LPTIM instance is enabled. 710 */ 711 #define __HAL_LPTIM_REPETITIONCOUNTER_GET(__HANDLE__) ((__HANDLE__)->Instance->RCR) 712 713 /** 714 * @brief Enable the LPTIM signal input/output on the corresponding pin. 715 * @param __HANDLE__ LPTIM handle 716 * @param __CHANNEL__ LPTIM Channels to be enabled. 717 * This parameter can be one of the following values: 718 * @arg LPTIM_CHANNEL_1: LPTIM Channel 1 selected 719 * @arg LPTIM_CHANNEL_2: LPTIM Channel 2 selected 720 * @arg LPTIM_CHANNEL_3: LPTIM Channel 3 selected 721 * @arg LPTIM_CHANNEL_4: LPTIM Channel 4 selected 722 * @retval None 723 */ 724 #define __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(__HANDLE__, __CHANNEL__) \ 725 do { \ 726 switch (__CHANNEL__) \ 727 { \ 728 case LPTIM_CHANNEL_1: \ 729 ((__HANDLE__)->Instance->CCMR1 |= LPTIM_CCMR1_CC1E); \ 730 break; \ 731 case LPTIM_CHANNEL_2: \ 732 ((__HANDLE__)->Instance->CCMR1 |= LPTIM_CCMR1_CC2E); \ 733 break; \ 734 case LPTIM_CHANNEL_3: \ 735 ((__HANDLE__)->Instance->CCMR2 |= LPTIM_CCMR2_CC3E); \ 736 break; \ 737 case LPTIM_CHANNEL_4: \ 738 ((__HANDLE__)->Instance->CCMR2 |= LPTIM_CCMR2_CC4E); \ 739 break; \ 740 default: \ 741 break; \ 742 } \ 743 } \ 744 while(0) 745 746 /** 747 * @brief Disable the LPTIM signal input/output on the corresponding pin. 748 * @param __HANDLE__ LPTIM handle 749 * @param __CHANNEL__ LPTIM Channels to be disabled. 750 * This parameter can be one of the following values: 751 * @arg LPTIM_CHANNEL_1: LPTIM Channel 1 selected 752 * @arg LPTIM_CHANNEL_2: LPTIM Channel 2 selected 753 * @arg LPTIM_CHANNEL_3: LPTIM Channel 3 selected 754 * @arg LPTIM_CHANNEL_4: LPTIM Channel 4 selected 755 * @retval None 756 */ 757 #define __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(__HANDLE__, __CHANNEL__) \ 758 do { \ 759 switch (__CHANNEL__) \ 760 { \ 761 case LPTIM_CHANNEL_1: \ 762 ((__HANDLE__)->Instance->CCMR1 &= ~LPTIM_CCMR1_CC1E); \ 763 break; \ 764 case LPTIM_CHANNEL_2: \ 765 ((__HANDLE__)->Instance->CCMR1 &= ~LPTIM_CCMR1_CC2E); \ 766 break; \ 767 case LPTIM_CHANNEL_3: \ 768 ((__HANDLE__)->Instance->CCMR2 &= ~LPTIM_CCMR2_CC3E); \ 769 break; \ 770 case LPTIM_CHANNEL_4: \ 771 ((__HANDLE__)->Instance->CCMR2 &= ~LPTIM_CCMR2_CC4E); \ 772 break; \ 773 default: \ 774 break; \ 775 } \ 776 } \ 777 while(0) 778 779 /** 780 * @brief Check whether the specified LPTIM flag is set or not. 781 * @param __HANDLE__ LPTIM handle 782 * @param __FLAG__ LPTIM flag to check 783 * This parameter can be a value of: 784 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag. 785 * @arg LPTIM_FLAG_UPDATE : Update event Flag. 786 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 787 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 788 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 789 * @arg LPTIM_FLAG_CMP1OK : Compare register 1 update OK Flag. 790 * @arg LPTIM_FLAG_CMP2OK : Compare register 2 update OK Flag. 791 * @arg LPTIM_FLAG_CMP3OK : Compare register 3 update OK Flag. 792 * @arg LPTIM_FLAG_CMP4OK : Compare register 4 update OK Flag. 793 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 794 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 795 * @arg LPTIM_FLAG_CC1 : Capture/Compare 1 interrupt flag. 796 * @arg LPTIM_FLAG_CC2 : Capture/Compare 2 interrupt flag. 797 * @arg LPTIM_FLAG_CC3 : Capture/Compare 3 interrupt flag. 798 * @arg LPTIM_FLAG_CC4 : Capture/Compare 4 interrupt flag. 799 * @arg LPTIM_FLAG_CC1O : Capture/Compare 1 over-capture flag. 800 * @arg LPTIM_FLAG_CC2O : Capture/Compare 2 over-capture flag. 801 * @arg LPTIM_FLAG_CC3O : Capture/Compare 3 over-capture flag. 802 * @arg LPTIM_FLAG_CC4O : Capture/Compare 4 over-capture flag. 803 * @arg LPTIM_FLAG_DIEROK : DMA & interrupt enable update OK flag. 804 * @retval The state of the specified flag (SET or RESET). 805 */ 806 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) 807 808 /** 809 * @brief Clear the specified LPTIM flag. 810 * @param __HANDLE__ LPTIM handle. 811 * @param __FLAG__ LPTIM flag to clear. 812 * This parameter can be a value of: 813 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag. 814 * @arg LPTIM_FLAG_UPDATE : Update event Flag. 815 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 816 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 817 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 818 * @arg LPTIM_FLAG_CMP1OK : Compare register 1 update OK Flag. 819 * @arg LPTIM_FLAG_CMP2OK : Compare register 2 update OK Flag. 820 * @arg LPTIM_FLAG_CMP3OK : Compare register 3 update OK Flag. 821 * @arg LPTIM_FLAG_CMP4OK : Compare register 4 update OK Flag. 822 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 823 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 824 * @arg LPTIM_FLAG_CC1 : Capture/Compare 1 interrupt flag. 825 * @arg LPTIM_FLAG_CC2 : Capture/Compare 2 interrupt flag. 826 * @arg LPTIM_FLAG_CC3 : Capture/Compare 3 interrupt flag. 827 * @arg LPTIM_FLAG_CC4 : Capture/Compare 4 interrupt flag. 828 * @arg LPTIM_FLAG_CC1O : Capture/Compare 1 over-capture flag. 829 * @arg LPTIM_FLAG_CC2O : Capture/Compare 2 over-capture flag. 830 * @arg LPTIM_FLAG_CC3O : Capture/Compare 3 over-capture flag. 831 * @arg LPTIM_FLAG_CC4O : Capture/Compare 4 over-capture flag. 832 * @arg LPTIM_FLAG_DIEROK : DMA & interrupt enable update OK flag. 833 * @retval None. 834 */ 835 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 836 837 /** 838 * @brief Enable the specified LPTIM interrupt. 839 * @param __HANDLE__ LPTIM handle. 840 * @param __INTERRUPT__ LPTIM interrupt to set. 841 * This parameter can be a value of: 842 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 843 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 844 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 845 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 846 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 847 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 848 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 849 * @arg LPTIM_IT_CMP3OK : Compare register 3 update OK Interrupt. 850 * @arg LPTIM_IT_CMP4OK : Compare register 4 update OK Interrupt. 851 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 852 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 853 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 854 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 855 * @arg LPTIM_IT_CC3 : Capture/Compare 3 interrupt Interrupt. 856 * @arg LPTIM_IT_CC4 : Capture/Compare 4 interrupt Interrupt. 857 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 858 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 859 * @arg LPTIM_IT_CC3O : Capture/Compare 3 over-capture Interrupt. 860 * @arg LPTIM_IT_CC4O : Capture/Compare 4 over-capture Interrupt. 861 * @retval None. 862 * @note The LPTIM interrupts can only be enabled when the LPTIM instance is enabled. 863 */ 864 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__)) 865 866 /** 867 * @brief Disable the specified LPTIM interrupt. 868 * @param __HANDLE__ LPTIM handle. 869 * @param __INTERRUPT__ LPTIM interrupt to set. 870 * This parameter can be a value of: 871 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 872 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 873 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 874 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 875 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 876 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 877 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 878 * @arg LPTIM_IT_CMP3OK : Compare register 3 update OK Interrupt. 879 * @arg LPTIM_IT_CMP4OK : Compare register 4 update OK Interrupt. 880 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 881 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 882 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 883 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 884 * @arg LPTIM_IT_CC3 : Capture/Compare 3 interrupt Interrupt. 885 * @arg LPTIM_IT_CC4 : Capture/Compare 4 interrupt Interrupt. 886 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 887 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 888 * @arg LPTIM_IT_CC3O : Capture/Compare 3 over-capture Interrupt. 889 * @arg LPTIM_IT_CC4O : Capture/Compare 4 over-capture Interrupt. 890 * @retval None. 891 * @note The LPTIM interrupts can only be disabled when the LPTIM instance is enabled. 892 */ 893 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= (~(__INTERRUPT__))) 894 895 /** @brief Enable the specified DMA request. 896 * @param __HANDLE__ specifies the TIM Handle. 897 * @param __DMA__ specifies the LPTIM DMA request to enable. 898 * This parameter can be one of the following values: 899 * @arg LPTIM_DMA_UPDATE: Update DMA request 900 * @arg LPTIM_DMA_CC1: Capture/Compare 1 DMA request 901 * @arg LPTIM_DMA_CC2: Capture/Compare 2 DMA request 902 * @arg LPTIM_DMA_CC3: Capture/Compare 3 DMA request 903 * @arg LPTIM_DMA_CC4: Capture/Compare 4 DMA request 904 * @retval None 905 */ 906 #define __HAL_LPTIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__)) 907 908 /** @brief Disable the specified DMA request. 909 * @param __HANDLE__ specifies the LPTIM Handle. 910 * @param __DMA__ specifies the LPTIM DMA request to disable. 911 * This parameter can be one of the following values: 912 * @arg LPTIM_DMA_UPDATE: Update DMA request 913 * @arg LPTIM_DMA_CC1: Capture/Compare 1 DMA request 914 * @arg LPTIM_DMA_CC2: Capture/Compare 2 DMA request 915 * @arg LPTIM_DMA_CC3: Capture/Compare 3 DMA request 916 * @arg LPTIM_DMA_CC4: Capture/Compare 4 DMA request 917 * @retval None 918 */ 919 #define __HAL_LPTIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__)) 920 921 /** 922 * @brief Check whether the specified LPTIM interrupt source is enabled or not. 923 * @param __HANDLE__ LPTIM handle. 924 * @param __INTERRUPT__ LPTIM interrupt to check. 925 * This parameter can be a value of: 926 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 927 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 928 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 929 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 930 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 931 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 932 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 933 * @arg LPTIM_IT_CMP3OK : Compare register 3 update OK Interrupt. 934 * @arg LPTIM_IT_CMP4OK : Compare register 4 update OK Interrupt. 935 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 936 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 937 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 938 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 939 * @arg LPTIM_IT_CC3 : Capture/Compare 3 interrupt Interrupt. 940 * @arg LPTIM_IT_CC4 : Capture/Compare 4 interrupt Interrupt. 941 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 942 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 943 * @arg LPTIM_IT_CC3O : Capture/Compare 3 over-capture Interrupt. 944 * @arg LPTIM_IT_CC4O : Capture/Compare 4 over-capture Interrupt. 945 * @retval Interrupt status. 946 */ 947 948 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER\ 949 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 950 951 /** 952 * @} 953 */ 954 955 /* Exported functions --------------------------------------------------------*/ 956 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions 957 * @{ 958 */ 959 960 /** @addtogroup LPTIM_Exported_Functions_Group1 961 * @brief Initialization and Configuration functions. 962 * @{ 963 */ 964 /* Initialization/de-initialization functions ********************************/ 965 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); 966 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); 967 968 /* MSP functions *************************************************************/ 969 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); 970 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); 971 /** 972 * @} 973 */ 974 975 /** @addtogroup LPTIM_Exported_Functions_Group2 976 * @brief Start-Stop operation functions. 977 * @{ 978 */ 979 /* Config functions **********************************************************/ 980 HAL_StatusTypeDef HAL_LPTIM_OC_ConfigChannel(LPTIM_HandleTypeDef *hlptim, const LPTIM_OC_ConfigTypeDef *sConfig, 981 uint32_t Channel); 982 983 /* Start/Stop operation functions *********************************************/ 984 /* ################################# PWM Mode ################################*/ 985 /* Blocking mode: Polling */ 986 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 987 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 988 /* Non-Blocking mode: Interrupt */ 989 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 990 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 991 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel, const uint32_t *pData, 992 uint32_t Length); 993 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 994 995 /* ############################# One Pulse Mode ##############################*/ 996 /* Blocking mode: Polling */ 997 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 998 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 999 /* Non-Blocking mode: Interrupt */ 1000 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1001 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1002 1003 /* ############################## Set once Mode ##############################*/ 1004 /* Blocking mode: Polling */ 1005 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1006 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1007 /* Non-Blocking mode: Interrupt */ 1008 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1009 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1010 1011 /* ############################### Encoder Mode ##############################*/ 1012 /* Blocking mode: Polling */ 1013 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim); 1014 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); 1015 /* Non-Blocking mode: Interrupt */ 1016 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim); 1017 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); 1018 1019 /* ############################# Time out Mode ##############################*/ 1020 /* Blocking mode: Polling */ 1021 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Timeout); 1022 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); 1023 /* Non-Blocking mode: Interrupt */ 1024 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Timeout); 1025 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); 1026 1027 /* ############################## Counter Mode ###############################*/ 1028 /* Blocking mode: Polling */ 1029 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim); 1030 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); 1031 /* Non-Blocking mode: Interrupt */ 1032 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim); 1033 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); 1034 1035 /* ############################## Input Capture Mode ###############################*/ 1036 /* Blocking mode: Polling */ 1037 HAL_StatusTypeDef HAL_LPTIM_IC_ConfigChannel(LPTIM_HandleTypeDef *hlptim, const LPTIM_IC_ConfigTypeDef *sConfig, 1038 uint32_t Channel); 1039 HAL_StatusTypeDef HAL_LPTIM_IC_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1040 HAL_StatusTypeDef HAL_LPTIM_IC_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1041 /* Non-Blocking mode: Interrupt */ 1042 HAL_StatusTypeDef HAL_LPTIM_IC_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1043 HAL_StatusTypeDef HAL_LPTIM_IC_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1044 HAL_StatusTypeDef HAL_LPTIM_IC_Start_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel, uint32_t *pData, 1045 uint32_t Length); 1046 HAL_StatusTypeDef HAL_LPTIM_IC_Stop_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1047 /** 1048 * @} 1049 */ 1050 1051 /** @addtogroup LPTIM_Exported_Functions_Group3 1052 * @brief Read operation functions. 1053 * @{ 1054 */ 1055 /* Reading operation functions ************************************************/ 1056 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim); 1057 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim); 1058 uint32_t HAL_LPTIM_ReadCapturedValue(const LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1059 uint8_t HAL_LPTIM_IC_GetOffset(const LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 1060 /** 1061 * @} 1062 */ 1063 1064 /** @addtogroup LPTIM_Exported_Functions_Group4 1065 * @brief LPTIM IRQ handler and callback functions. 1066 * @{ 1067 */ 1068 /* LPTIM IRQ functions *******************************************************/ 1069 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); 1070 1071 /* CallBack functions ********************************************************/ 1072 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); 1073 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); 1074 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); 1075 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); 1076 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); 1077 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); 1078 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); 1079 void HAL_LPTIM_ErrorCallback(LPTIM_HandleTypeDef *hlptim); 1080 void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim); 1081 void HAL_LPTIM_UpdateEventHalfCpltCallback(LPTIM_HandleTypeDef *hlptim); 1082 void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim); 1083 void HAL_LPTIM_IC_CaptureCallback(LPTIM_HandleTypeDef *hlptim); 1084 void HAL_LPTIM_IC_CaptureHalfCpltCallback(LPTIM_HandleTypeDef *hlptim); 1085 void HAL_LPTIM_IC_OverCaptureCallback(LPTIM_HandleTypeDef *hlptim); 1086 1087 /* Callbacks Register/UnRegister functions ***********************************/ 1088 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 1089 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID, 1090 pLPTIM_CallbackTypeDef pCallback); 1091 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID); 1092 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 1093 /** 1094 * @} 1095 */ 1096 1097 /** @addtogroup LPTIM_Group5 1098 * @brief Peripheral State functions. 1099 * @{ 1100 */ 1101 /* Peripheral State functions ************************************************/ 1102 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim); 1103 /** 1104 * @} 1105 */ 1106 1107 /** 1108 * @} 1109 */ 1110 1111 /* Private types -------------------------------------------------------------*/ 1112 /** @defgroup LPTIM_Private_Types LPTIM Private Types 1113 * @{ 1114 */ 1115 1116 /** 1117 * @} 1118 */ 1119 1120 /* Private variables ---------------------------------------------------------*/ 1121 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables 1122 * @{ 1123 */ 1124 1125 /** 1126 * @} 1127 */ 1128 1129 /* Private constants ---------------------------------------------------------*/ 1130 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants 1131 * @{ 1132 */ 1133 1134 /** 1135 * @} 1136 */ 1137 1138 /* Private macros ------------------------------------------------------------*/ 1139 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros 1140 * @{ 1141 */ 1142 1143 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ 1144 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) 1145 1146 1147 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ 1148 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ 1149 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ 1150 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ 1151 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ 1152 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ 1153 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ 1154 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) 1155 1156 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) 1157 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ 1158 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ 1159 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ 1160 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) 1161 1162 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ 1163 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ 1164 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) 1165 1166 #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ 1167 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \ 1168 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \ 1169 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \ 1170 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \ 1171 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \ 1172 ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \ 1173 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \ 1174 ((__TRIG__) == LPTIM_TRIGSOURCE_7)) 1175 1176 #define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \ 1177 ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \ 1178 ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) 1179 1180 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \ 1181 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ 1182 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ 1183 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) 1184 1185 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ 1186 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) 1187 1188 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ 1189 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) 1190 1191 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL) 1192 1193 #define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\ 1194 ((__PERIOD__) <= 0x0000FFFFUL)) 1195 1196 #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL) 1197 1198 #define IS_LPTIM_OC_POLARITY(__OCPOLARITY__) (((__OCPOLARITY__) == LPTIM_OCPOLARITY_LOW) || \ 1199 ((__OCPOLARITY__) == LPTIM_OCPOLARITY_HIGH)) 1200 #define IS_LPTIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_ICPSC_DIV1) ||\ 1201 ((__PRESCALER__) == LPTIM_ICPSC_DIV2) ||\ 1202 ((__PRESCALER__) == LPTIM_ICPSC_DIV4) ||\ 1203 ((__PRESCALER__) == LPTIM_ICPSC_DIV8)) 1204 1205 #define IS_LPTIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ICPOLARITY_RISING) || \ 1206 ((__POLARITY__) == LPTIM_ICPOLARITY_FALLING) ||\ 1207 ((__POLARITY__) == LPTIM_ICPOLARITY_RISING_FALLING)) 1208 1209 #define IS_LPTIM_IC_FILTER(__FILTER__) (((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV1) ||\ 1210 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV2) ||\ 1211 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV4) ||\ 1212 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV8)) 1213 1214 #define IS_LPTIM_REPETITION(__REPETITION__) ((__REPETITION__) <= 0x000000FFUL) 1215 1216 #if defined(LPTIM3) 1217 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1218 ((((__INSTANCE__) == LPTIM1) && \ 1219 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1220 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) \ 1221 || \ 1222 (((__INSTANCE__) == LPTIM2) && \ 1223 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1224 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1) || \ 1225 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP2) || \ 1226 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1_COMP2))) \ 1227 || \ 1228 (((__INSTANCE__) == LPTIM3) && \ 1229 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1230 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1)))) 1231 #else 1232 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1233 ((((__INSTANCE__) == LPTIM1) && \ 1234 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1235 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) \ 1236 || \ 1237 (((__INSTANCE__) == LPTIM2) && \ 1238 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1239 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1)))) 1240 #endif /* LPTIM3 */ 1241 1242 #if defined(LPTIM3) 1243 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1244 ((((__INSTANCE__) == LPTIM1) || \ 1245 ((__INSTANCE__) == LPTIM3)) && \ 1246 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) || \ 1247 ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2))) 1248 #else 1249 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1250 (((__INSTANCE__) == LPTIM1) && \ 1251 ((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO)) 1252 #endif /* LPTIM3 */ 1253 1254 #if defined(LPTIM3) 1255 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1256 ((((__INSTANCE__) == LPTIM1) || \ 1257 ((__INSTANCE__) == LPTIM2) || \ 1258 ((__INSTANCE__) == LPTIM3)) && \ 1259 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO) || \ 1260 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP1) || \ 1261 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP2))) 1262 1263 #define IS_LPTIM_IC2_SOURCE(__INSTANCE__, __SOURCE__) \ 1264 ((((__INSTANCE__) == LPTIM1) || \ 1265 ((__INSTANCE__) == LPTIM2) || \ 1266 ((__INSTANCE__) == LPTIM3)) && \ 1267 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1268 ((__SOURCE__) == LPTIM_IC2SOURCE_MCO1) || \ 1269 ((__SOURCE__) == LPTIM_IC2SOURCE_MCO2))) 1270 1271 #define IS_LPTIM_IC3_SOURCE(__INSTANCE__, __SOURCE__) \ 1272 ((((__INSTANCE__) == LPTIM1) || \ 1273 ((__INSTANCE__) == LPTIM3)) && \ 1274 (((__SOURCE__) == LPTIM_IC3SOURCE_GPIO) || \ 1275 ((__SOURCE__) == LPTIM_IC3SOURCE_COMP1) || \ 1276 ((__SOURCE__) == LPTIM_IC3SOURCE_COMP2))) 1277 1278 #define IS_LPTIM_IC4_SOURCE(__INSTANCE__, __SOURCE__) \ 1279 ((((__INSTANCE__) == LPTIM1) || \ 1280 ((__INSTANCE__) == LPTIM3)) && \ 1281 (((__SOURCE__) == LPTIM_IC4SOURCE_GPIO) || \ 1282 ((__SOURCE__) == LPTIM_IC4SOURCE_COMP1) || \ 1283 ((__SOURCE__) == LPTIM_IC4SOURCE_COMP2))) 1284 #else 1285 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1286 ((((__INSTANCE__) == LPTIM1) || \ 1287 ((__INSTANCE__) == LPTIM2)) && \ 1288 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO) || \ 1289 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP1))) 1290 1291 #define IS_LPTIM_IC2_SOURCE(__INSTANCE__, __SOURCE__) \ 1292 ((((__INSTANCE__) == LPTIM1) || \ 1293 ((__INSTANCE__) == LPTIM2)) && \ 1294 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1295 ((__SOURCE__) == LPTIM_IC2SOURCE_MCO1) || \ 1296 ((__SOURCE__) == LPTIM_IC2SOURCE_MCO2))) 1297 1298 #define IS_LPTIM_IC3_SOURCE(__INSTANCE__, __SOURCE__) \ 1299 (((__INSTANCE__) == LPTIM1) && \ 1300 (((__SOURCE__) == LPTIM_IC3SOURCE_GPIO) || \ 1301 ((__SOURCE__) == LPTIM_IC3SOURCE_COMP1))) 1302 1303 #define IS_LPTIM_IC4_SOURCE(__INSTANCE__, __SOURCE__) \ 1304 (((__INSTANCE__) == LPTIM1) && \ 1305 (((__SOURCE__) == LPTIM_IC4SOURCE_GPIO) || \ 1306 ((__SOURCE__) == LPTIM_IC4SOURCE_COMP1))) 1307 #endif /* LPTIM3 */ 1308 1309 #define LPTIM_CHANNEL_STATE_GET(__INSTANCE__, __CHANNEL__)\ 1310 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? (__INSTANCE__)->ChannelState[0] :\ 1311 ((__CHANNEL__) == LPTIM_CHANNEL_2) ? (__INSTANCE__)->ChannelState[1] :\ 1312 ((__CHANNEL__) == LPTIM_CHANNEL_3) ? (__INSTANCE__)->ChannelState[2] :\ 1313 (__INSTANCE__)->ChannelState[3]) 1314 1315 #define LPTIM_CHANNEL_STATE_SET(__INSTANCE__, __CHANNEL__, __CHANNEL_STATE__) \ 1316 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? ((__INSTANCE__)->ChannelState[0] = (__CHANNEL_STATE__)) :\ 1317 ((__CHANNEL__) == LPTIM_CHANNEL_2) ? ((__INSTANCE__)->ChannelState[1] = (__CHANNEL_STATE__)) :\ 1318 ((__CHANNEL__) == LPTIM_CHANNEL_3) ? ((__INSTANCE__)->ChannelState[2] = (__CHANNEL_STATE__)) :\ 1319 ((__INSTANCE__)->ChannelState[3] = (__CHANNEL_STATE__))) 1320 1321 #define LPTIM_CHANNEL_STATE_SET_ALL(__INSTANCE__, __CHANNEL_STATE__) do { \ 1322 (__INSTANCE__)->ChannelState[0] = (__CHANNEL_STATE__); \ 1323 (__INSTANCE__)->ChannelState[1] = (__CHANNEL_STATE__); \ 1324 (__INSTANCE__)->ChannelState[2] = (__CHANNEL_STATE__); \ 1325 (__INSTANCE__)->ChannelState[3] = (__CHANNEL_STATE__); \ 1326 } while(0) 1327 1328 #if defined(LPTIM3) 1329 #define IS_LPTIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) \ 1330 ((((__INSTANCE__) == LPTIM1) && \ 1331 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1332 ((__CHANNEL__) == LPTIM_CHANNEL_2) || \ 1333 ((__CHANNEL__) == LPTIM_CHANNEL_3) || \ 1334 ((__CHANNEL__) == LPTIM_CHANNEL_4))) \ 1335 || \ 1336 (((__INSTANCE__) == LPTIM2) && \ 1337 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1338 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1339 || \ 1340 (((__INSTANCE__) == LPTIM3) && \ 1341 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1342 ((__CHANNEL__) == LPTIM_CHANNEL_2) || \ 1343 ((__CHANNEL__) == LPTIM_CHANNEL_3) || \ 1344 ((__CHANNEL__) == LPTIM_CHANNEL_4)))) 1345 #else 1346 #define IS_LPTIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) \ 1347 ((((__INSTANCE__) == LPTIM1) && \ 1348 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1349 ((__CHANNEL__) == LPTIM_CHANNEL_2) || \ 1350 ((__CHANNEL__) == LPTIM_CHANNEL_3) || \ 1351 ((__CHANNEL__) == LPTIM_CHANNEL_4))) \ 1352 || \ 1353 (((__INSTANCE__) == LPTIM2) && \ 1354 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1355 ((__CHANNEL__) == LPTIM_CHANNEL_2)))) 1356 #endif /* LPTIM3 */ 1357 /** 1358 * @} 1359 */ 1360 1361 /* Private functions ---------------------------------------------------------*/ 1362 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 1363 * @{ 1364 */ 1365 /** 1366 * @} 1367 */ 1368 1369 /** 1370 * @} 1371 */ 1372 1373 #endif /* LPTIM1 || LPTIM2 || LPTIM3 */ 1374 /** 1375 * @} 1376 */ 1377 1378 #ifdef __cplusplus 1379 } 1380 #endif 1381 1382 #endif /* STM32U0xx_HAL_LPTIM_H */ 1383
