Searched defs:LPFLLDIV (Results 1 – 13 of 13) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/ |
| D | MKE15Z4.h | 9639 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/ |
| D | MKE14Z4.h | 9637 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/ |
| D | MKE16Z4.h | 10476 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/ |
| D | MKE12Z7.h | 12154 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/ |
| D | MKE12Z9.h | 12052 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/ |
| D | MKE17Z7.h | 12160 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/ |
| D | MKE13Z7.h | 12157 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/ |
| D | MKE14Z7.h | 12417 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/ |
| D | MKE17Z9.h | 12056 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/ |
| D | MKE15Z7.h | 12420 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/ |
| D | MKE13Z9.h | 12054 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/ |
| D | K32L3A60_cm4.h | 17166 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|
| D | K32L3A60_cm0plus.h | 17276 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
|