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Searched defs:LPDDR_CTRL2 (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/
DMIMX8UD7_dsp1.h108369 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member
DMIMX8UD7_dsp0.h109066 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member
DMIMX8UD7_cm33.h110901 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/
DMIMX8UD3_cm33.h110901 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member
DMIMX8UD3_dsp0.h109066 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/
DMIMX8UD5_cm33.h109293 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member
DMIMX8UD5_dsp0.h107479 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/
DMIMX8US5_dsp0.h107479 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member
DMIMX8US5_cm33.h109293 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/
DMIMX8US3_dsp0.h109066 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member
DMIMX8US3_cm33.h110901 __IO uint32_t LPDDR_CTRL2; /**< LPDDR Control Register, offset: 0x18 */ member