Home
last modified time | relevance | path

Searched defs:LPCMP_RRCR0_RR_CLK_SEL_MASK (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h17072 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h17072 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h17072 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h17072 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h23288 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h23288 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h23288 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h23292 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h23292 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h23292 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h36505 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h36475 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h46696 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
DMCXN546_cm33_core1.h46696 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h46696 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
DMCXN547_cm33_core1.h46696 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h47153 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
DMCXN947_cm33_core0.h47153 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h47153 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro
DMCXN946_cm33_core1.h47153 #define LPCMP_RRCR0_RR_CLK_SEL_MASK (0x3000U) macro