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Searched defs:LMEM_PCCSAR_PHYADDR_MASK (Results 1 – 25 of 54) sorted by relevance

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/hal_nxp-3.6.0/s32/drivers/s32k1/BaseNXP/header/
DS32K142_LMEM.h209 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
DS32K146_LMEM.h209 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
DS32K144W_LMEM.h209 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
DS32K144_LMEM.h209 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
DS32K116_LMEM.h209 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
DS32K118_LMEM.h209 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
DS32K142W_LMEM.h209 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
DS32K148_LMEM.h209 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h8307 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h9306 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h9311 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h14924 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h14918 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h17044 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h14363 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h14365 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h18861 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h18861 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h11938 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFF8U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h11939 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFF8U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h38562 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h38562 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h38562 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h38562 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h38562 #define LMEM_PCCSAR_PHYADDR_MASK (0xFFFFFFFCU) macro

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