1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * o Redistributions of source code must retain the above copyright notice, this list
9 * of conditions and the following disclaimer.
10 *
11 * o Redistributions in binary form must reproduce the above copyright notice, this
12 * list of conditions and the following disclaimer in the documentation and/or
13 * other materials provided with the distribution.
14 *
15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #include "lmem.h"
32
33 /*******************************************************************************
34 * Definitions
35 ******************************************************************************/
36 #define LMEM_CACHE_LINE_SIZE 32
37
38 /*******************************************************************************
39 * Code
40 ******************************************************************************/
41
42 /*******************************************************************************
43 * System Cache control functions
44 ******************************************************************************/
45 /*FUNCTION**********************************************************************
46 *
47 * Function Name : LMEM_EnableSystemCache
48 * Description : This function enable the System Cache.
49 *
50 *END**************************************************************************/
LMEM_EnableSystemCache(LMEM_Type * base)51 void LMEM_EnableSystemCache(LMEM_Type *base)
52 {
53 /* set command to invalidate all ways */
54 /* and write GO bit to initiate command */
55 LMEM_PSCCR_REG(base) = LMEM_PSCCR_INVW1_MASK | LMEM_PSCCR_INVW0_MASK;
56 LMEM_PSCCR_REG(base) |= LMEM_PSCCR_GO_MASK;
57
58 /* wait until the command completes */
59 while (LMEM_PSCCR_REG(base) & LMEM_PSCCR_GO_MASK);
60
61 /* Enable cache, enable write buffer */
62 LMEM_PSCCR_REG(base) = (LMEM_PSCCR_ENWRBUF_MASK | LMEM_PSCCR_ENCACHE_MASK);
63 __ISB();
64 __DSB();
65 }
66
67 /*FUNCTION**********************************************************************
68 *
69 * Function Name : LMEM_DisableSystemCache
70 * Description : This function disable the System Cache.
71 *
72 *END**************************************************************************/
LMEM_DisableSystemCache(LMEM_Type * base)73 void LMEM_DisableSystemCache(LMEM_Type *base)
74 {
75 LMEM_PSCCR_REG(base) = 0x0;
76 __ISB();
77 __DSB();
78 }
79
80 /*FUNCTION**********************************************************************
81 *
82 * Function Name : LMEM_FlushSystemCache
83 * Description : This function flush the System Cache.
84 *
85 *END**************************************************************************/
LMEM_FlushSystemCache(LMEM_Type * base)86 void LMEM_FlushSystemCache(LMEM_Type *base)
87 {
88 LMEM_PSCCR_REG(base) |= LMEM_PSCCR_PUSHW0_MASK | LMEM_PSCCR_PUSHW1_MASK ;
89 LMEM_PSCCR_REG(base) |= LMEM_PSCCR_GO_MASK;
90
91 /* wait until the command completes */
92 while (LMEM_PSCCR_REG(base) & LMEM_PSCCR_GO_MASK);
93 }
94
95 /*FUNCTION**********************************************************************
96 *
97 * Function Name : LMEM_FlushSystemCacheLine
98 * Description : This function is called to push a line out of the System Cache.
99 *
100 *END**************************************************************************/
LMEM_FlushSystemCacheLine(LMEM_Type * base,void * address)101 static void LMEM_FlushSystemCacheLine(LMEM_Type *base, void *address)
102 {
103 assert((uint32_t)address >= 0x20000000);
104
105 /* Invalidate by physical address */
106 LMEM_PSCLCR_REG(base) = LMEM_PSCLCR_LADSEL_MASK | LMEM_PSCLCR_LCMD(2);
107 /* Set physical address and activate command */
108 LMEM_PSCSAR_REG(base) = ((uint32_t)address & LMEM_PSCSAR_PHYADDR_MASK) | LMEM_PSCSAR_LGO_MASK;
109
110 /* wait until the command completes */
111 while (LMEM_PSCSAR_REG(base) & LMEM_PSCSAR_LGO_MASK);
112 }
113
114 /*FUNCTION**********************************************************************
115 *
116 * Function Name : LMEM_FlushSystemCacheLines
117 * Description : This function is called to flush the System Cache by
118 * performing cache copy-backs. It must determine how
119 * many cache lines need to be copied back and then
120 * perform the copy-backs.
121 *
122 *END**************************************************************************/
LMEM_FlushSystemCacheLines(LMEM_Type * base,void * address,uint32_t length)123 void LMEM_FlushSystemCacheLines(LMEM_Type *base, void *address, uint32_t length)
124 {
125 void *endAddress = (void *)((uint32_t)address + length);
126
127 address = (void *) ((uint32_t)address & ~(LMEM_CACHE_LINE_SIZE - 1));
128 do
129 {
130 LMEM_FlushSystemCacheLine(base, address);
131 address = (void *) ((uint32_t)address + LMEM_CACHE_LINE_SIZE);
132 } while (address < endAddress);
133 }
134
135 /*FUNCTION**********************************************************************
136 *
137 * Function Name : LMEM_InvalidateSystemCache
138 * Description : This function invalidate the System Cache.
139 *
140 *END**************************************************************************/
LMEM_InvalidateSystemCache(LMEM_Type * base)141 void LMEM_InvalidateSystemCache(LMEM_Type *base)
142 {
143 LMEM_PSCCR_REG(base) |= LMEM_PSCCR_INVW0_MASK | LMEM_PSCCR_INVW1_MASK;
144 LMEM_PSCCR_REG(base) |= LMEM_PSCCR_GO_MASK;
145
146 /* wait until the command completes */
147 while (LMEM_PSCCR_REG(base) & LMEM_PSCCR_GO_MASK);
148 __ISB();
149 __DSB();
150 }
151
152 /*FUNCTION**********************************************************************
153 *
154 * Function Name : LMEM_InvalidateSystemCacheLine
155 * Description : This function is called to invalidate a line out of
156 * the System Cache.
157 *
158 *END**************************************************************************/
LMEM_InvalidateSystemCacheLine(LMEM_Type * base,void * address)159 static void LMEM_InvalidateSystemCacheLine(LMEM_Type *base, void *address)
160 {
161 assert((uint32_t)address >= 0x20000000);
162
163 /* Invalidate by physical address */
164 LMEM_PSCLCR_REG(base) = LMEM_PSCLCR_LADSEL_MASK | LMEM_PSCLCR_LCMD(1);
165 /* Set physical address and activate command */
166 LMEM_PSCSAR_REG(base) = ((uint32_t)address & LMEM_PSCSAR_PHYADDR_MASK) | LMEM_PSCSAR_LGO_MASK;
167
168 /* wait until the command completes */
169 while (LMEM_PSCSAR_REG(base) & LMEM_PSCSAR_LGO_MASK);
170 }
171
172 /*FUNCTION**********************************************************************
173 *
174 * Function Name : LMEM_InvalidateSystemCacheLines
175 * Description : This function is responsible for performing an data
176 * cache invalidate. It must determine how many cache
177 * lines need to be invalidated and then perform the
178 * invalidation.
179 *
180 *END**************************************************************************/
LMEM_InvalidateSystemCacheLines(LMEM_Type * base,void * address,uint32_t length)181 void LMEM_InvalidateSystemCacheLines(LMEM_Type *base, void *address, uint32_t length)
182 {
183 void *endAddress = (void *)((uint32_t)address + length);
184 address = (void *)((uint32_t)address & ~(LMEM_CACHE_LINE_SIZE - 1));
185
186 do
187 {
188 LMEM_InvalidateSystemCacheLine(base, address);
189 address = (void *)((uint32_t)address + LMEM_CACHE_LINE_SIZE);
190 } while (address < endAddress);
191 __ISB();
192 __DSB();
193 }
194
195 /*FUNCTION**********************************************************************
196 *
197 * Function Name : LMEM_EnableCodeCache
198 * Description : This function enable the Code Cache.
199 *
200 *END**************************************************************************/
LMEM_EnableCodeCache(LMEM_Type * base)201 void LMEM_EnableCodeCache(LMEM_Type *base)
202 {
203 /* set command to invalidate all ways, enable write buffer */
204 /* and write GO bit to initiate command */
205 LMEM_PCCCR_REG(base) = LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK;
206 LMEM_PCCCR_REG(base) |= LMEM_PCCCR_GO_MASK;
207
208 /* wait until the command completes */
209 while (LMEM_PCCCR_REG(base) & LMEM_PCCCR_GO_MASK);
210
211 /* Enable cache, enable write buffer */
212 LMEM_PCCCR_REG(base) = (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK);
213 __ISB();
214 __DSB();
215 }
216
217 /*FUNCTION**********************************************************************
218 *
219 * Function Name : LMEM_DisableCodeCache
220 * Description : This function disable the Code Cache.
221 *
222 *END**************************************************************************/
LMEM_DisableCodeCache(LMEM_Type * base)223 void LMEM_DisableCodeCache(LMEM_Type *base)
224 {
225 LMEM_PCCCR_REG(base) = 0x0;
226 __ISB();
227 __DSB();
228 }
229
230 /*FUNCTION**********************************************************************
231 *
232 * Function Name : LMEM_FlushCodeCache
233 * Description : This function flush the Code Cache.
234 *
235 *END**************************************************************************/
LMEM_FlushCodeCache(LMEM_Type * base)236 void LMEM_FlushCodeCache(LMEM_Type *base)
237 {
238 LMEM_PCCCR_REG(base) |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK;
239 LMEM_PCCCR_REG(base) |= LMEM_PCCCR_GO_MASK;
240
241 /* wait until the command completes */
242 while (LMEM_PCCCR_REG(base) & LMEM_PCCCR_GO_MASK);
243 }
244
245 /*FUNCTION**********************************************************************
246 *
247 * Function Name : LMEM_FlushCodeCacheLine
248 * Description : This function is called to push a line out of the
249 * Code Cache.
250 *
251 *END**************************************************************************/
LMEM_FlushCodeCacheLine(LMEM_Type * base,void * address)252 static void LMEM_FlushCodeCacheLine(LMEM_Type *base, void *address)
253 {
254 assert((uint32_t)address < 0x20000000);
255
256 /* Invalidate by physical address */
257 LMEM_PCCLCR_REG(base) = LMEM_PCCLCR_LADSEL_MASK | LMEM_PCCLCR_LCMD(2);
258 /* Set physical address and activate command */
259 LMEM_PCCSAR_REG(base) = ((uint32_t)address & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK;
260
261 /* wait until the command completes */
262 while (LMEM_PCCSAR_REG(base) & LMEM_PCCSAR_LGO_MASK);
263 }
264
265 /*FUNCTION**********************************************************************
266 *
267 * Function Name : LMEM_FlushCodeCacheLines
268 * Description : This function is called to flush the instruction
269 * cache by performing cache copy-backs. It must
270 * determine how many cache lines need to be copied
271 * back and then perform the copy-backs.
272 *
273 *END**************************************************************************/
LMEM_FlushCodeCacheLines(LMEM_Type * base,void * address,uint32_t length)274 void LMEM_FlushCodeCacheLines(LMEM_Type *base, void *address, uint32_t length)
275 {
276 void *endAddress = (void *)((uint32_t)address + length);
277
278 address = (void *) ((uint32_t)address & ~(LMEM_CACHE_LINE_SIZE - 1));
279 do
280 {
281 LMEM_FlushCodeCacheLine(base, address);
282 address = (void *)((uint32_t)address + LMEM_CACHE_LINE_SIZE);
283 } while (address < endAddress);
284 }
285
286 /*FUNCTION**********************************************************************
287 *
288 * Function Name : LMEM_InvalidateCodeCache
289 * Description : This function invalidate the Code Cache.
290 *
291 *END**************************************************************************/
LMEM_InvalidateCodeCache(LMEM_Type * base)292 void LMEM_InvalidateCodeCache(LMEM_Type *base)
293 {
294 LMEM_PCCCR_REG(base) |= LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK;
295 LMEM_PCCCR_REG(base) |= LMEM_PCCCR_GO_MASK;
296
297 /* wait until the command completes */
298 while (LMEM_PCCCR_REG(base) & LMEM_PCCCR_GO_MASK);
299 __ISB();
300 __DSB();
301 }
302
303 /*FUNCTION**********************************************************************
304 *
305 * Function Name : LMEM_InvalidateCodeCacheLine
306 * Description : This function is called to invalidate a line out
307 * of the Code Cache.
308 *
309 *END**************************************************************************/
LMEM_InvalidateCodeCacheLine(LMEM_Type * base,void * address)310 static void LMEM_InvalidateCodeCacheLine(LMEM_Type *base, void *address)
311 {
312 assert((uint32_t)address < 0x20000000);
313
314 /* Invalidate by physical address */
315 LMEM_PCCLCR_REG(base) = LMEM_PCCLCR_LADSEL_MASK | LMEM_PCCLCR_LCMD(1);
316 /* Set physical address and activate command */
317 LMEM_PCCSAR_REG(base) = ((uint32_t)address & LMEM_PCCSAR_PHYADDR_MASK) | LMEM_PCCSAR_LGO_MASK;
318
319 /* wait until the command completes */
320 while (LMEM_PCCSAR_REG(base) & LMEM_PCCSAR_LGO_MASK);
321 }
322
323 /*FUNCTION**********************************************************************
324 *
325 * Function Name : LMEM_InvalidateCodeCacheLines
326 * Description : This function is responsible for performing an
327 * Code Cache invalidate. It must determine
328 * how many cache lines need to be invalidated and then
329 * perform the invalidation.
330 *
331 *END**************************************************************************/
LMEM_InvalidateCodeCacheLines(LMEM_Type * base,void * address,uint32_t length)332 void LMEM_InvalidateCodeCacheLines(LMEM_Type *base, void *address, uint32_t length)
333 {
334 void *endAddress = (void *)((uint32_t)address + length);
335 address = (void *)((uint32_t)address & ~(LMEM_CACHE_LINE_SIZE - 1));
336
337 do
338 {
339 LMEM_InvalidateCodeCacheLine(base, address);
340 address = (void *)((uint32_t)address + LMEM_CACHE_LINE_SIZE);
341 } while (address < endAddress);
342 __ISB();
343 __DSB();
344 }
345
346 /*******************************************************************************
347 * EOF
348 ******************************************************************************/
349