1 /**
2 ******************************************************************************
3 * @file stm32h5xx_ll_utils.h
4 * @author MCD Application Team
5 * @brief Header file of UTILS LL module.
6 @verbatim
7 ==============================================================================
8 ##### How to use this driver #####
9 ==============================================================================
10 [..]
11 The LL UTILS driver contains a set of generic APIs that can be
12 used by user:
13 (+) Device electronic signature
14 (+) Timing functions
15 (+) PLL configuration functions
16
17 @endverbatim
18 ******************************************************************************
19 * @attention
20 *
21 * Copyright (c) 2023 STMicroelectronics.
22 * All rights reserved.
23 *
24 * This software is licensed under terms that can be found in the LICENSE file
25 * in the root directory of this software component.
26 * If no LICENSE file comes with this software, it is provided AS-IS.
27 *
28 ******************************************************************************
29 */
30
31 /* Define to prevent recursive inclusion -------------------------------------*/
32 #ifndef __STM32H5xx_LL_UTILS_H
33 #define __STM32H5xx_LL_UTILS_H
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 /* Includes ------------------------------------------------------------------*/
40 #include "stm32h5xx.h"
41
42 /** @addtogroup STM32H5xx_LL_Driver
43 * @{
44 */
45
46 /** @defgroup UTILS_LL UTILS
47 * @{
48 */
49
50 /* Private types -------------------------------------------------------------*/
51 /* Private variables ---------------------------------------------------------*/
52
53 /* Private constants ---------------------------------------------------------*/
54 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
55 * @{
56 */
57
58 /* Max delay can be used in LL_mDelay */
59 #define LL_MAX_DELAY 0xFFFFFFFFU
60
61 /**
62 * @brief Unique device ID register base address
63 */
64 #define UID_BASE_ADDRESS UID_BASE
65
66 /**
67 * @brief Flash size data register base address
68 */
69 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
70
71 /**
72 * @brief Package data register base address
73 */
74 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE
75
76 /**
77 * @}
78 */
79
80 /* Private macros ------------------------------------------------------------*/
81 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
82 * @{
83 */
84 /**
85 * @}
86 */
87 /* Exported types ------------------------------------------------------------*/
88 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
89 * @{
90 */
91
92 /**
93 * @brief UTILS PLL structure definition
94 */
95 typedef struct
96 {
97 uint32_t PLLM; /*!< Division factor for PLL VCO input clock.
98 This parameter must be a number between Min_Data = 1 and Max_Data = 63
99
100 This feature can be modified afterwards using unitary function
101 @ref LL_RCC_PLL1_SetM(). */
102
103 uint32_t PLLN; /*!< Multiplication factor for PLL VCO output clock.
104 This parameter must be a number between Min_Data = 4 and Max_Data = 512
105
106 This feature can be modified afterwards using unitary function
107 @ref LL_RCC_PLL1_SetN(). */
108
109 uint32_t PLLP; /*!< Division for the main system clock.
110 This parameter must be a number between Min_Data = 2 and Max_Data = 128
111 odd division factors are not allowed
112
113 This feature can be modified afterwards using unitary function
114 @ref LL_RCC_PLL1_SetP(). */
115
116 uint32_t FRACN; /*!< Fractional part of the multiplication factor for PLL VCO.
117 This parameter can be a value between 0 and 8191
118
119 This feature can be modified afterwards using unitary function
120 @ref LL_RCC_PLL1_SetFRACN(). */
121
122 uint32_t VCO_Input; /*!< PLL clock Input range.
123 This parameter can be a value of @ref RCC_LL_EC_PLLINPUTRANGE
124
125 This feature can be modified afterwards using unitary function
126 @ref LL_RCC_PLL1_SetVCOInputRange(). */
127
128 uint32_t VCO_Output; /*!< PLL clock Output range.
129 This parameter can be a value of @ref RCC_LL_EC_PLLOUTPUTRANGE
130
131 This feature can be modified afterwards using unitary function
132 @ref LL_RCC_PLL1_SetVCOOutputRange(). */
133
134 } LL_UTILS_PLLInitTypeDef;
135
136 /**
137 * @brief UTILS System, AHB and APB buses clock configuration structure definition
138 */
139 typedef struct
140 {
141 uint32_t SYSCLKDivider; /*!< The System clock (SYSCLK) divider. This clock is derived from the System clock.
142 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
143
144 This feature can be modified afterwards using unitary function
145 @ref LL_RCC_SetAHBPrescaler(). */
146
147 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
148 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
149
150 This feature can be modified afterwards using unitary function
151 @ref LL_RCC_SetAPB1Prescaler(). */
152
153 uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
154 This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
155
156 This feature can be modified afterwards using unitary function
157 @ref LL_RCC_SetAPB2Prescaler(). */
158
159 uint32_t APB3CLKDivider; /*!< The APB3 clock (PCLK3) divider. This clock is derived from the AHB clock (HCLK).
160 This parameter can be a value of @ref RCC_LL_EC_APB3_DIV
161
162 This feature can be modified afterwards using unitary function
163 @ref LL_RCC_SetAPB3Prescaler(). */
164
165 } LL_UTILS_ClkInitTypeDef;
166
167 /**
168 * @}
169 */
170
171 /* Exported constants --------------------------------------------------------*/
172 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
173 * @{
174 */
175
176 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
177 * @{
178 */
179 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
180 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass Analog is enabled */
181 #define LL_UTILS_HSEBYPASS_DIGITAL_ON 0x00000002U /*!< HSE Bypass Digital is enabled */
182 /**
183 * @}
184 */
185
186 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
187 * @{
188 */
189 #define LL_UTILS_PACKAGETYPE_LQFP64 0x00000000U /*!< LQFP64 package type */
190 #define LL_UTILS_PACKAGETYPE_VFQFPN68 0x00000001U /*!< VFQFPN68 package type */
191 #define LL_UTILS_PACKAGETYPE_LQFP100 0x00000002U /*!< LQFP100 package type */
192 #define LL_UTILS_PACKAGETYPE_UFBGA176 0x00000003U /*!< UFBGA176+25 package type */
193 #define LL_UTILS_PACKAGETYPE_LQFP144 0x00000004U /*!< LQFP144 package type */
194 #define LL_UTILS_PACKAGETYPE_LQFP48 0x00000005U /*!< LQFP48 package type */
195 #define LL_UTILS_PACKAGETYPE_UFBGA169 0x00000006U /*!< UFBGA169 package type */
196 #define LL_UTILS_PACKAGETYPE_LQFP176 0x00000007U /*!< LQFP176 package type */
197 #define LL_UTILS_PACKAGETYPE_UFQFPN32 0x00000009U /*!< UFQFPN32 package type */
198 #define LL_UTILS_PACKAGETYPE_LQFP100_SMPS 0x0000000AU /*!< LQFP100 with internal SMPS package type */
199 #define LL_UTILS_PACKAGETYPE_UFBGA176_SMPS 0x0000000BU /*!< UFBGA176+25 with internal SMPS package type */
200 #define LL_UTILS_PACKAGETYPE_LQFP144_SMPS 0x0000000CU /*!< LQFP144 with internal SMPS package type */
201 #define LL_UTILS_PACKAGETYPE_LQFP176_SMPS 0x0000000DU /*!< LQFP176 with internal SMPS package type */
202 #define LL_UTILS_PACKAGETYPE_UFBGA169_SMPS 0x0000000EU /*!< UFBGA169 with internal SMPS package type */
203 #define LL_UTILS_PACKAGETYPE_WLCSP25 0x0000000FU /*!< WLCSP25 package type */
204 #define LL_UTILS_PACKAGETYPE_UFQFPN48 0x00000010U /*!< UFQFPN48 package type */
205 #define LL_UTILS_PACKAGETYPE_WLCSP39 0x00000011U /*!< WLCSP39 package type */
206 #define LL_UTILS_PACKAGETYPE_UFBGA100 0x00000014U /*!< UFBGA100 package type */
207 #define LL_UTILS_PACKAGETYPE_UFBGA144 0x00000015U /*!< UFBGA144 package type */
208 /**
209 * @}
210 */
211
212 /**
213 * @}
214 */
215
216 /* Exported macro ------------------------------------------------------------*/
217
218 /* Exported functions --------------------------------------------------------*/
219 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
220 * @{
221 */
222
223 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
224 * @{
225 */
226
227 /**
228 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
229 * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format
230 */
LL_GetUID_Word0(void)231 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
232 {
233 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
234 }
235
236 /**
237 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
238 * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40])
239 */
LL_GetUID_Word1(void)240 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
241 {
242 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
243 }
244
245 /**
246 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
247 * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24]
248 */
LL_GetUID_Word2(void)249 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
250 {
251 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
252 }
253
254 /**
255 * @brief Get Flash memory size
256 * @note This bitfield indicates the size of the device Flash memory expressed in
257 * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
258 * @retval FLASH_SIZE[15:0]: Flash memory size
259 */
LL_GetFlashSize(void)260 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
261 {
262 return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0xFFFFU);
263 }
264
265 /**
266 * @brief Get Package type
267 * @retval Returned value can be one of the following values:
268 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP64
269 * @arg @ref LL_UTILS_PACKAGETYPE_VFQFPN68
270 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100
271 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA176
272 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144
273 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP48
274 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA169
275 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP176
276 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN32
277 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100_SMPS
278 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA176_SMPS
279 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_SMPS
280 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP176_SMPS
281 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA169_SMPS
282 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP25
283 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN48
284 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP39
285 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA100
286 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA144
287 * @note Refer to product datasheet for availability of package on a specific device
288 */
LL_GetPackageType(void)289 __STATIC_INLINE uint32_t LL_GetPackageType(void)
290 {
291 return (uint32_t)(READ_REG(*((uint16_t *)PACKAGE_BASE_ADDRESS)));
292 }
293
294 /**
295 * @}
296 */
297
298 /** @defgroup UTILS_LL_EF_DELAY DELAY
299 * @{
300 */
301
302 /**
303 * @brief This function configures the Cortex-M SysTick source of the time base.
304 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
305 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
306 * configuration by calling this function, for a delay use rather osDelay RTOS service.
307 * @param Ticks Number of ticks
308 * @retval None
309 */
LL_InitTick(uint32_t HCLKFrequency,uint32_t Ticks)310 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
311 {
312 /* Configure the SysTick to have interrupt in 1ms time base */
313 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
314 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
315 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
316 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
317 }
318
319 void LL_Init1msTick(uint32_t HCLKFrequency);
320 void LL_Init1msTick_HCLK_Div8(uint32_t HCLKFrequency);
321 void LL_Init1msTick_LSE(void);
322 void LL_Init1msTick_LSI(void);
323 void LL_mDelay(uint32_t Delay);
324
325 /**
326 * @}
327 */
328
329 /** @defgroup UTILS_EF_SYSTEM SYSTEM
330 * @{
331 */
332
333 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
334 ErrorStatus LL_PLL_ConfigSystemClock_CSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
335 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
336 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
337 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
338 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency,
339 uint32_t HSEBypass,
340 LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
341 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
342 ErrorStatus LL_SetFlashLatency(uint32_t HCLK_Frequency);
343 /**
344 * @}
345 */
346
347 /**
348 * @}
349 */
350
351 /**
352 * @}
353 */
354
355 /**
356 * @}
357 */
358
359 #ifdef __cplusplus
360 }
361 #endif
362
363 #endif /* __STM32H5xx_LL_UTILS_H */
364
