1 /**
2 ******************************************************************************
3 * @file stm32wb0x_ll_rng.h
4 * @author MCD Application Team
5 * @brief Header file of RNG LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2024 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32WB0x_LL_RNG_H
21 #define STM32WB0x_LL_RNG_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32wb0x.h"
29
30 /** @addtogroup STM32WB0x_LL_Driver
31 * @{
32 */
33
34 #if defined (RNG)
35 /** @defgroup RNG_LL RNG
36 * @{
37 */
38 #if defined (STM32WB09)
39
40 #if defined(USE_FULL_LL_DRIVER)
41 /** @defgroup RNG_LL_ES_Init_Struct RNG Exported Init structures
42 * @{
43 */
44
45 /**
46 * @brief LL RNG Init Structure Definition
47 */
48 typedef struct
49 {
50 uint32_t SamplingClockDivider; /*!< TRNG includes an internal clock enable divider that can be set by bits
51 CLKDIV0 to CLKDIV15 of TRNG_CR register.
52 It is used for decreasing internal random source sampling. Before
53 changing the clock divider, it is recommended
54 to disable the TRNG bit setting bit DISABLE to 1.
55 This parameter can be one value being in the range of 0 to 65535.
56 This parameter can be modified using unitary functions @ref
57 LL_RNG_SetSamplingClockEnableDivider(). */
58 } LL_RNG_InitTypeDef;
59
60 /**
61 * @}
62 */
63 #endif /* USE_FULL_LL_DRIVER */
64
65 /** @defgroup RNG_LL_DISABLE Values
66 * @{
67 */
68 #define LL_RNG_CR_DISABLE_0 (0U)
69 #define LL_RNG_CR_DISABLE_1 (RNG_CR_DISABLE)
70 /**
71 * @}
72 */
73
74 /** @defgroup RNG_LL_CLR_REVCLK_FLAG Values
75 * @{
76 */
77 #define LL_RNG_CR_CLR_REVCLK_FLAG_0 (0U)
78 #define LL_RNG_CR_CLR_REVCLK_FLAG_1 (RNG_CR_CLR_REVCLK_FLAG)
79 /**
80 * @}
81 */
82
83 /** @defgroup RNG_LL_RST_HEALTH_FLAGS Values
84 * @{
85 */
86 #define LL_RNG_CR_RST_HEALTH_FLAGS_0 (0U)
87 #define LL_RNG_CR_RST_HEALTH_FLAGS_1 (RNG_CR_RST_HEALTH_FLAGS)
88 /**
89 * @}
90 */
91
92
93 /** @defgroup RNG_LL_BP_POSTP Values
94 * @{
95 */
96 #define LL_RNG_CR_BP_POSTP_0 (0U)
97 #define LL_RNG_CR_BP_POSTP_1 (RNG_CR_BP_POSTP)
98 /**
99 * @}
100 */
101
102 /** @defgroup RNG_LL_DISABLED Values
103 * @{
104 */
105 #define LL_RNG_SR_DISABLED_0 (0U)
106 #define LL_RNG_SR_DISABLED_1 (RNG_SR_DISABLED)
107 /**
108 * @}
109 */
110
111 /** @defgroup RNG_LL_ALL_OSCS_DOWN Values
112 * @{
113 */
114 #define LL_RNG_SR_ALL_OSCS_DOWN_0 (0U)
115 #define LL_RNG_SR_ALL_OSCS_DOWN_1 (RNG_SR_ALL_OSCS_DOWN)
116 /**
117 * @}
118 */
119
120 /** @defgroup RNG_LL_REVEAL_CLK_ERR Values
121 * @{
122 */
123 #define LL_RNG_SR_REVEAL_CLK_ERR_0 (0U)
124 #define LL_RNG_SR_REVEAL_CLK_ERR_1 (RNG_SR_REVEAL_CLK_ERR)
125 /**
126 * @}
127 */
128
129 /** @defgroup RNG_LL_ENTROPY_ERR Values
130 * @{
131 */
132 #define LL_RNG_SR_ENTROPY_ERR_0 (0U)
133 #define LL_RNG_SR_ENTROPY_ERR_1 (RNG_SR_ENTROPY_ERR)
134 /**
135 * @}
136 */
137
138 /** @defgroup RNG_LL_VAL_READY Values
139 * @{
140 */
141 #define LL_RNG_SR_VAL_READY_0 (0U)
142 #define LL_RNG_SR_VAL_READY_1 (RNG_SR_VAL_READY)
143 /**
144 * @}
145 */
146
147 /** @defgroup RNG_LL_FIFO_FULL Values
148 * @{
149 */
150 #define LL_RNG_SR_FIFO_FULL_0 (0U)
151 #define LL_RNG_SR_FIFO_FULL_1 (RNG_SR_FIFO_FULL)
152 /**
153 * @}
154 */
155
156 /** @defgroup RNG_LL_SRC_HEALTH_DONE Values
157 * @{
158 */
159 #define LL_RNG_SR_SRC_HEALTH_DONE_0 (0U)
160 #define LL_RNG_SR_SRC_HEALTH_DONE_1 ( RNG_SR_SRC_HEALTH_DONE)
161 /**
162 * @}
163 */
164
165 /** @defgroup RNG_LL_REPET_ERROR Values
166 * @{
167 */
168 #define LL_RNG_SR_REPET_ERROR_0 (0U)
169 #define LL_RNG_SR_REPET_ERROR_1 (RNG_SR_REPET_ERROR)
170 /**
171 * @}
172 */
173
174 /** @defgroup RNG_LL_ADAPT_ERROR Values
175 * @{
176 */
177 #define LL_RNG_SR_ADAPT_ERROR_0 (0U)
178 #define LL_RNG_SR_ADAPT_ERROR_1 (RNG_SR_ADAPT_ERROR_0)
179 /**
180 * @}
181 */
182
183 /** @defgroup RNG_LL_OSCS_HEALTH_DONE Values
184 * @{
185 */
186 #define LL_RNG_SR_OSCS_HEALTH_DONE_0 (0U)
187 #define LL_RNG_SR_OSCS_HEALTH_DONE_1 (RNG_SR_OSCS_HEALTH_DONE)
188 /**
189 * @}
190 */
191
192 /** @defgroup RNG_LL_OSCS_REPET_ERROR Values
193 * @{
194 */
195 #define LL_RNG_SR_OSCS_REPET_ERROR_0 (0U)
196 #define LL_RNG_SR_OSCS_REPET_ERROR_1 (RNG_SR_OSCS_REPET_ERROR)
197 /**
198 * @}
199 */
200
201 /** @defgroup RNG_LL_OSCS_ADAPT_ERROR Values
202 * @{
203 */
204 #define LL_RNG_SR_OSCS_ADAPT_ERROR_0 (0U)
205 #define LL_RNG_SR_OSCS_ADAPT_ERROR_1 ( RNG_SR_OSCS_ADAPT_ERROR)
206 /**
207 * @}
208 */
209
210
211 /** @defgroup RNG_LL_PWRD1 Values
212 * @{
213 */
214 #define LL_RNG_OSCS_CR_PWRD1_0 (0U)
215 #define LL_RNG_OSCS_CR_PWRD1_1 (RNG_OSCS_CR_PWRD1_0)
216 #define LL_RNG_OSCS_CR_PWRD1_2 (RNG_OSCS_CR_PWRD1_1)
217 #define LL_RNG_OSCS_CR_PWRD1_3 (RNG_OSCS_CR_PWRD1_1 | RNG_OSCS_CR_PWRD1_0)
218 #define LL_RNG_OSCS_CR_PWRD1_4 (RNG_OSCS_CR_PWRD1_2)
219 #define LL_RNG_OSCS_CR_PWRD1_5 (RNG_OSCS_CR_PWRD1_2 | RNG_OSCS_CR_PWRD1_0)
220 #define LL_RNG_OSCS_CR_PWRD1_6 (RNG_OSCS_CR_PWRD1_2 | RNG_OSCS_CR_PWRD1_1)
221 #define LL_RNG_OSCS_CR_PWRD1_7 (RNG_OSCS_CR_PWRD1_2 |\
222 RNG_OSCS_CR_PWRD1_1 | RNG_OSCS_CR_PWRD1_0)
223 /**
224 * @}
225 */
226
227 /** @defgroup RNG_LL_PWRD2 Values
228 * @{
229 */
230 #define LL_RNG_OSCS_CR_PWRD2_0 (0U)
231 #define LL_RNG_OSCS_CR_PWRD2_1 (RNG_OSCS_CR_PWRD2_0)
232 #define LL_RNG_OSCS_CR_PWRD2_2 (RNG_OSCS_CR_PWRD2_1)
233 #define LL_RNG_OSCS_CR_PWRD2_3 (RNG_OSCS_CR_PWRD2_1 | RNG_OSCS_CR_PWRD2_0)
234 #define LL_RNG_OSCS_CR_PWRD2_4 ( RNG_OSCS_CR_PWRD2_2)
235 #define LL_RNG_OSCS_CR_PWRD2_5 ( RNG_OSCS_CR_PWRD2_2 | RNG_OSCS_CR_PWRD2_0)
236 #define LL_RNG_OSCS_CR_PWRD2_6 ( RNG_OSCS_CR_PWRD2_2 | RNG_OSCS_CR_PWRD2_1)
237 #define LL_RNG_OSCS_CR_PWRD2_7 ( RNG_OSCS_CR_PWRD2_2 |\
238 RNG_OSCS_CR_PWRD2_1 | RNG_OSCS_CR_PWRD2_0 )
239 /**
240 * @}
241 */
242
243 /** @defgroup RNG_LL_PWRD3 Values
244 * @{
245 */
246 #define LL_RNG_OSCS_CR_PWRD3_0 (0U)
247 #define LL_RNG_OSCS_CR_PWRD3_1 (RNG_OSCS_CR_PWRD3_0)
248 #define LL_RNG_OSCS_CR_PWRD3_2 (RNG_OSCS_CR_PWRD3_1)
249 #define LL_RNG_OSCS_CR_PWRD3_3 (RNG_OSCS_CR_PWRD3_1 | RNG_OSCS_CR_PWRD3_0)
250 #define LL_RNG_OSCS_CR_PWRD3_4 (RNG_OSCS_CR_PWRD3_2)
251 #define LL_RNG_OSCS_CR_PWRD3_5 (RNG_OSCS_CR_PWRD3_2 | RNG_OSCS_CR_PWRD3_0)
252 #define LL_RNG_OSCS_CR_PWRD3_6 (RNG_OSCS_CR_PWRD3_2 | RNG_OSCS_CR_PWRD3_1)
253 #define LL_RNG_OSCS_CR_PWRD3_7 (RNG_OSCS_CR_PWRD3_2 |\
254 RNG_OSCS_CR_PWRD3_1 | RNG_OSCS_CR_PWRD3_0)
255 /**
256 * @}
257 */
258
259 /** @defgroup RNG_LL_SYNC_OSCS Values
260 * @{
261 */
262 #define LL_RNG_OSCS_CR_SYNC_OSCS_0 (0U)
263 #define LL_RNG_OSCS_CR_SYNC_OSCS_1 (RNG_OSCS_CR_SYNC_OSCS)
264 /**
265 * @}
266 */
267
268 /** @defgroup RNG_LL_AES_RESET Values
269 * @{
270 */
271 #define LL_RNG_POSTP_CR_AES_RESET_0 (0U)
272 #define LL_RNG_POSTP_CR_AES_RESET_1 (RNG_POSTP_CR_AES_RESET)
273 /**
274 * @}
275 */
276
277 /** @defgroup RNG_LL_NB_LOOP_AES Values
278 * @{
279 */
280 #define LL_RNG_POSTP_CR_NB_LOOP_AES_0 (0U)
281 #define LL_RNG_POSTP_CR_NB_LOOP_AES_1 (RNG_POSTP_CR_NB_LOOP_AES_0)
282 #define LL_RNG_POSTP_CR_NB_LOOP_AES_2 (RNG_POSTP_CR_NB_LOOP_AES_1)
283 #define LL_RNG_POSTP_CR_NB_LOOP_AES_3 (RNG_POSTP_CR_NB_LOOP_AES_1 | RNG_POSTP_CR_NB_LOOP_AES_0)
284 #define LL_RNG_POSTP_CR_NB_LOOP_AES_4 (RNG_POSTP_CR_NB_LOOP_AES_2)
285 #define LL_RNG_POSTP_CR_NB_LOOP_AES_5 (RNG_POSTP_CR_NB_LOOP_AES_2 | RNG_POSTP_CR_NB_LOOP_AES_0)
286 #define LL_RNG_POSTP_CR_NB_LOOP_AES_6 (RNG_POSTP_CR_NB_LOOP_AES_2 | RNG_POSTP_CR_NB_LOOP_AES_1)
287 #define LL_RNG_POSTP_CR_NB_LOOP_AES_7 (RNG_POSTP_CR_NB_LOOP_AES_2 | RNG_POSTP_CR_NB_LOOP_AES_1 |\
288 RNG_POSTP_CR_NB_LOOP_AES_0)
289 #define LL_RNG_POSTP_CR_NB_LOOP_AES_8 (RNG_POSTP_CR_NB_LOOP_AES_3)
290 #define LL_RNG_POSTP_CR_NB_LOOP_AES_9 (RNG_POSTP_CR_NB_LOOP_AES_3 | RNG_POSTP_CR_NB_LOOP_AES_0)
291 #define LL_RNG_POSTP_CR_NB_LOOP_AES_10 (RNG_POSTP_CR_NB_LOOP_AES_3 | RNG_POSTP_CR_NB_LOOP_AES_1)
292 #define LL_RNG_POSTP_CR_NB_LOOP_AES_11 (RNG_POSTP_CR_NB_LOOP_AES_3 |\
293 RNG_POSTP_CR_NB_LOOP_AES_1 | RNG_POSTP_CR_NB_LOOP_AES_0)
294 #define LL_RNG_POSTP_CR_NB_LOOP_AES_12 (RNG_POSTP_CR_NB_LOOP_AES_3 | RNG_POSTP_CR_NB_LOOP_AES_2)
295 #define LL_RNG_POSTP_CR_NB_LOOP_AES_13 (RNG_POSTP_CR_NB_LOOP_AES_3 |\
296 RNG_POSTP_CR_NB_LOOP_AES_2 | RNG_POSTP_CR_NB_LOOP_AES_0)
297 #define LL_RNG_POSTP_CR_NB_LOOP_AES_14 (RNG_POSTP_CR_NB_LOOP_AES_3 |\
298 RNG_POSTP_CR_NB_LOOP_AES_2 | RNG_POSTP_CR_NB_LOOP_AES_1)
299 #define LL_RNG_POSTP_CR_NB_LOOP_AES_15 (RNG_POSTP_CR_NB_LOOP_AES_3 | RNG_POSTP_CR_NB_LOOP_AES_2 |\
300 RNG_POSTP_CR_NB_LOOP_AES_1 | RNG_POSTP_CR_NB_LOOP_AES_0)
301 /**
302 * @}
303 */
304
305
306 /** @defgroup RNG_LL_AES_INIT Values
307 * @{
308 */
309 #define LL_RNG_POSTP_SR_AES_INIT_0 (0U)
310 #define LL_RNG_POSTP_SR_AES_INIT_1 (RNG_POSTP_SR_AES_INIT)
311 /**
312 * @}
313 */
314
315 /** @defgroup RNG_LL_AES_KEY_LD Values
316 * @{
317 */
318 #define LL_RNG_POSTP_SR_AES_KEY_LD_0 (0U)
319 #define LL_RNG_POSTP_SR_AES_KEY_LD_1 (RNG_POSTP_SR_AES_KEY_LD)
320 /**
321 * @}
322 */
323
324 /** @defgroup RNG_LL_AES_BUSY Values
325 * @{
326 */
327 #define LL_RNG_POSTP_SR_AES_BUSY_0 (0U)
328 #define LL_RNG_POSTP_SR_AES_BUSY_1 (RNG_POSTP_SR_AES_BUSY)
329 /**
330 * @}
331 */
332
333 /** @defgroup RNG_LL_AES_HEALTH_DONE Values
334 * @{
335 */
336 #define LL_RNG_POSTP_SR_AES_HEALTH_DONE_0 (0U)
337 #define LL_RNG_POSTP_SR_AES_HEALTH_DONE_1 (RNG_POSTP_SR_AES_HEALTH_DONE)
338 /**
339 * @}
340 */
341
342 /** @defgroup RNG_LL_AES_K12_ERROR Values
343 * @{
344 */
345 #define LL_RNG_POSTP_SR_AES_K12_ERROR_0 (0U)
346 #define LL_RNG_POSTP_SR_AES_K12_ERROR_1 (RNG_POSTP_SR_AES_K12_ERROR)
347 /**
348 * @}
349 */
350
351 /** @defgroup RNG_LL_AES_DOUT_ERROR Values
352 * @{
353 */
354 #define LL_RNG_POSTP_SR_AES_DOUT_ERROR_0 (0U)
355 #define LL_RNG_POSTP_SR_AES_DOUT_ERROR_1 (RNG_POSTP_SR_AES_DOUT_ERROR)
356 /**
357 * @}
358 */
359
360 /** @defgroup RNG_LL_ITER_ADAP Values
361 * @{
362 */
363 #define LL_RNG_HEALTH_CR_ITER_ADAP_0 (0U)
364 #define LL_RNG_HEALTH_CR_ITER_ADAP_1 (RNG_HEALTH_CR_ITER_ADAP_0)
365 #define LL_RNG_HEALTH_CR_ITER_ADAP_2 (RNG_HEALTH_CR_ITER_ADAP_1)
366 #define LL_RNG_HEALTH_CR_ITER_ADAP_3 (RNG_HEALTH_CR_ITER_ADAP_1 | RNG_HEALTH_CR_ITER_ADAP_0)
367 /**
368 * @}
369 */
370
371 /** @defgroup RNG_LL_TO1_REPET_ERROR Values
372 * @{
373 */
374 #define LL_RNG_HEALTH_OSC1_SR_TO1_REPET_ERROR_0 (0U)
375 #define LL_RNG_HEALTH_OSC1_SR_TO1_REPET_ERROR_1 (RNG_HEALTH_OSC1_SR_TO1_REPET_ERROR_0)
376 /**
377 * @}
378 */
379
380 /** @defgroup RNG_LL_TO1_ADAPT_ERROR Values
381 * @{
382 */
383 #define LL_RNG_HEALTH_OSC1_SR_TO1_ADAPT_ERROR_0 (0U)
384 #define LL_RNG_HEALTH_OSC1_SR_TO1_ADAPT_ERROR_1 (RNG_HEALTH_OSC1_SR_TO1_ADAPT_ERROR)
385 /**
386 * @}
387 */
388
389 /** @defgroup RNG_LL_TO2_REPET_ERROR Values
390 * @{
391 */
392 #define LL_RNG_HEALTH_OSC1_SR_TO2_REPET_ERROR_0 (0U)
393 #define LL_RNG_HEALTH_OSC1_SR_TO2_REPET_ERROR_1 (RNG_HEALTH_OSC1_SR_TO2_REPET_ERROR)
394 /**
395 * @}
396 */
397
398 /** @defgroup RNG_LL_TO2_ADAPT_ERROR Values
399 * @{
400 */
401 #define LL_RNG_HEALTH_OSC1_SR_TO2_ADAPT_ERROR_0 (0U)
402 #define LL_RNG_HEALTH_OSC1_SR_TO2_ADAPT_ERROR_1 (RNG_HEALTH_OSC1_SR_TO2_ADAPT_ERROR)
403 /**
404 * @}
405 */
406
407 /** @defgroup RNG_LL_TO3_REPET_ERROR Values
408 * @{
409 */
410 #define LL_RNG_HEALTH_OSC1_SR_TO3_REPET_ERROR_0 (0U)
411 #define LL_RNG_HEALTH_OSC1_SR_TO3_REPET_ERROR_1 (RNG_HEALTH_OSC1_SR_TO3_REPET_ERROR)
412 /**
413 * @}
414 */
415
416 /** @defgroup RNG_LL_TO3_ADAPT_ERROR Values
417 * @{
418 */
419 #define LL_RNG_HEALTH_OSC1_SR_TO3_ADAPT_ERROR_0 (0U)
420 #define LL_RNG_HEALTH_OSC1_SR_TO3_ADAPT_ERROR_1 (RNG_HEALTH_OSC1_SR_TO3_ADAPT_ERROR)
421 /**
422 * @}
423 */
424
425 /** @defgroup RNG_LL_TO1_REPET_ERROR Values
426 * @{
427 */
428 #define LL_RNG_HEALTH_OSC2_SR_TO1_REPET_ERROR_0 (0U)
429 #define LL_RNG_HEALTH_OSC2_SR_TO1_REPET_ERROR_1 (RNG_HEALTH_OSC2_SR_TO1_REPET_ERROR)
430 /**
431 * @}
432 */
433
434 /** @defgroup RNG_LL_TO1_ADAPT_ERROR Values
435 * @{
436 */
437 #define LL_RNG_HEALTH_OSC2_SR_TO1_ADAPT_ERROR_0 (0U)
438 #define LL_RNG_HEALTH_OSC2_SR_TO1_ADAPT_ERROR_1 (RNG_HEALTH_OSC2_SR_TO1_ADAPT_ERROR)
439 /**
440 * @}
441 */
442
443 /** @defgroup RNG_LL_TO2_REPET_ERROR Values
444 * @{
445 */
446 #define LL_RNG_HEALTH_OSC2_SR_TO2_REPET_ERROR_0 (0U)
447 #define LL_RNG_HEALTH_OSC2_SR_TO2_REPET_ERROR_1 (RNG_HEALTH_OSC2_SR_TO2_REPET_ERROR)
448 /**
449 * @}
450 */
451
452 /** @defgroup RNG_LL_TO2_ADAPT_ERROR Values
453 * @{
454 */
455 #define LL_RNG_HEALTH_OSC2_SR_TO2_ADAPT_ERROR_0 (0U)
456 #define LL_RNG_HEALTH_OSC2_SR_TO2_ADAPT_ERROR_1 (RNG_HEALTH_OSC2_SR_TO2_ADAPT_ERROR)
457 /**
458 * @}
459 */
460
461 /** @defgroup RNG_LL_TO3_REPET_ERROR Values
462 * @{
463 */
464 #define LL_RNG_HEALTH_OSC2_SR_TO3_REPET_ERROR_0 (0U)
465 #define LL_RNG_HEALTH_OSC2_SR_TO3_REPET_ERROR_1 (RNG_HEALTH_OSC2_SR_TO3_REPET_ERROR)
466 /**
467 * @}
468 */
469
470 /** @defgroup RNG_LL_TO3_ADAPT_ERROR Values
471 * @{
472 */
473 #define LL_RNG_HEALTH_OSC2_SR_TO3_ADAPT_ERROR_0 (0U)
474 #define LL_RNG_HEALTH_OSC2_SR_TO3_ADAPT_ERROR_1 (RNG_HEALTH_OSC2_SR_TO3_ADAPT_ERROR)
475 /**
476 * @}
477 */
478
479 /** @defgroup RNG_LL_TO1_REPET_ERROR Values
480 * @{
481 */
482 #define LL_RNG_HEALTH_OSC3_SR_TO1_REPET_ERROR_0 (0U)
483 #define LL_RNG_HEALTH_OSC3_SR_TO1_REPET_ERROR_1 (RNG_HEALTH_OSC3_SR_TO1_REPET_ERROR)
484 /**
485 * @}
486 */
487
488 /** @defgroup RNG_LL_TO1_ADAPT_ERROR Values
489 * @{
490 */
491 #define LL_RNG_HEALTH_OSC3_SR_TO1_ADAPT_ERROR_0 (0U)
492 #define LL_RNG_HEALTH_OSC3_SR_TO1_ADAPT_ERROR_1 (RNG_HEALTH_OSC3_SR_TO1_ADAPT_ERROR)
493 /**
494 * @}
495 */
496
497 /** @defgroup RNG_LL_TO2_REPET_ERROR Values
498 * @{
499 */
500 #define LL_RNG_HEALTH_OSC3_SR_TO2_REPET_ERROR_0 (0U)
501 #define LL_RNG_HEALTH_OSC3_SR_TO2_REPET_ERROR_1 (RNG_HEALTH_OSC3_SR_TO2_REPET_ERROR)
502 /**
503 * @}
504 */
505
506 /** @defgroup RNG_LL_TO2_ADAPT_ERROR Values
507 * @{
508 */
509 #define LL_RNG_HEALTH_OSC3_SR_TO2_ADAPT_ERROR_0 (0U)
510 #define LL_RNG_HEALTH_OSC3_SR_TO2_ADAPT_ERROR_1 (RNG_HEALTH_OSC3_SR_TO2_ADAPT_ERROR)
511 /**
512 * @}
513 */
514
515 /** @defgroup RNG_LL_TO3_REPET_ERROR Values
516 * @{
517 */
518 #define LL_RNG_HEALTH_OSC3_SR_TO3_REPET_ERROR_0 (0U)
519 #define LL_RNG_HEALTH_OSC3_SR_TO3_REPET_ERROR_1 (RNG_HEALTH_OSC3_SR_TO3_REPET_ERROR)
520 /**
521 * @}
522 */
523
524 /** @defgroup RNG_LL_TO3_ADAPT_ERROR Values
525 * @{
526 */
527 #define LL_RNG_HEALTH_OSC3_SR_TO3_ADAPT_ERROR_0 (0U)
528 #define LL_RNG_HEALTH_OSC3_SR_TO3_ADAPT_ERROR_1 (RNG_HEALTH_OSC3_SR_TO3_ADAPT_ERROR)
529 /**
530 * @}
531 */
532
533 /** @defgroup RNG_LL_EN_FF_FULL_IRQ Values
534 * @{
535 */
536 #define LL_RNG_IRQ_CR_EN_FF_FULL_IRQ_0 (0U)
537 #define LL_RNG_IRQ_CR_EN_FF_FULL_IRQ_1 (RNG_IRQ_CR_EN_FF_FULL_IRQ)
538 /**
539 * @}
540 */
541
542 /** @defgroup RNG_LL_EN_ERROR_IRQ Values
543 * @{
544 */
545 #define LL_RNG_IRQ_CR_EN_ERROR_IRQ_0 (0U)
546 #define LL_RNG_IRQ_CR_EN_ERROR_IRQ_1 (RNG_IRQ_CR_EN_ERROR_IRQ)
547 /**
548 * @}
549 */
550
551 /** @defgroup RNG_LL_FF_FULL_IRQ Values
552 * @{
553 */
554 #define LL_RNG_IRQ_SR_FF_FULL_IRQ_0 (0U)
555 #define LL_RNG_IRQ_SR_FF_FULL_IRQ_1 (RNG_IRQ_SR_FF_FULL_IRQ)
556 /**
557 * @}
558 */
559
560 /** @defgroup RNG_LL_ERROR_IRQ Values
561 * @{
562 */
563 #define LL_RNG_IRQ_SR_ERROR_IRQ_0 (0U)
564 #define LL_RNG_IRQ_SR_ERROR_IRQ_1 (RNG_IRQ_SR_ERROR_IRQ)
565 /**
566 * @}
567 */
568
569
570 /**
571 * @brief Enable Random Number Generation
572 * @rmtoll CR RNG_DIS LL_RNG_Enable
573 * @param RNGx RNG Instance
574 * @retval None
575 */
LL_RNG_Enable(RNG_TypeDef * RNGx)576 __STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
577 {
578 MODIFY_REG(RNGx->CR, RNG_CR_DISABLE, LL_RNG_CR_DISABLE_0);
579 }
580
581 /**
582 * @brief Disable Random Number Generation
583 * @rmtoll CR RNG_DIS LL_RNG_Disable
584 * @param RNGx RNG Instance
585 * @retval None
586 */
LL_RNG_Disable(RNG_TypeDef * RNGx)587 __STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
588 {
589 MODIFY_REG(RNGx->CR, RNG_CR_DISABLE, LL_RNG_CR_DISABLE_1);
590 }
591
592 /**
593 * @brief When writing a 1, the value remains until it is seen by RNG core clock domain after
594 resynchronization. Then it is automatically reset
595 * @note 0x0 no reset
596 0x1 reset revclk flag
597 * @rmtoll CR CLR_REVCLK_FLAG LL_RNG_SetResetRevealClockErrorFlags
598 * @param RNGx RNG Instance
599 * @param value can be one of the following values:
600 * @arg LL_RNG_CR_CLR_REVCLK_FLAG_0
601 * @arg LL_RNG_CR_CLR_REVCLK_FLAG_1
602 * @retval None
603 */
LL_RNG_SetResetRevealClockErrorFlags(RNG_TypeDef * RNGx,uint32_t value)604 __STATIC_INLINE void LL_RNG_SetResetRevealClockErrorFlags(RNG_TypeDef *RNGx, uint32_t value)
605 {
606 MODIFY_REG(RNGx->CR, RNG_CR_CLR_REVCLK_FLAG, value);
607 }
608
609 /**
610 * @brief Get the Reset Reveal Clock Error Flag
611 * @note 0x0 no reset
612 * 0x1 reset revclk flag
613 * @rmtoll CR CLR_REVCLK_FLAG LL_RNG_GetResetRevealClockErrorFlags
614 * @retval can be one of the following values
615 * @arg LL_RNG_CR_CLR_REVCLK_FLAG_0
616 * @arg LL_RNG_CR_CLR_REVCLK_FLAG_1
617 */
LL_RNG_GetResetRevealClockErrorFlags(RNG_TypeDef * RNGx)618 __STATIC_INLINE uint32_t LL_RNG_GetResetRevealClockErrorFlags(RNG_TypeDef *RNGx)
619 {
620 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_CLR_REVCLK_FLAG));
621 }
622
623 /**
624 * @brief Set the Reset Health Error Flag
625 @note When writing a 1, the value remains until it is seen by RNG core clock domain after resynchronization.
626 Then it is automatically reset
627 0x0 no reset
628 0x1 reset health flag
629 * @rmtoll CR RST_HEALTH_FLAGS LL_RNG_SetResetHealthErrorFlags
630 * @param RNGx RNG Instance
631 * @param value can be one of the following values:
632 * @arg LL_RNG_CR_RST_HEALTH_FLAGS_0
633 * @arg LL_RNG_CR_RST_HEALTH_FLAGS_1
634 * @retval None
635 */
LL_RNG_SetResetHealthErrorFlags(RNG_TypeDef * RNGx,uint32_t value)636 __STATIC_INLINE void LL_RNG_SetResetHealthErrorFlags(RNG_TypeDef *RNGx, uint32_t value)
637 {
638 MODIFY_REG(RNGx->CR, RNG_CR_RST_HEALTH_FLAGS, value);
639 }
640
641 /**
642 * @brief Get the Reset Health Error Flag
643 @note When writing a 1, the value remains until it is seen by RNG core clock domain after resynchronization.
644 Then it is automatically reset
645 0x0 no reset
646 * @rmtoll CR RST_HEALTH_FLAGS LL_RNG_GetResetHealthErrorFlags
647 * @retval can be one of the following values
648 * @arg LL_RNG_CR_RST_HEALTH_FLAGS_0
649 * @arg LL_RNG_CR_RST_HEALTH_FLAGS_1
650 */
LL_RNG_GetResetHealthErrorFlags(RNG_TypeDef * RNGx)651 __STATIC_INLINE uint32_t LL_RNG_GetResetHealthErrorFlags(RNG_TypeDef *RNGx)
652 {
653 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RST_HEALTH_FLAGS));
654 }
655
656 /**
657 * @brief Set the sampling clock enable divider
658 @note dividing by a factor equal to CLKDIV[15:0] + 1, values being in the range of 0 to 65535
659 * @rmtoll CR CLKDIV_15_0 LL_RNG_SetSamplingClockEnableDivider
660 * @param RNGx RNG Instance
661 * @param value parameter must be a number between 0 and 65535 (form 0x0 to 0xffff)
662 * @retval None
663 */
LL_RNG_SetSamplingClockEnableDivider(RNG_TypeDef * RNGx,uint32_t value)664 __STATIC_INLINE void LL_RNG_SetSamplingClockEnableDivider(RNG_TypeDef *RNGx, uint32_t value)
665 {
666 MODIFY_REG(RNGx->CR, RNG_CR_CLKDIV_15_0, value << RNG_CR_CLKDIV_15_0_Pos);
667 }
668
669 /**
670 * @brief Get the sampling clock enable divider
671 @note dividing by a factor equal to CLKDIV[15:0] + 1, values being in the range of 0 to 65535
672 * @rmtoll CR CLKDIV_15_0 LL_RNG_GetSamplingClockEnableDivider
673 * @retval can be one of the following values
674 */
LL_RNG_GetSamplingClockEnableDivider(RNG_TypeDef * RNGx)675 __STATIC_INLINE uint32_t LL_RNG_GetSamplingClockEnableDivider(RNG_TypeDef *RNGx)
676 {
677 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_CLKDIV_15_0) >> RNG_CR_CLKDIV_15_0_Pos);
678 }
679
680 /**
681 * @brief Set the random raw values from the random sources
682 * @note Available only in test mode for analog characterization where tst_bypass_ana_i input of the IP is
683 set to 10x0 Post processing is used0x1 Post processing is bypassed
684 * @rmtoll CR BP_POSTP LL_RNG_SetBypassOfPostProcessing
685 * @param RNGx RNG Instance
686 * @param value can be one of the following values:
687 * @arg LL_RNG_CR_BP_POSTP_0
688 * @arg LL_RNG_CR_BP_POSTP_1
689 * @retval None
690 */
LL_RNG_SetBypassOfPostProcessing(RNG_TypeDef * RNGx,uint32_t value)691 __STATIC_INLINE void LL_RNG_SetBypassOfPostProcessing(RNG_TypeDef *RNGx, uint32_t value)
692 {
693 MODIFY_REG(RNGx->CR, RNG_CR_BP_POSTP, value);
694 }
695
696 /**
697 * @brief Get the random raw values from the random sources
698 * @note Available only in test mode for analog characterization where tst_bypass_ana_i input of the IP is
699 set to 10x0 Post processing is used0x1 Post processing is bypassed
700 * @rmtoll CR BP_POSTP LL_RNG_GetBypassOfPostProcessing
701 * @retval can be one of the following values
702 * @arg LL_RNG_CR_BP_POSTP_0
703 * @arg LL_RNG_CR_BP_POSTP_1
704 */
LL_RNG_GetBypassOfPostProcessing(RNG_TypeDef * RNGx)705 __STATIC_INLINE uint32_t LL_RNG_GetBypassOfPostProcessing(RNG_TypeDef *RNGx)
706 {
707 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_BP_POSTP));
708 }
709
710 /**
711 * @brief Indicate if DISABLED value Flag is set or not.
712 * @note RNG is disabled
713 * 0x0 Normal operation.
714 * 0x1 RNG is disabled
715 * @rmtoll SR DISABLED LL_RNG_IsActiveFlag_DISABLED
716 * @param RNGx RNG Instance
717 * @retval State of bit (1 or 0).
718 */
LL_RNG_IsActiveFlag_DISABLED(RNG_TypeDef * RNGx)719 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DISABLED(RNG_TypeDef *RNGx)
720 {
721 return ((READ_BIT(RNGx->SR, RNG_SR_DISABLED) == (RNG_SR_DISABLED)) ? 1U : 0U);
722 }
723
724 /**
725 * @brief Indicate if ALL_OSCS_DOWN value Flag is set or not.
726 * @note All oscillators of the random source noise have been powered down
727 * This can cause the rising of OEC3 flag
728 * 0x0 At least one oscillator is ON0x1 All oscillators are down
729 * @rmtoll SR ALL_OSCS_DOWN LL_RNG_IsActiveFlag_ALL_OSCS_DOWN
730 * @param RNGx RNG Instance
731 * @retval State of bit (1 or 0).
732 */
LL_RNG_IsActiveFlag_ALL_OSCS_DOWN(RNG_TypeDef * RNGx)733 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_ALL_OSCS_DOWN(RNG_TypeDef *RNGx)
734 {
735 return ((READ_BIT(RNGx->SR, RNG_SR_ALL_OSCS_DOWN) == (RNG_SR_ALL_OSCS_DOWN)) ? 1U : 0U);
736 }
737
738 /**
739 * @brief Indicate if REVEAL_CLK_ERR value Flag is set or not.
740 * @note The internal clock for the RNG core is not revealed
741 * 0x0 Internal clock for RNG clock is present.
742 * 0x1 Internal RNG clock is not present
743 * @rmtoll SR REVEAL_CLK_ERR LL_RNG_IsActiveFlag_REVEAL_CLK_ERR
744 * @param RNGx RNG Instance
745 * @retval State of bit (1 or 0).
746 */
LL_RNG_IsActiveFlag_REVEAL_CLK_ERR(RNG_TypeDef * RNGx)747 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_REVEAL_CLK_ERR(RNG_TypeDef *RNGx)
748 {
749 return ((READ_BIT(RNGx->SR, RNG_SR_REVEAL_CLK_ERR) == (RNG_SR_REVEAL_CLK_ERR)) ? 1U : 0U);
750 }
751
752 /**
753 * @brief Indicate if ENTROPY_ERR value Flag is set or not.
754 * @note The error refers to a fault in the bit sequence detected by the Entropy Monitor. Failed test is
755 given by REPET_ERROR, and ADAPT_ERROR, OSCS_REPET_ERROR and OSCS_ADAPT_ERROR status flags
756 * 0x0 No fault detected
757 * 0x1 Embedded heath monitor detects an error in bit stream quality
758 * @rmtoll SR ENTROPY_ERR LL_RNG_IsActiveFlag_ENTROPY_ERR
759 * @param RNGx RNG Instance
760 * @retval State of bit (1 or 0).
761 */
LL_RNG_IsActiveFlag_ENTROPY_ERR(RNG_TypeDef * RNGx)762 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_ENTROPY_ERR(RNG_TypeDef *RNGx)
763 {
764 return ((READ_BIT(RNGx->SR, RNG_SR_ENTROPY_ERR) == (RNG_SR_ENTROPY_ERR)) ? 1U : 0U);
765 }
766
767 /**
768 * @brief Indicate if VAL_READY value Flag is set or not.
769 * @note At least one 32-bit random value is available in the data FIFO
770 * Note that application must ensure that a random is available in internal FIFO before starting a
771 read otherwise a bus error will be generated
772 * 0x0 No value is ready in FIFO.
773 * 0x1 A 32-bit value is available in the internal FIFO
774 * @rmtoll SR VAL_READY LL_RNG_IsActiveFlag_VAL_READY
775 * @param RNGx RNG Instance
776 * @retval State of bit (1 or 0).
777 */
LL_RNG_IsActiveFlag_VAL_READY(RNG_TypeDef * RNGx)778 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_VAL_READY(RNG_TypeDef *RNGx)
779 {
780 return ((READ_BIT(RNGx->SR, RNG_SR_VAL_READY) == (RNG_SR_VAL_READY)) ? 1U : 0U);
781 }
782
783
784 /**
785 * @brief Indicate if FIFO_FULL value Flag is set or not.
786 * @note Indicates whether random data FIFO is full
787 * 0x0 FIFO is not full.
788 * 0x1 The internal data FIFO is full and four 32-bit random values can be read
789 * @rmtoll SR FIFO_FULL LL_RNG_IsActiveFlag_FIFO_FULL
790 * @param RNGx RNG Instance
791 * @retval State of bit (1 or 0).
792 */
LL_RNG_IsActiveFlag_FIFO_FULL(RNG_TypeDef * RNGx)793 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_FIFO_FULL(RNG_TypeDef *RNGx)
794 {
795 return ((READ_BIT(RNGx->SR, RNG_SR_FIFO_FULL) == (RNG_SR_FIFO_FULL)) ? 1U : 0U);
796 }
797
798 /**
799 * @brief Indicate if SRC_HEALTH_DONE value Flag is set or not.
800 * @note First run of noise source health test is completed
801 * @rmtoll SR SRC_HEALTH_DONE LL_RNG_IsActiveFlag_SRC_HEALTH_DONE
802 * @param RNGx RNG Instance
803 * @retval State of bit (1 or 0).
804 */
LL_RNG_IsActiveFlag_SRC_HEALTH_DONE(RNG_TypeDef * RNGx)805 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SRC_HEALTH_DONE(RNG_TypeDef *RNGx)
806 {
807 return ((READ_BIT(RNGx->SR, RNG_SR_SRC_HEALTH_DONE) == (RNG_SR_SRC_HEALTH_DONE)) ? 1U : 0U);
808 }
809
810 /**
811 * @brief Indicate if REPET_ERROR value Flag is set or not.
812 * @note Noise source Repetition health test error
813 * @rmtoll SR REPET_ERROR LL_RNG_IsActiveFlag_REPET_ERROR
814 * @param RNGx RNG Instance
815 * @retval State of bit (1 or 0).
816 */
LL_RNG_IsActiveFlag_REPET_ERROR(RNG_TypeDef * RNGx)817 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_REPET_ERROR(RNG_TypeDef *RNGx)
818 {
819 return ((READ_BIT(RNGx->SR, RNG_SR_REPET_ERROR) == (RNG_SR_REPET_ERROR)) ? 1U : 0U);
820 }
821
822 /**
823 * @brief Indicate if ADAPT_ERROR value Flag is set or not.
824 * @note Noise source Adaptive 1024 health test error
825 * @rmtoll SR ADAPT_ERROR LL_RNG_IsActiveFlag_ADAPT_ERROR
826 * @param RNGx RNG Instance
827 * @retval State of bit (1 or 0).
828 */
LL_RNG_IsActiveFlag_ADAPT_ERROR(RNG_TypeDef * RNGx)829 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_ADAPT_ERROR(RNG_TypeDef *RNGx)
830 {
831 return ((READ_BIT(RNGx->SR, RNG_SR_ADAPT_ERROR) == (RNG_SR_ADAPT_ERROR)) ? 1U : 0U);
832 }
833
834 /**
835 * @brief Indicate if OSCS_HEALTH_DONE value Flag is set or not.
836 * @note First run of source health tests of individual oscillators composing the noise source are completed
837 * @rmtoll SR OSCS_HEALTH_DONE LL_RNG_IsActiveFlag_OSCS_HEALTH_DONE
838 * @param RNGx RNG Instance
839 * @retval State of bit (1 or 0).
840 */
LL_RNG_IsActiveFlag_OSCS_HEALTH_DONE(RNG_TypeDef * RNGx)841 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_OSCS_HEALTH_DONE(RNG_TypeDef *RNGx)
842 {
843 return ((READ_BIT(RNGx->SR, RNG_SR_OSCS_HEALTH_DONE) == (RNG_SR_OSCS_HEALTH_DONE)) ? 1U : 0U);
844 }
845
846 /**
847 * @brief Indicate if OSCS_REPET_ERROR value Flag is set or not.
848 * @note Logical OR of repetition health test errors of individual oscillators composing the noise source
849 * @rmtoll SR OSCS_REPET_ERROR LL_RNG_IsActiveFlag_OSCS_REPET_ERROR
850 * @param RNGx RNG Instance
851 * @retval State of bit (1 or 0).
852 */
LL_RNG_IsActiveFlag_OSCS_REPET_ERROR(RNG_TypeDef * RNGx)853 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_OSCS_REPET_ERROR(RNG_TypeDef *RNGx)
854 {
855 return ((READ_BIT(RNGx->SR, RNG_SR_OSCS_REPET_ERROR) == (RNG_SR_OSCS_REPET_ERROR)) ? 1U : 0U);
856 }
857
858 /**
859 * @brief Indicate if OSCS_ADAPT_ERROR value Flag is set or not.
860 * @note Logical OR of adaptive health test errors of individual oscillators composing the noise source
861 * @rmtoll SR OSCS_ADAPT_ERROR LL_RNG_IsActiveFlag_OSCS_ADAPT_ERROR
862 * @param RNGx RNG Instance
863 * @retval State of bit (1 or 0).
864 */
LL_RNG_IsActiveFlag_OSCS_ADAPT_ERROR(RNG_TypeDef * RNGx)865 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_OSCS_ADAPT_ERROR(RNG_TypeDef *RNGx)
866 {
867 return ((READ_BIT(RNGx->SR, RNG_SR_OSCS_ADAPT_ERROR) == (RNG_SR_OSCS_ADAPT_ERROR)) ? 1U : 0U);
868 }
869
870
871 /**
872 * @brief Get the RND_VAL is a 32-bit Random Value
873 * @note This is the output of the internal four-word FIFO. Note that application must ensure that a random is
874 available in FIFO by ready VAL_READY flag before starting a read otherwise a null value will be returned
875 * @rmtoll VAL RND_VAL LL_RNG_GetRndVal
876 * @retval a 32-bit Random Value
877 */
LL_RNG_GetRndVal(RNG_TypeDef * RNGx)878 __STATIC_INLINE uint32_t LL_RNG_GetRndVal(RNG_TypeDef *RNGx)
879 {
880 return (uint32_t)(READ_BIT(RNGx->VAL, RNG_VAL_RND_VAL) >> RNG_VAL_RND_VAL_Pos);
881 }
882
883 #define LL_RNG_READRANDDATA32 LL_RNG_GetRndVal
884
885 /**
886 * @brief Set the Power down of individual oscillators in triple-oscillator block number 1
887 * @rmtoll OSCS_CR PWRD1 LL_RNG_SetPowerDownBlock1
888 * @param RNGx RNG Instance
889 * @param value can be one of the following values:
890 * @arg LL_RNG_OSCS_CR_PWRD1_0
891 * @arg LL_RNG_OSCS_CR_PWRD1_1
892 * @arg LL_RNG_OSCS_CR_PWRD1_2
893 * @arg LL_RNG_OSCS_CR_PWRD1_3
894 * @arg LL_RNG_OSCS_CR_PWRD1_4
895 * @arg LL_RNG_OSCS_CR_PWRD1_5
896 * @arg LL_RNG_OSCS_CR_PWRD1_6
897 * @arg LL_RNG_OSCS_CR_PWRD1_7
898 * @retval None
899 */
LL_RNG_SetPowerDownBlock1(RNG_TypeDef * RNGx,uint32_t value)900 __STATIC_INLINE void LL_RNG_SetPowerDownBlock1(RNG_TypeDef *RNGx, uint32_t value)
901 {
902 MODIFY_REG(RNGx->OSCS_CR, RNG_OSCS_CR_PWRD1, value);
903 }
904
905 /**
906 * @brief Get the Power down of individual oscillators in triple-oscillator block number 1
907 * @rmtoll OSCS_CR PWRD1 LL_RNG_GetPowerDownBlock1
908 * @retval can be one of the following values
909 * @arg LL_RNG_OSCS_CR_PWRD1_0
910 * @arg LL_RNG_OSCS_CR_PWRD1_1
911 * @arg LL_RNG_OSCS_CR_PWRD1_2
912 * @arg LL_RNG_OSCS_CR_PWRD1_3
913 * @arg LL_RNG_OSCS_CR_PWRD1_4
914 * @arg LL_RNG_OSCS_CR_PWRD1_5
915 * @arg LL_RNG_OSCS_CR_PWRD1_6
916 * @arg LL_RNG_OSCS_CR_PWRD1_7
917 */
LL_RNG_GetPowerDownBlock1(RNG_TypeDef * RNGx)918 __STATIC_INLINE uint32_t LL_RNG_GetPowerDownBlock1(RNG_TypeDef *RNGx)
919 {
920 return (uint32_t)(READ_BIT(RNGx->OSCS_CR, RNG_OSCS_CR_PWRD1));
921 }
922
923 /**
924 * @brief Set the Power down of individual oscillators in triple-oscillator block number 2
925 * @rmtoll OSCS_CR PWRD2 LL_RNG_SetPowerDownBlock2
926 * @param RNGx RNG Instance
927 * @param value can be one of the following values:
928 * @arg LL_RNG_OSCS_CR_PWRD2_0
929 * @arg LL_RNG_OSCS_CR_PWRD2_1
930 * @arg LL_RNG_OSCS_CR_PWRD2_2
931 * @arg LL_RNG_OSCS_CR_PWRD2_3
932 * @arg LL_RNG_OSCS_CR_PWRD2_4
933 * @arg LL_RNG_OSCS_CR_PWRD2_5
934 * @arg LL_RNG_OSCS_CR_PWRD2_6
935 * @arg LL_RNG_OSCS_CR_PWRD2_7
936 * @retval None
937 */
LL_RNG_SetPowerDownBlock2(RNG_TypeDef * RNGx,uint32_t value)938 __STATIC_INLINE void LL_RNG_SetPowerDownBlock2(RNG_TypeDef *RNGx, uint32_t value)
939 {
940 MODIFY_REG(RNGx->OSCS_CR, RNG_OSCS_CR_PWRD2, value);
941 }
942
943 /**
944 * @brief Get the Power down of individual oscillators in triple-oscillator block number 2
945 * @rmtoll OSCS_CR PWRD2 LL_RNG_GetPowerDownBlock2
946 * @retval can be one of the following values
947 * @arg LL_RNG_OSCS_CR_PWRD2_0
948 * @arg LL_RNG_OSCS_CR_PWRD2_1
949 * @arg LL_RNG_OSCS_CR_PWRD2_2
950 * @arg LL_RNG_OSCS_CR_PWRD2_3
951 * @arg LL_RNG_OSCS_CR_PWRD2_4
952 * @arg LL_RNG_OSCS_CR_PWRD2_5
953 * @arg LL_RNG_OSCS_CR_PWRD2_6
954 * @arg LL_RNG_OSCS_CR_PWRD2_7
955 */
LL_RNG_GetPowerDownBlock2(RNG_TypeDef * RNGx)956 __STATIC_INLINE uint32_t LL_RNG_GetPowerDownBlock2(RNG_TypeDef *RNGx)
957 {
958 return (uint32_t)(READ_BIT(RNGx->OSCS_CR, RNG_OSCS_CR_PWRD2));
959 }
960
961 /**
962 * @brief Set the Power down of individual oscillators in triple-oscillator block number 3
963 * @rmtoll OSCS_CR PWRD3 LL_RNG_SetPowerDownBlock3
964 * @param RNGx RNG Instance
965 * @param value can be one of the following values:
966 * @arg LL_RNG_OSCS_CR_PWRD3_0
967 * @arg LL_RNG_OSCS_CR_PWRD3_1
968 * @arg LL_RNG_OSCS_CR_PWRD3_2
969 * @arg LL_RNG_OSCS_CR_PWRD3_3
970 * @arg LL_RNG_OSCS_CR_PWRD3_4
971 * @arg LL_RNG_OSCS_CR_PWRD3_5
972 * @arg LL_RNG_OSCS_CR_PWRD3_6
973 * @arg LL_RNG_OSCS_CR_PWRD3_7
974 * @retval None
975 */
LL_RNG_SetPowerDownBlock3(RNG_TypeDef * RNGx,uint32_t value)976 __STATIC_INLINE void LL_RNG_SetPowerDownBlock3(RNG_TypeDef *RNGx, uint32_t value)
977 {
978 MODIFY_REG(RNGx->OSCS_CR, RNG_OSCS_CR_PWRD3, value);
979 }
980
981 /**
982 * @brief Get the Power down of individual oscillators in triple-oscillator block number 3
983 * @rmtoll OSCS_CR PWRD3 LL_RNG_GetPowerDownBlock3
984 * @retval can be one of the following values
985 * @arg LL_RNG_OSCS_CR_PWRD3_0
986 * @arg LL_RNG_OSCS_CR_PWRD3_1
987 * @arg LL_RNG_OSCS_CR_PWRD3_2
988 * @arg LL_RNG_OSCS_CR_PWRD3_3
989 * @arg LL_RNG_OSCS_CR_PWRD3_4
990 * @arg LL_RNG_OSCS_CR_PWRD3_5
991 * @arg LL_RNG_OSCS_CR_PWRD3_6
992 * @arg LL_RNG_OSCS_CR_PWRD3_7
993 */
LL_RNG_GetPowerDownBlock3(RNG_TypeDef * RNGx)994 __STATIC_INLINE uint32_t LL_RNG_GetPowerDownBlock3(RNG_TypeDef *RNGx)
995 {
996 return (uint32_t)(READ_BIT(RNGx->OSCS_CR, RNG_OSCS_CR_PWRD3));
997 }
998
999 /**
1000 * @brief Set the When set, selection of resynchronized output of oscillators
1001 * @note It is recommended to disable RNG before changing this value
1002 * @rmtoll OSCS_CR SYNC_OSCS LL_RNG_SetSyncOscs
1003 * @param RNGx RNG Instance
1004 * @param value can be one of the following values:
1005 * @arg LL_RNG_OSCS_CR_SYNC_OSCS_0
1006 * @arg LL_RNG_OSCS_CR_SYNC_OSCS_1
1007 * @retval None
1008 */
LL_RNG_SetSyncOscs(RNG_TypeDef * RNGx,uint32_t value)1009 __STATIC_INLINE void LL_RNG_SetSyncOscs(RNG_TypeDef *RNGx, uint32_t value)
1010 {
1011 MODIFY_REG(RNGx->OSCS_CR, RNG_OSCS_CR_SYNC_OSCS, value);
1012 }
1013
1014 /**
1015 * @brief Get the When set, selection of resynchronized output of oscillators
1016 * @note It is recommended to disable RNG before changing this value
1017 * @rmtoll OSCS_CR SYNC_OSCS LL_RNG_GetSyncOscs
1018 * @retval can be one of the following values
1019 * @arg LL_RNG_OSCS_CR_SYNC_OSCS_0
1020 * @arg LL_RNG_OSCS_CR_SYNC_OSCS_1
1021 */
LL_RNG_GetSyncOscs(RNG_TypeDef * RNGx)1022 __STATIC_INLINE uint32_t LL_RNG_GetSyncOscs(RNG_TypeDef *RNGx)
1023 {
1024 return (uint32_t)(READ_BIT(RNGx->OSCS_CR, RNG_OSCS_CR_SYNC_OSCS));
1025 }
1026
1027 /**
1028 * @brief Set the Reset AES post processing
1029 * @note When writing a 1, the AES post processing is reinitialized, resulting in a new key and new state
1030 generation before 128-bit random words generation. The 1 written is frozen until it is seen by RNG core clock domain
1031 after resynchronization. Then it is automatically reset. It also reruns analog source health tests0x0 No effect0x1
1032 Reset AES core
1033 * @rmtoll POSTP_CR AES_RESET LL_RNG_SetAesReset
1034 * @param RNGx RNG Instance
1035 * @param value can be one of the following values:
1036 * @arg LL_RNG_POSTP_CR_AES_RESET_0
1037 * @arg LL_RNG_POSTP_CR_AES_RESET_1
1038 * @retval None
1039 */
LL_RNG_SetAesReset(RNG_TypeDef * RNGx,uint32_t value)1040 __STATIC_INLINE void LL_RNG_SetAesReset(RNG_TypeDef *RNGx, uint32_t value)
1041 {
1042 MODIFY_REG(RNGx->POSTP_CR, RNG_POSTP_CR_AES_RESET, value);
1043 }
1044
1045 /**
1046 * @brief Get the Reset AES post processing
1047 * @note When writing a 1, the AES post processing is reinitialized, resulting in a new key and new state
1048 generation before 128-bit random words generation. The 1 written is frozen until it is seen by RNG core clock
1049 domain after resynchronization. Then it is automatically reset. It also reruns analog source health tests0x0 No
1050 effect0x1 Reset AES core
1051 * @rmtoll POSTP_CR AES_RESET LL_RNG_GetAesReset
1052 * @retval can be one of the following values
1053 * @arg LL_RNG_POSTP_CR_AES_RESET_0
1054 * @arg LL_RNG_POSTP_CR_AES_RESET_1
1055 */
LL_RNG_GetAesReset(RNG_TypeDef * RNGx)1056 __STATIC_INLINE uint32_t LL_RNG_GetAesReset(RNG_TypeDef *RNGx)
1057 {
1058 return (uint32_t)(READ_BIT(RNGx->POSTP_CR, RNG_POSTP_CR_AES_RESET));
1059 }
1060
1061 /**
1062 * @brief Set the NB_LOOP_AES is the number of 128-bit words got from the noise source that have to be processed
1063 by AES for generating a single 128-bit random word
1064 * @note By default, this value is set to 2 (128 bits generated before an AES processing).A new AES processing
1065 is started only when the previous one is completed.0: value means 16 loops
1066 * @rmtoll POSTP_CR NB_LOOP_AES LL_RNG_SetNbLoopAes
1067 * @param RNGx RNG Instance
1068 * @param value can be one of the following values:
1069 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_0
1070 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_1
1071 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_2
1072 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_3
1073 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_4
1074 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_5
1075 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_6
1076 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_7
1077 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_8
1078 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_9
1079 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_10
1080 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_11
1081 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_12
1082 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_13
1083 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_14
1084 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_15
1085 * @retval None
1086 */
LL_RNG_SetNbLoopAes(RNG_TypeDef * RNGx,uint32_t value)1087 __STATIC_INLINE void LL_RNG_SetNbLoopAes(RNG_TypeDef *RNGx, uint32_t value)
1088 {
1089 MODIFY_REG(RNGx->POSTP_CR, RNG_POSTP_CR_NB_LOOP_AES, value);
1090 }
1091
1092 /**
1093 * @brief Get the NB_LOOP_AES is the number of 128-bit words got from the noise source that have to be processed by
1094 AES for generating a single 128-bit random word
1095 * @note By default, this value is set to 2 (128 bits generated before an AES processing).A new AES processing is
1096 started only when the previous one is completed.0: value means 16 loops
1097 * @rmtoll POSTP_CR NB_LOOP_AES LL_RNG_GetNbLoopAes
1098 * @retval can be one of the following values
1099 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_0
1100 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_1
1101 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_2
1102 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_3
1103 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_4
1104 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_5
1105 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_6
1106 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_7
1107 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_8
1108 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_9
1109 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_10
1110 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_11
1111 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_12
1112 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_13
1113 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_14
1114 * @arg LL_RNG_POSTP_CR_NB_LOOP_AES_15
1115 */
LL_RNG_GetNbLoopAes(RNG_TypeDef * RNGx)1116 __STATIC_INLINE uint32_t LL_RNG_GetNbLoopAes(RNG_TypeDef *RNGx)
1117 {
1118 return (uint32_t)(READ_BIT(RNGx->POSTP_CR, RNG_POSTP_CR_NB_LOOP_AES));
1119 }
1120
1121 /**
1122 * @brief Set the Number of 128-bit random words generated before AES automatically resets
1123 * @note This number is in the range of 1 to 65535 words. Value 0x0000 means that AES is never reinitialized
1124 * @rmtoll POSTP_CR NB_RND_REINIT LL_RNG_SetNbRndReinit
1125 * @param RNGx RNG Instance
1126 * @param value parameter must be a number between 0 and 65535 (form 0x0 to 0xffff)
1127 * @retval None
1128 */
LL_RNG_SetNbRndReinit(RNG_TypeDef * RNGx,uint32_t value)1129 __STATIC_INLINE void LL_RNG_SetNbRndReinit(RNG_TypeDef *RNGx, uint32_t value)
1130 {
1131 MODIFY_REG(RNGx->POSTP_CR, RNG_POSTP_CR_NB_RND_REINIT, value << RNG_POSTP_CR_NB_RND_REINIT_Pos);
1132 }
1133
1134 /**
1135 * @brief Get the Number of 128-bit random words generated before AES automatically resets
1136 * @note This number is in the range of 1 to 65535 words. Value 0x0000 means that AES is never reinitialized
1137 * @rmtoll POSTP_CR NB_RND_REINIT LL_RNG_GetNbRndReinit
1138 * @retval can be one of the following values
1139 */
LL_RNG_GetNbRndReinit(RNG_TypeDef * RNGx)1140 __STATIC_INLINE uint32_t LL_RNG_GetNbRndReinit(RNG_TypeDef *RNGx)
1141 {
1142 return (uint32_t)(READ_BIT(RNGx->POSTP_CR, RNG_POSTP_CR_NB_RND_REINIT) >> RNG_POSTP_CR_NB_RND_REINIT_Pos);
1143 }
1144
1145 /**
1146 * @brief Get the AES Post processing has been fully initialized (key and state) and is ready for generating 128-bit
1147 random words
1148 * @note 0x0 AES core is not initialized (no key or state set).0x1 AES core is fully initialized
1149 * @rmtoll POSTP_SR AES_INIT LL_RNG_GetAesInit
1150 * @retval can be one of the following values
1151 * @arg LL_RNG_POSTP_SR_AES_INIT_0
1152 * @arg LL_RNG_POSTP_SR_AES_INIT_1
1153 */
LL_RNG_GetAesInit(RNG_TypeDef * RNGx)1154 __STATIC_INLINE uint32_t LL_RNG_GetAesInit(RNG_TypeDef *RNGx)
1155 {
1156 return (uint32_t)(READ_BIT(RNGx->POSTP_SR, RNG_POSTP_SR_AES_INIT));
1157 }
1158
1159 /**
1160 * @brief Get the AES random key has been generated and loaded in AES key register
1161 * @note 0x0 AES core is waiting for 128 random bits from the entropy sources for generating its key0x1 AES key
1162 register has been loaded with a random key
1163 * @rmtoll POSTP_SR AES_KEY_LD LL_RNG_GetAesKeyLd
1164 * @retval can be one of the following values
1165 * @arg LL_RNG_POSTP_SR_AES_KEY_LD_0
1166 * @arg LL_RNG_POSTP_SR_AES_KEY_LD_1
1167 */
LL_RNG_GetAesKeyLd(RNG_TypeDef * RNGx)1168 __STATIC_INLINE uint32_t LL_RNG_GetAesKeyLd(RNG_TypeDef *RNGx)
1169 {
1170 return (uint32_t)(READ_BIT(RNGx->POSTP_SR, RNG_POSTP_SR_AES_KEY_LD));
1171 }
1172
1173 /**
1174 * @brief Get the AES core is busy, generating a random value
1175 * @note 0x0 AES core is idle0x1 AES core is busy
1176 * @rmtoll POSTP_SR AES_BUSY LL_RNG_GetAesBusy
1177 * @retval can be one of the following values
1178 * @arg LL_RNG_POSTP_SR_AES_BUSY_0
1179 * @arg LL_RNG_POSTP_SR_AES_BUSY_1
1180 */
LL_RNG_GetAesBusy(RNG_TypeDef * RNGx)1181 __STATIC_INLINE uint32_t LL_RNG_GetAesBusy(RNG_TypeDef *RNGx)
1182 {
1183 return (uint32_t)(READ_BIT(RNGx->POSTP_SR, RNG_POSTP_SR_AES_BUSY));
1184 }
1185
1186 /**
1187 * @brief Get the AES-CMAC health test is completed
1188 * @rmtoll POSTP_SR AES_HEALTH_DONE LL_RNG_GetAesHealthDone
1189 * @retval can be one of the following values
1190 * @arg LL_RNG_POSTP_SR_AES_HEALTH_DONE_0
1191 * @arg LL_RNG_POSTP_SR_AES_HEALTH_DONE_1
1192 */
LL_RNG_GetAesHealthDone(RNG_TypeDef * RNGx)1193 __STATIC_INLINE uint32_t LL_RNG_GetAesHealthDone(RNG_TypeDef *RNGx)
1194 {
1195 return (uint32_t)(READ_BIT(RNGx->POSTP_SR, RNG_POSTP_SR_AES_HEALTH_DONE));
1196 }
1197
1198 /**
1199 * @brief Get the Health test error on AES-CMAC sub-keys generation
1200 * @rmtoll POSTP_SR AES_K12_ERROR LL_RNG_GetAesK12Error
1201 * @retval can be one of the following values
1202 * @arg LL_RNG_POSTP_SR_AES_K12_ERROR_0
1203 * @arg LL_RNG_POSTP_SR_AES_K12_ERROR_1
1204 */
LL_RNG_GetAesK12Error(RNG_TypeDef * RNGx)1205 __STATIC_INLINE uint32_t LL_RNG_GetAesK12Error(RNG_TypeDef *RNGx)
1206 {
1207 return (uint32_t)(READ_BIT(RNGx->POSTP_SR, RNG_POSTP_SR_AES_K12_ERROR));
1208 }
1209
1210 /**
1211 * @brief Get the Health test error on AES-CMAC output generation
1212 * @rmtoll POSTP_SR AES_DOUT_ERROR LL_RNG_GetAesDoutError
1213 * @retval can be one of the following values
1214 * @arg LL_RNG_POSTP_SR_AES_DOUT_ERROR_0
1215 * @arg LL_RNG_POSTP_SR_AES_DOUT_ERROR_1
1216 */
LL_RNG_GetAesDoutError(RNG_TypeDef * RNGx)1217 __STATIC_INLINE uint32_t LL_RNG_GetAesDoutError(RNG_TypeDef *RNGx)
1218 {
1219 return (uint32_t)(READ_BIT(RNGx->POSTP_SR, RNG_POSTP_SR_AES_DOUT_ERROR));
1220 }
1221
1222 /**
1223 * @brief Set the Bits 31 to 0 of AES 128-bit Default Key
1224 * @rmtoll DEFKEY0 RNG_DEFKEY0 LL_RNG_SetRngDefkey0
1225 * @param RNGx RNG Instance
1226 * @param value parameter must be a number between 0 and 4294967295 (form 0x0 to 0xffffffff)
1227 * @retval None
1228 */
LL_RNG_SetRngDefkey0(RNG_TypeDef * RNGx,uint32_t value)1229 __STATIC_INLINE void LL_RNG_SetRngDefkey0(RNG_TypeDef *RNGx, uint32_t value)
1230 {
1231 MODIFY_REG(RNGx->DEFKEY0, RNG_DEFKEY0_RNG_DEFKEY0, value << RNG_DEFKEY0_RNG_DEFKEY0_Pos);
1232 }
1233
1234 /**
1235 * @brief Get the Bits 31 to 0 of AES 128-bit Default Key
1236 * @rmtoll DEFKEY0 RNG_DEFKEY0 LL_RNG_GetRngDefkey0
1237 * @retval can be one of the following values
1238 */
LL_RNG_GetRngDefkey0(RNG_TypeDef * RNGx)1239 __STATIC_INLINE uint32_t LL_RNG_GetRngDefkey0(RNG_TypeDef *RNGx)
1240 {
1241 return (uint32_t)(READ_BIT(RNGx->DEFKEY0, RNG_DEFKEY0_RNG_DEFKEY0) >> RNG_DEFKEY0_RNG_DEFKEY0_Pos);
1242 }
1243
1244 /**
1245 * @brief Set the Bits 63 to 31 of AES 128-bit Default Key
1246 * @rmtoll DEFKEY1 RNG_DEFKEY1 LL_RNG_SetRngDefkey1
1247 * @param RNGx RNG Instance
1248 * @param value parameter must be a number between 0 and 4294967295 (form 0x0 to 0xffffffff)
1249 * @retval None
1250 */
LL_RNG_SetRngDefkey1(RNG_TypeDef * RNGx,uint32_t value)1251 __STATIC_INLINE void LL_RNG_SetRngDefkey1(RNG_TypeDef *RNGx, uint32_t value)
1252 {
1253 MODIFY_REG(RNGx->DEFKEY1, RNG_DEFKEY1_RNG_DEFKEY1, value << RNG_DEFKEY1_RNG_DEFKEY1_Pos);
1254 }
1255
1256 /**
1257 * @brief Get the Bits 63 to 31 of AES 128-bit Default Key
1258 * @rmtoll DEFKEY1 RNG_DEFKEY1 LL_RNG_GetRngDefkey1
1259 * @retval can be one of the following values
1260 */
LL_RNG_GetRngDefkey1(RNG_TypeDef * RNGx)1261 __STATIC_INLINE uint32_t LL_RNG_GetRngDefkey1(RNG_TypeDef *RNGx)
1262 {
1263 return (uint32_t)(READ_BIT(RNGx->DEFKEY1, RNG_DEFKEY1_RNG_DEFKEY1) >> RNG_DEFKEY1_RNG_DEFKEY1_Pos);
1264 }
1265
1266 /**
1267 * @brief Set the Bits 95 to 64 of AES 128-bit Default Key
1268 * @rmtoll DEFKEY2 RNG_DEFKEY2 LL_RNG_SetRngDefkey2
1269 * @param RNGx RNG Instance
1270 * @param value parameter must be a number between 0 and 4294967295 (form 0x0 to 0xffffffff)
1271 * @retval None
1272 */
LL_RNG_SetRngDefkey2(RNG_TypeDef * RNGx,uint32_t value)1273 __STATIC_INLINE void LL_RNG_SetRngDefkey2(RNG_TypeDef *RNGx, uint32_t value)
1274 {
1275 MODIFY_REG(RNGx->DEFKEY2, RNG_DEFKEY2_RNG_DEFKEY2, value << RNG_DEFKEY2_RNG_DEFKEY2_Pos);
1276 }
1277
1278 /**
1279 * @brief Get the Bits 95 to 64 of AES 128-bit Default Key
1280 * @rmtoll DEFKEY2 RNG_DEFKEY2 LL_RNG_GetRngDefkey2
1281 * @retval can be one of the following values
1282 */
LL_RNG_GetRngDefkey2(RNG_TypeDef * RNGx)1283 __STATIC_INLINE uint32_t LL_RNG_GetRngDefkey2(RNG_TypeDef *RNGx)
1284 {
1285 return (uint32_t)(READ_BIT(RNGx->DEFKEY2, RNG_DEFKEY2_RNG_DEFKEY2) >> RNG_DEFKEY2_RNG_DEFKEY2_Pos);
1286 }
1287
1288 /**
1289 * @brief Set the Bits 127 to 96 of AES 128-bit Default Key
1290 * @rmtoll DEFKEY3 RNG_DEFKEY3 LL_RNG_SetRngDefkey3
1291 * @param RNGx RNG Instance
1292 * @param value parameter must be a number between 0 and 4294967295 (form 0x0 to 0xffffffff)
1293 * @retval None
1294 */
LL_RNG_SetRngDefkey3(RNG_TypeDef * RNGx,uint32_t value)1295 __STATIC_INLINE void LL_RNG_SetRngDefkey3(RNG_TypeDef *RNGx, uint32_t value)
1296 {
1297 MODIFY_REG(RNGx->DEFKEY3, RNG_DEFKEY3_RNG_DEFKEY3, value << RNG_DEFKEY3_RNG_DEFKEY3_Pos);
1298 }
1299
1300 /**
1301 * @brief Get the Bits 127 to 96 of AES 128-bit Default Key
1302 * @rmtoll DEFKEY3 RNG_DEFKEY3 LL_RNG_GetRngDefkey3
1303 * @retval can be one of the following values
1304 */
LL_RNG_GetRngDefkey3(RNG_TypeDef * RNGx)1305 __STATIC_INLINE uint32_t LL_RNG_GetRngDefkey3(RNG_TypeDef *RNGx)
1306 {
1307 return (uint32_t)(READ_BIT(RNGx->DEFKEY3, RNG_DEFKEY3_RNG_DEFKEY3) >> RNG_DEFKEY3_RNG_DEFKEY3_Pos);
1308 }
1309
1310 /**
1311 * @brief Set the Cutoff value of Repetition Test
1312 * @note The default value is set to 51. Caution: To be handled with care as any change can lead to misbehavior of
1313 RNG
1314 * @rmtoll HEALTH_CR REPET_CUTOFF LL_RNG_SetRepetCutoff
1315 * @param RNGx RNG Instance
1316 * @param value parameter must be a number between 0 and 255 (form 0x0 to 0xff)
1317 * @retval None
1318 */
LL_RNG_SetRepetCutoff(RNG_TypeDef * RNGx,uint32_t value)1319 __STATIC_INLINE void LL_RNG_SetRepetCutoff(RNG_TypeDef *RNGx, uint32_t value)
1320 {
1321 MODIFY_REG(RNGx->HEALTH_CR, RNG_HEALTH_CR_REPET_CUTOFF, value << RNG_HEALTH_CR_REPET_CUTOFF_Pos);
1322 }
1323
1324 /**
1325 * @brief Get the Cutoff value of Repetition Test
1326 * @note The default value is set to 51. Caution: To be handled with care as any change can lead to misbehavior of
1327 RNG
1328 * @rmtoll HEALTH_CR REPET_CUTOFF LL_RNG_GetRepetCutoff
1329 * @retval can be one of the following values
1330 */
LL_RNG_GetRepetCutoff(RNG_TypeDef * RNGx)1331 __STATIC_INLINE uint32_t LL_RNG_GetRepetCutoff(RNG_TypeDef *RNGx)
1332 {
1333 return (uint32_t)(READ_BIT(RNGx->HEALTH_CR, RNG_HEALTH_CR_REPET_CUTOFF) >> RNG_HEALTH_CR_REPET_CUTOFF_Pos);
1334 }
1335
1336 /**
1337 * @brief Set the Cutoff value of Adaptive Test
1338 * @note The default value is set to 699. Caution: To be handled with care as any change can lead to misbehavior of
1339 RNG
1340 * @rmtoll HEALTH_CR ADAP_CUTOFF LL_RNG_SetAdapCutoff
1341 * @param RNGx RNG Instance
1342 * @param value parameter must be a number between 0 and 1023 (form 0x0 to 0x3ff)
1343 * @retval None
1344 */
LL_RNG_SetAdapCutoff(RNG_TypeDef * RNGx,uint32_t value)1345 __STATIC_INLINE void LL_RNG_SetAdapCutoff(RNG_TypeDef *RNGx, uint32_t value)
1346 {
1347 MODIFY_REG(RNGx->HEALTH_CR, RNG_HEALTH_CR_ADAP_CUTOFF, value << RNG_HEALTH_CR_ADAP_CUTOFF_Pos);
1348 }
1349
1350 /**
1351 * @brief Get the Cutoff value of Adaptive Test
1352 * @note The default value is set to 699. Caution: To be handled with care as any change can lead to misbehavior of
1353 RNG
1354 * @rmtoll HEALTH_CR ADAP_CUTOFF LL_RNG_GetAdapCutoff
1355 * @retval can be one of the following values
1356 */
LL_RNG_GetAdapCutoff(RNG_TypeDef * RNGx)1357 __STATIC_INLINE uint32_t LL_RNG_GetAdapCutoff(RNG_TypeDef *RNGx)
1358 {
1359 return (uint32_t)(READ_BIT(RNGx->HEALTH_CR, RNG_HEALTH_CR_ADAP_CUTOFF) >> RNG_HEALTH_CR_ADAP_CUTOFF_Pos);
1360 }
1361
1362 /**
1363 * @brief Set the Number of iterations minus 1 of Adaptive test during initialization phase
1364 * @note Default value is set to 0 i.e. 1 iteration
1365 * @rmtoll HEALTH_CR ITER_ADAP LL_RNG_SetIterAdap
1366 * @param RNGx RNG Instance
1367 * @param value can be one of the following values:
1368 * @arg LL_RNG_HEALTH_CR_ITER_ADAP_0
1369 * @arg LL_RNG_HEALTH_CR_ITER_ADAP_1
1370 * @arg LL_RNG_HEALTH_CR_ITER_ADAP_2
1371 * @arg LL_RNG_HEALTH_CR_ITER_ADAP_3
1372 * @retval None
1373 */
LL_RNG_SetIterAdap(RNG_TypeDef * RNGx,uint32_t value)1374 __STATIC_INLINE void LL_RNG_SetIterAdap(RNG_TypeDef *RNGx, uint32_t value)
1375 {
1376 MODIFY_REG(RNGx->HEALTH_CR, RNG_HEALTH_CR_ITER_ADAP, value);
1377 }
1378
1379 /**
1380 * @brief Get the Number of iterations minus 1 of Adaptive test during initialization phase
1381 * @note Default value is set to 0 i.e. 1 iteration
1382 * @rmtoll HEALTH_CR ITER_ADAP LL_RNG_GetIterAdap
1383 * @retval can be one of the following values
1384 * @arg LL_RNG_HEALTH_CR_ITER_ADAP_0
1385 * @arg LL_RNG_HEALTH_CR_ITER_ADAP_1
1386 * @arg LL_RNG_HEALTH_CR_ITER_ADAP_2
1387 * @arg LL_RNG_HEALTH_CR_ITER_ADAP_3
1388 */
LL_RNG_GetIterAdap(RNG_TypeDef * RNGx)1389 __STATIC_INLINE uint32_t LL_RNG_GetIterAdap(RNG_TypeDef *RNGx)
1390 {
1391 return (uint32_t)(READ_BIT(RNGx->HEALTH_CR, RNG_HEALTH_CR_ITER_ADAP));
1392 }
1393
1394 /**
1395 * @brief Set the Cutoff value of Repetition Test
1396 * @note The default value is set to 51. Caution: To be handled with care as any change can lead to misbehavior of
1397 RNG
1398 * @rmtoll HEALTH_OSC1_CR REPET_CUTOFF_OSC1 LL_RNG_SetRepetCutoffOsc1
1399 * @param RNGx RNG Instance
1400 * @param value parameter must be a number between 0 and 255 (form 0x0 to 0xff)
1401 * @retval None
1402 */
LL_RNG_SetRepetCutoffOsc1(RNG_TypeDef * RNGx,uint32_t value)1403 __STATIC_INLINE void LL_RNG_SetRepetCutoffOsc1(RNG_TypeDef *RNGx, uint32_t value)
1404 {
1405 MODIFY_REG(RNGx->HEALTH_OSC1_CR, RNG_HEALTH_OSC1_CR_REPET_CUTOFF_OSC1,
1406 value << RNG_HEALTH_OSC1_CR_REPET_CUTOFF_OSC1_Pos);
1407 }
1408
1409 /**
1410 * @brief Get the Cutoff value of Repetition Test
1411 * @note The default value is set to 51. Caution: To be handled with care as any change can lead to misbehavior of
1412 RNG
1413 * @rmtoll HEALTH_OSC1_CR REPET_CUTOFF_OSC1 LL_RNG_GetRepetCutoffOsc1
1414 * @retval can be one of the following values
1415 */
LL_RNG_GetRepetCutoffOsc1(RNG_TypeDef * RNGx)1416 __STATIC_INLINE uint32_t LL_RNG_GetRepetCutoffOsc1(RNG_TypeDef *RNGx)
1417 {
1418 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC1_CR,
1419 RNG_HEALTH_OSC1_CR_REPET_CUTOFF_OSC1) >> RNG_HEALTH_OSC1_CR_REPET_CUTOFF_OSC1_Pos);
1420 }
1421
1422 /**
1423 * @brief Set the Cutoff value of Adaptive Test
1424 * @note The default value is set to 699. Caution: To be handled with care as any change can lead to misbehavior of
1425 RNG
1426 * @rmtoll HEALTH_OSC1_CR ADAP_CUTOFF_OSC1 LL_RNG_SetAdapCutoffOsc1
1427 * @param RNGx RNG Instance
1428 * @param value parameter must be a number between 0 and 1023 (form 0x0 to 0x3ff)
1429 * @retval None
1430 */
LL_RNG_SetAdapCutoffOsc1(RNG_TypeDef * RNGx,uint32_t value)1431 __STATIC_INLINE void LL_RNG_SetAdapCutoffOsc1(RNG_TypeDef *RNGx, uint32_t value)
1432 {
1433 MODIFY_REG(RNGx->HEALTH_OSC1_CR, RNG_HEALTH_OSC1_CR_ADAP_CUTOFF_OSC1,
1434 value << RNG_HEALTH_OSC1_CR_ADAP_CUTOFF_OSC1_Pos);
1435 }
1436
1437 /**
1438 * @brief Get the Cutoff value of Adaptive Test
1439 * @note The default value is set to 699. Caution: To be handled with care as any change can lead to misbehavior
1440 of RNG
1441 * @rmtoll HEALTH_OSC1_CR ADAP_CUTOFF_OSC1 LL_RNG_GetAdapCutoffOsc1
1442 * @retval can be one of the following values
1443 */
LL_RNG_GetAdapCutoffOsc1(RNG_TypeDef * RNGx)1444 __STATIC_INLINE uint32_t LL_RNG_GetAdapCutoffOsc1(RNG_TypeDef *RNGx)
1445 {
1446 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC1_CR,
1447 RNG_HEALTH_OSC1_CR_ADAP_CUTOFF_OSC1) >> RNG_HEALTH_OSC1_CR_ADAP_CUTOFF_OSC1_Pos);
1448 }
1449
1450 /**
1451 * @brief Set the Cutoff value of Repetition Test
1452 * @note The default value is set to 51.Caution: To be handled with care as any change can lead to misbehavior
1453 of RNG
1454 * @rmtoll HEALTH_OSC2_CR REPET_CUTOFF_OSC2 LL_RNG_SetRepetCutoffOsc2
1455 * @param RNGx RNG Instance
1456 * @param value parameter must be a number between 0 and 255 (form 0x0 to 0xff)
1457 * @retval None
1458 */
LL_RNG_SetRepetCutoffOsc2(RNG_TypeDef * RNGx,uint32_t value)1459 __STATIC_INLINE void LL_RNG_SetRepetCutoffOsc2(RNG_TypeDef *RNGx, uint32_t value)
1460 {
1461 MODIFY_REG(RNGx->HEALTH_OSC2_CR, RNG_HEALTH_OSC2_CR_REPET_CUTOFF_OSC2,
1462 value << RNG_HEALTH_OSC2_CR_REPET_CUTOFF_OSC2_Pos);
1463 }
1464
1465 /**
1466 * @brief Get the Cutoff value of Repetition Test
1467 * @note The default value is set to 51.Caution: To be handled with care as any change can lead to misbehavior of
1468 RNG
1469 * @rmtoll HEALTH_OSC2_CR REPET_CUTOFF_OSC2 LL_RNG_GetRepetCutoffOsc2
1470 * @retval can be one of the following values
1471 */
LL_RNG_GetRepetCutoffOsc2(RNG_TypeDef * RNGx)1472 __STATIC_INLINE uint32_t LL_RNG_GetRepetCutoffOsc2(RNG_TypeDef *RNGx)
1473 {
1474 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC2_CR,
1475 RNG_HEALTH_OSC2_CR_REPET_CUTOFF_OSC2) >> RNG_HEALTH_OSC2_CR_REPET_CUTOFF_OSC2_Pos);
1476 }
1477
1478 /**
1479 * @brief Set the Cutoff value of Adaptive Test
1480 * @note The default value is set to 699.Caution: To be handled with care as any change can lead to misbehavior of
1481 RNG
1482 * @rmtoll HEALTH_OSC2_CR ADAP_CUTOFF_OSC2 LL_RNG_SetAdapCutoffOsc2
1483 * @param RNGx RNG Instance
1484 * @param value parameter must be a number between 0 and 1023 (form 0x0 to 0x3ff)
1485 * @retval None
1486 */
LL_RNG_SetAdapCutoffOsc2(RNG_TypeDef * RNGx,uint32_t value)1487 __STATIC_INLINE void LL_RNG_SetAdapCutoffOsc2(RNG_TypeDef *RNGx, uint32_t value)
1488 {
1489 MODIFY_REG(RNGx->HEALTH_OSC2_CR, RNG_HEALTH_OSC2_CR_ADAP_CUTOFF_OSC2,
1490 value << RNG_HEALTH_OSC2_CR_ADAP_CUTOFF_OSC2_Pos);
1491 }
1492
1493 /**
1494 * @brief Get the Cutoff value of Adaptive Test
1495 * @note The default value is set to 699.Caution: To be handled with care as any change can lead to misbehavior of
1496 RNG
1497 * @rmtoll HEALTH_OSC2_CR ADAP_CUTOFF_OSC2 LL_RNG_GetAdapCutoffOsc2
1498 * @retval can be one of the following values
1499 */
LL_RNG_GetAdapCutoffOsc2(RNG_TypeDef * RNGx)1500 __STATIC_INLINE uint32_t LL_RNG_GetAdapCutoffOsc2(RNG_TypeDef *RNGx)
1501 {
1502 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC2_CR,
1503 RNG_HEALTH_OSC2_CR_ADAP_CUTOFF_OSC2) >> RNG_HEALTH_OSC2_CR_ADAP_CUTOFF_OSC2_Pos);
1504 }
1505
1506 /**
1507 * @brief Set the Cutoff value of Repetition Test
1508 * @note The default value is set to 51.Caution: To be handled with care as any change can lead to misbehavior of
1509 RNG
1510 * @rmtoll HEALTH_OSC3_CR REPET_CUTOFF_OSC3 LL_RNG_SetRepetCutoffOsc3
1511 * @param RNGx RNG Instance
1512 * @param value parameter must be a number between 0 and 255 (form 0x0 to 0xff)
1513 * @retval None
1514 */
LL_RNG_SetRepetCutoffOsc3(RNG_TypeDef * RNGx,uint32_t value)1515 __STATIC_INLINE void LL_RNG_SetRepetCutoffOsc3(RNG_TypeDef *RNGx, uint32_t value)
1516 {
1517 MODIFY_REG(RNGx->HEALTH_OSC3_CR, RNG_HEALTH_OSC3_CR_REPET_CUTOFF_OSC3,
1518 value << RNG_HEALTH_OSC3_CR_REPET_CUTOFF_OSC3_Pos);
1519 }
1520
1521 /**
1522 * @brief Get the Cutoff value of Repetition Test
1523 * @note The default value is set to 51.Caution: To be handled with care as any change can lead to misbehavior of
1524 RNG
1525 * @rmtoll HEALTH_OSC3_CR REPET_CUTOFF_OSC3 LL_RNG_GetRepetCutoffOsc3
1526 * @retval can be one of the following values
1527 */
LL_RNG_GetRepetCutoffOsc3(RNG_TypeDef * RNGx)1528 __STATIC_INLINE uint32_t LL_RNG_GetRepetCutoffOsc3(RNG_TypeDef *RNGx)
1529 {
1530 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC3_CR,
1531 RNG_HEALTH_OSC3_CR_REPET_CUTOFF_OSC3) >> RNG_HEALTH_OSC3_CR_REPET_CUTOFF_OSC3_Pos);
1532 }
1533
1534 /**
1535 * @brief Set the Cutoff value of Adaptive Test
1536 * @note The default value is set to 699. Caution: To be handled with care as any change can lead to misbehavior of
1537 RNG
1538 * @rmtoll HEALTH_OSC3_CR ADAP_CUTOFF_OSC3 LL_RNG_SetAdapCutoffOsc3
1539 * @param RNGx RNG Instance
1540 * @param value parameter must be a number between 0 and 1023 (form 0x0 to 0x3ff)
1541 * @retval None
1542 */
LL_RNG_SetAdapCutoffOsc3(RNG_TypeDef * RNGx,uint32_t value)1543 __STATIC_INLINE void LL_RNG_SetAdapCutoffOsc3(RNG_TypeDef *RNGx, uint32_t value)
1544 {
1545 MODIFY_REG(RNGx->HEALTH_OSC3_CR, RNG_HEALTH_OSC3_CR_ADAP_CUTOFF_OSC3,
1546 value << RNG_HEALTH_OSC3_CR_ADAP_CUTOFF_OSC3_Pos);
1547 }
1548
1549 /**
1550 * @brief Get the Cutoff value of Adaptive Test
1551 * @note The default value is set to 699. Caution: To be handled with care as any change can lead to misbehavior
1552 of RNG
1553 * @rmtoll HEALTH_OSC3_CR ADAP_CUTOFF_OSC3 LL_RNG_GetAdapCutoffOsc3
1554 * @retval can be one of the following values
1555 */
LL_RNG_GetAdapCutoffOsc3(RNG_TypeDef * RNGx)1556 __STATIC_INLINE uint32_t LL_RNG_GetAdapCutoffOsc3(RNG_TypeDef *RNGx)
1557 {
1558 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC3_CR,
1559 RNG_HEALTH_OSC3_CR_ADAP_CUTOFF_OSC3) >> RNG_HEALTH_OSC3_CR_ADAP_CUTOFF_OSC3_Pos);
1560 }
1561
1562 /**
1563 * @brief Get the Repetition error flag of first oscillator of first triple-oscillator cell
1564 * @rmtoll HEALTH_OSC1_SR TO1_REPET_ERROR LL_RNG_GetOSC1_To1RepetError
1565 * @retval can be one of the following values
1566 * @arg LL_RNG_HEALTH_OSC1_SR_TO1_REPET_ERROR_0
1567 * @arg LL_RNG_HEALTH_OSC1_SR_TO1_REPET_ERROR_1
1568 */
LL_RNG_GetOSC1_To1RepetError(RNG_TypeDef * RNGx)1569 __STATIC_INLINE uint32_t LL_RNG_GetOSC1_To1RepetError(RNG_TypeDef *RNGx)
1570 {
1571 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC1_SR, RNG_HEALTH_OSC1_SR_TO1_REPET_ERROR));
1572 }
1573
1574 /**
1575 * @brief Get the Adaptive error flag of first oscillator of first triple-oscillator cell
1576 * @rmtoll HEALTH_OSC1_SR TO1_ADAPT_ERROR LL_RNG_GetOSC1_To1AdaptError
1577 * @retval can be one of the following values
1578 * @arg LL_RNG_HEALTH_OSC1_SR_TO1_ADAPT_ERROR_0
1579 * @arg LL_RNG_HEALTH_OSC1_SR_TO1_ADAPT_ERROR_1
1580 */
LL_RNG_GetOSC1_To1AdaptError(RNG_TypeDef * RNGx)1581 __STATIC_INLINE uint32_t LL_RNG_GetOSC1_To1AdaptError(RNG_TypeDef *RNGx)
1582 {
1583 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC1_SR, RNG_HEALTH_OSC1_SR_TO1_ADAPT_ERROR));
1584 }
1585
1586 /**
1587 * @brief Get the Repetition error flag of first oscillator of second triple-oscillator cell
1588 * @rmtoll HEALTH_OSC1_SR TO2_REPET_ERROR LL_RNG_GetOSC_To2RepetError
1589 * @retval can be one of the following values
1590 * @arg LL_RNG_HEALTH_OSC1_SR_TO2_REPET_ERROR_0
1591 * @arg LL_RNG_HEALTH_OSC1_SR_TO2_REPET_ERROR_1
1592 */
LL_RNG_GetOSC_To2RepetError(RNG_TypeDef * RNGx)1593 __STATIC_INLINE uint32_t LL_RNG_GetOSC_To2RepetError(RNG_TypeDef *RNGx)
1594 {
1595 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC1_SR, RNG_HEALTH_OSC1_SR_TO2_REPET_ERROR));
1596 }
1597
1598 /**
1599 * @brief Get the Adaptive error flag of first oscillator of second triple-oscillator cell
1600 * @rmtoll HEALTH_OSC1_SR TO2_ADAPT_ERROR LL_RNG_GetOSC_To2AdaptError
1601 * @retval can be one of the following values
1602 * @arg LL_RNG_HEALTH_OSC1_SR_TO2_ADAPT_ERROR_0
1603 * @arg LL_RNG_HEALTH_OSC1_SR_TO2_ADAPT_ERROR_1
1604 */
LL_RNG_GetOSC_To2AdaptError(RNG_TypeDef * RNGx)1605 __STATIC_INLINE uint32_t LL_RNG_GetOSC_To2AdaptError(RNG_TypeDef *RNGx)
1606 {
1607 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC1_SR, RNG_HEALTH_OSC1_SR_TO2_ADAPT_ERROR));
1608 }
1609
1610 /**
1611 * @brief Get the Repetition error flag of first oscillator of third triple-oscillator cell
1612 * @rmtoll HEALTH_OSC1_SR TO3_REPET_ERROR LL_RNG_GetTo3RepetError
1613 * @retval can be one of the following values
1614 * @arg LL_RNG_HEALTH_OSC1_SR_TO3_REPET_ERROR_0
1615 * @arg LL_RNG_HEALTH_OSC1_SR_TO3_REPET_ERROR_1
1616 */
LL_RNG_GetTo3RepetError(RNG_TypeDef * RNGx)1617 __STATIC_INLINE uint32_t LL_RNG_GetTo3RepetError(RNG_TypeDef *RNGx)
1618 {
1619 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC1_SR, RNG_HEALTH_OSC1_SR_TO3_REPET_ERROR));
1620 }
1621
1622 /**
1623 * @brief Get the Adaptive error flag of first oscillator of third triple-oscillator cell
1624 * @rmtoll HEALTH_OSC1_SR TO3_ADAPT_ERROR LL_RNG_GetTo3AdaptError
1625 * @retval can be one of the following values
1626 * @arg LL_RNG_HEALTH_OSC1_SR_TO3_ADAPT_ERROR_0
1627 * @arg LL_RNG_HEALTH_OSC1_SR_TO3_ADAPT_ERROR_1
1628 */
LL_RNG_GetTo3AdaptError(RNG_TypeDef * RNGx)1629 __STATIC_INLINE uint32_t LL_RNG_GetTo3AdaptError(RNG_TypeDef *RNGx)
1630 {
1631 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC1_SR, RNG_HEALTH_OSC1_SR_TO3_ADAPT_ERROR));
1632 }
1633
1634 /**
1635 * @brief Get the Repetition error flag
1636 * @note Repetition error flag of first oscillator of first triple-oscillator cell
1637 * @rmtoll HEALTH_OSC2_SR TO1_REPET_ERROR LL_RNG_GetOSC2_To1RepetError
1638 * @retval can be one of the following values
1639 * @arg LL_RNG_HEALTH_OSC2_SR_TO1_REPET_ERROR_0
1640 * @arg LL_RNG_HEALTH_OSC2_SR_TO1_REPET_ERROR_1
1641 */
LL_RNG_GetOSC2_To1RepetError(RNG_TypeDef * RNGx)1642 __STATIC_INLINE uint32_t LL_RNG_GetOSC2_To1RepetError(RNG_TypeDef *RNGx)
1643 {
1644 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC2_SR, RNG_HEALTH_OSC2_SR_TO1_REPET_ERROR));
1645 }
1646
1647 /**
1648 * @brief Get the Adaptive error flag
1649 * @note Adaptive error flag of first oscillator of first triple-oscillator cell
1650 * @rmtoll HEALTH_OSC2_SR TO1_ADAPT_ERROR LL_RNG_GetOSC2_To1AdaptError
1651 * @retval can be one of the following values
1652 * @arg LL_RNG_HEALTH_OSC2_SR_TO1_ADAPT_ERROR_0
1653 * @arg LL_RNG_HEALTH_OSC2_SR_TO1_ADAPT_ERROR_1
1654 */
LL_RNG_GetOSC2_To1AdaptError(RNG_TypeDef * RNGx)1655 __STATIC_INLINE uint32_t LL_RNG_GetOSC2_To1AdaptError(RNG_TypeDef *RNGx)
1656 {
1657 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC2_SR, RNG_HEALTH_OSC2_SR_TO1_ADAPT_ERROR));
1658 }
1659
1660 /**
1661 * @brief Get the Repetition error flag of first oscillator of second triple-oscillator cell
1662 * @rmtoll HEALTH_OSC2_SR TO2_REPET_ERROR LL_RNG_GetOSC2_To2RepetError
1663 * @retval can be one of the following values
1664 * @arg LL_RNG_HEALTH_OSC2_SR_TO2_REPET_ERROR_0
1665 * @arg LL_RNG_HEALTH_OSC2_SR_TO2_REPET_ERROR_1
1666 */
LL_RNG_GetOSC2_To2RepetError(RNG_TypeDef * RNGx)1667 __STATIC_INLINE uint32_t LL_RNG_GetOSC2_To2RepetError(RNG_TypeDef *RNGx)
1668 {
1669 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC2_SR, RNG_HEALTH_OSC2_SR_TO2_REPET_ERROR));
1670 }
1671
1672 /**
1673 * @brief Get the Adaptive error flag of first oscillator of second triple-oscillator cell
1674 * @rmtoll HEALTH_OSC2_SR TO2_ADAPT_ERROR LL_RNG_GetOSC2_To2AdaptError
1675 * @retval can be one of the following values
1676 * @arg LL_RNG_HEALTH_OSC2_SR_TO2_ADAPT_ERROR_0
1677 * @arg LL_RNG_HEALTH_OSC2_SR_TO2_ADAPT_ERROR_1
1678 */
LL_RNG_GetOSC2_To2AdaptError(RNG_TypeDef * RNGx)1679 __STATIC_INLINE uint32_t LL_RNG_GetOSC2_To2AdaptError(RNG_TypeDef *RNGx)
1680 {
1681 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC2_SR, RNG_HEALTH_OSC2_SR_TO2_ADAPT_ERROR));
1682 }
1683
1684 /**
1685 * @brief Get the Repetition error flag of first oscillator of third triple-oscillator cell
1686 * @rmtoll HEALTH_OSC2_SR TO3_REPET_ERROR LL_RNG_GetOSC2_To3RepetError
1687 * @retval can be one of the following values
1688 * @arg LL_RNG_HEALTH_OSC2_SR_TO3_REPET_ERROR_0
1689 * @arg LL_RNG_HEALTH_OSC2_SR_TO3_REPET_ERROR_1
1690 */
LL_RNG_OSC2_GetTo3RepetError(RNG_TypeDef * RNGx)1691 __STATIC_INLINE uint32_t LL_RNG_OSC2_GetTo3RepetError(RNG_TypeDef *RNGx)
1692 {
1693 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC2_SR, RNG_HEALTH_OSC2_SR_TO3_REPET_ERROR));
1694 }
1695
1696 /**
1697 * @brief Get the Adaptive error flag of first oscillator of third triple-oscillator cell
1698 * @rmtoll HEALTH_OSC2_SR TO3_ADAPT_ERROR LL_RNG_GetOSC2_To3AdaptError
1699 * @retval can be one of the following values
1700 * @arg LL_RNG_HEALTH_OSC2_SR_TO3_ADAPT_ERROR_0
1701 * @arg LL_RNG_HEALTH_OSC2_SR_TO3_ADAPT_ERROR_1
1702 */
LL_RNG_GetOSC2_To3AdaptError(RNG_TypeDef * RNGx)1703 __STATIC_INLINE uint32_t LL_RNG_GetOSC2_To3AdaptError(RNG_TypeDef *RNGx)
1704 {
1705 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC2_SR, RNG_HEALTH_OSC2_SR_TO3_ADAPT_ERROR));
1706 }
1707
1708 /**
1709 * @brief Get the Repetition error flag of third oscillator of first triple-oscillator cell
1710 * @rmtoll HEALTH_OSC3_SR TO1_REPET_ERROR LL_RNG_GetOSC3_To1RepetError
1711 * @retval can be one of the following values
1712 * @arg LL_RNG_HEALTH_OSC3_SR_TO1_REPET_ERROR_0
1713 * @arg LL_RNG_HEALTH_OSC3_SR_TO1_REPET_ERROR_1
1714 */
LL_RNG_GetOSC3_To1RepetError(RNG_TypeDef * RNGx)1715 __STATIC_INLINE uint32_t LL_RNG_GetOSC3_To1RepetError(RNG_TypeDef *RNGx)
1716 {
1717 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC3_SR, RNG_HEALTH_OSC3_SR_TO1_REPET_ERROR));
1718 }
1719
1720 /**
1721 * @brief Get the Adaptive error flag of first oscillator of first triple-oscillator cell
1722 * @rmtoll HEALTH_OSC3_SR TO1_ADAPT_ERROR LL_RNG_GetOSC3_To1AdaptError
1723 * @retval can be one of the following values
1724 * @arg LL_RNG_HEALTH_OSC3_SR_TO1_ADAPT_ERROR_0
1725 * @arg LL_RNG_HEALTH_OSC3_SR_TO1_ADAPT_ERROR_1
1726 */
LL_RNG_GetOSC3_To1AdaptError(RNG_TypeDef * RNGx)1727 __STATIC_INLINE uint32_t LL_RNG_GetOSC3_To1AdaptError(RNG_TypeDef *RNGx)
1728 {
1729 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC3_SR, RNG_HEALTH_OSC3_SR_TO1_ADAPT_ERROR));
1730 }
1731
1732 /**
1733 * @brief Get the Repetition error flag of first oscillator of second triple-oscillator cell
1734 * @rmtoll HEALTH_OSC3_SR TO2_REPET_ERROR LL_RNG_GetOSC3_To2RepetError
1735 * @retval can be one of the following values
1736 * @arg LL_RNG_HEALTH_OSC3_SR_TO2_REPET_ERROR_0
1737 * @arg LL_RNG_HEALTH_OSC3_SR_TO2_REPET_ERROR_1
1738 */
LL_RNG_GetOSC3_To2RepetError(RNG_TypeDef * RNGx)1739 __STATIC_INLINE uint32_t LL_RNG_GetOSC3_To2RepetError(RNG_TypeDef *RNGx)
1740 {
1741 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC3_SR, RNG_HEALTH_OSC3_SR_TO2_REPET_ERROR));
1742 }
1743
1744 /**
1745 * @brief Get the Adaptive error flag of first oscillator of second triple-oscillator cell
1746 * @rmtoll HEALTH_OSC3_SR TO2_ADAPT_ERROR LL_RNG_GetOSC3_To2AdaptError
1747 * @retval can be one of the following values
1748 * @arg LL_RNG_HEALTH_OSC3_SR_TO2_ADAPT_ERROR_0
1749 * @arg LL_RNG_HEALTH_OSC3_SR_TO2_ADAPT_ERROR_1
1750 */
LL_RNG_GetOSC3_To2AdaptError(RNG_TypeDef * RNGx)1751 __STATIC_INLINE uint32_t LL_RNG_GetOSC3_To2AdaptError(RNG_TypeDef *RNGx)
1752 {
1753 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC3_SR, RNG_HEALTH_OSC3_SR_TO2_ADAPT_ERROR));
1754 }
1755
1756 /**
1757 * @brief Get the Repetition error flag of first oscillator of third triple-oscillator cell
1758 * @rmtoll HEALTH_OSC3_SR TO3_REPET_ERROR LL_RNG_GetOSC3_To3RepetError
1759 * @retval can be one of the following values
1760 * @arg LL_RNG_HEALTH_OSC3_SR_TO3_REPET_ERROR_0
1761 * @arg LL_RNG_HEALTH_OSC3_SR_TO3_REPET_ERROR_1
1762 */
LL_RNG_GetOSC3_To3RepetError(RNG_TypeDef * RNGx)1763 __STATIC_INLINE uint32_t LL_RNG_GetOSC3_To3RepetError(RNG_TypeDef *RNGx)
1764 {
1765 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC3_SR, RNG_HEALTH_OSC3_SR_TO3_REPET_ERROR));
1766 }
1767
1768 /**
1769 * @brief Get the Adaptive error flag of first oscillator of third triple-oscillator cell
1770 * @rmtoll HEALTH_OSC3_SR TO3_ADAPT_ERROR LL_RNG_GetOSC3_To3AdaptError
1771 * @retval can be one of the following values
1772 * @arg LL_RNG_HEALTH_OSC3_SR_TO3_ADAPT_ERROR_0
1773 * @arg LL_RNG_HEALTH_OSC3_SR_TO3_ADAPT_ERROR_1
1774 */
LL_RNG_GetOSC3_To3AdaptError(RNG_TypeDef * RNGx)1775 __STATIC_INLINE uint32_t LL_RNG_GetOSC3_To3AdaptError(RNG_TypeDef *RNGx)
1776 {
1777 return (uint32_t)(READ_BIT(RNGx->HEALTH_OSC3_SR, RNG_HEALTH_OSC3_SR_TO3_ADAPT_ERROR));
1778 }
1779
1780 /**
1781 * @brief RNG Enable Enable the interrupt when the output fifo is full of new random
1782 * @rmtoll IRQ_CR EN_FF_FULL_IRQ LL_RNG_EnableEnFfFullIrq
1783 * @param RNGx RNG Instance
1784 * @retval None
1785 */
LL_RNG_EnableEnFfFullIrq(RNG_TypeDef * RNGx)1786 __STATIC_INLINE void LL_RNG_EnableEnFfFullIrq(RNG_TypeDef *RNGx)
1787 {
1788 SET_BIT(RNGx->IRQ_CR, RNG_IRQ_CR_EN_FF_FULL_IRQ);
1789 }
1790
1791 /**
1792 * @brief RNG Disable Enable the interrupt when the output fifo is full of new random
1793 * @rmtoll IRQ_CR EN_FF_FULL_IRQ LL_RNG_DisableEnFfFullIrq
1794 * @param RNGx RNG Instance
1795 * @retval None
1796 */
LL_RNG_DisableEnFfFullIrq(RNG_TypeDef * RNGx)1797 __STATIC_INLINE void LL_RNG_DisableEnFfFullIrq(RNG_TypeDef *RNGx)
1798 {
1799 CLEAR_BIT(RNGx->IRQ_CR, RNG_IRQ_CR_EN_FF_FULL_IRQ);
1800 }
1801
1802 /**
1803 * @brief Indicate if EN_FF_FULL_IRQ is enabled. Enable the interrupt when the output fifo is full of new random
1804 * @rmtoll IRQ_CR EN_FF_FULL_IRQ LL_RNG_IsEnabledEnFfFullIrq
1805 * @param RNGx RNG Instance
1806 * @retval State of bit (1 or 0).
1807 */
LL_RNG_IsEnabledEnFfFullIrq(RNG_TypeDef * RNGx)1808 __STATIC_INLINE uint32_t LL_RNG_IsEnabledEnFfFullIrq(RNG_TypeDef *RNGx)
1809 {
1810 return ((READ_BIT(RNGx->IRQ_CR, RNG_IRQ_CR_EN_FF_FULL_IRQ) == (RNG_IRQ_CR_EN_FF_FULL_IRQ)) ? 1U : 0U);
1811 }
1812
1813 /**
1814 * @brief RNG Enable Enable the interrupt when an error is reported by the health tests
1815 * @rmtoll IRQ_CR EN_ERROR_IRQ LL_RNG_EnableEnErrorIrq
1816 * @param RNGx RNG Instance
1817 * @retval None
1818 */
LL_RNG_EnableEnErrorIrq(RNG_TypeDef * RNGx)1819 __STATIC_INLINE void LL_RNG_EnableEnErrorIrq(RNG_TypeDef *RNGx)
1820 {
1821 SET_BIT(RNGx->IRQ_CR, RNG_IRQ_CR_EN_ERROR_IRQ);
1822 }
1823
1824 /**
1825 * @brief RNG Disable Enable the interrupt when an error is reported by the health tests
1826 * @rmtoll IRQ_CR EN_ERROR_IRQ LL_RNG_DisableEnErrorIrq
1827 * @param RNGx RNG Instance
1828 * @retval None
1829 */
LL_RNG_DisableEnErrorIrq(RNG_TypeDef * RNGx)1830 __STATIC_INLINE void LL_RNG_DisableEnErrorIrq(RNG_TypeDef *RNGx)
1831 {
1832 CLEAR_BIT(RNGx->IRQ_CR, RNG_IRQ_CR_EN_ERROR_IRQ);
1833 }
1834
1835 /**
1836 * @brief Indicate if EN_ERROR_IRQ is enabled. Enable the interrupt when an error is reported by the health tests
1837 * @rmtoll IRQ_CR EN_ERROR_IRQ LL_RNG_IsEnabledEnErrorIrq
1838 * @param RNGx RNG Instance
1839 * @retval State of bit (1 or 0).
1840 */
LL_RNG_IsEnabledEnErrorIrq(RNG_TypeDef * RNGx)1841 __STATIC_INLINE uint32_t LL_RNG_IsEnabledEnErrorIrq(RNG_TypeDef *RNGx)
1842 {
1843 return ((READ_BIT(RNGx->IRQ_CR, RNG_IRQ_CR_EN_ERROR_IRQ) == (RNG_IRQ_CR_EN_ERROR_IRQ)) ? 1U : 0U);
1844 }
1845
1846
1847 /**
1848 * @brief Get the Set to 1 when the output fifo is full of new random
1849 * @note Flag is cleared by writing a 1
1850 * @rmtoll IRQ_SR FF_FULL_IRQ LL_RNG_GetFfFullIrq
1851 * @retval can be one of the following values
1852 * @arg LL_RNG_IRQ_SR_FF_FULL_IRQ_0
1853 * @arg LL_RNG_IRQ_SR_FF_FULL_IRQ_1
1854 */
LL_RNG_GetFfFullIrq(RNG_TypeDef * RNGx)1855 __STATIC_INLINE uint32_t LL_RNG_GetFfFullIrq(RNG_TypeDef *RNGx)
1856 {
1857 return (uint32_t)(READ_BIT(RNGx->IRQ_SR, RNG_IRQ_SR_FF_FULL_IRQ));
1858 }
1859
1860 /**
1861 * @brief Get the Set to 1 when an error is reported by the health tests
1862 * @note Flag is cleared by writing a 1
1863 * @rmtoll IRQ_SR ERROR_IRQ LL_RNG_GetErrorIrq
1864 * @retval can be one of the following values
1865 * @arg LL_RNG_IRQ_SR_ERROR_IRQ_0
1866 * @arg LL_RNG_IRQ_SR_ERROR_IRQ_1
1867 */
LL_RNG_GetErrorIrq(RNG_TypeDef * RNGx)1868 __STATIC_INLINE uint32_t LL_RNG_GetErrorIrq(RNG_TypeDef *RNGx)
1869 {
1870 return (uint32_t)(READ_BIT(RNGx->IRQ_SR, RNG_IRQ_SR_ERROR_IRQ));
1871 }
1872
1873 #if defined(USE_FULL_LL_DRIVER)
1874 /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
1875 * @{
1876 */
1877 ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, LL_RNG_InitTypeDef *RNG_InitStruct);
1878 void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct);
1879 ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
1880 /**
1881 * @}
1882 */
1883 #endif /* USE_FULL_LL_DRIVER */
1884
1885 #endif /* STM32WB09 */
1886 #if defined (STM32WB07) || defined (STM32WB06) || defined(STM32WB05)
1887 /* Private types -------------------------------------------------------------*/
1888 /* Private variables ---------------------------------------------------------*/
1889 /* Private constants ---------------------------------------------------------*/
1890 /* Private macros ------------------------------------------------------------*/
1891
1892 /* Exported types ------------------------------------------------------------*/
1893 #if defined(USE_FULL_LL_DRIVER)
1894 /** @defgroup RNG_LL_ES_Init_Struct RNG Exported Init structures
1895 * @{
1896 */
1897
1898 /**
1899 * @brief LL RNG Init Structure Definition
1900 */
1901 typedef struct
1902 {
1903 uint32_t ClockDetection; /*!< RNG Clock detection.
1904 This parameter can be modified using unitary functions @ref
1905 LL_RNG_EnableClkDetect(). */
1906 } LL_RNG_InitTypeDef;
1907
1908 /**
1909 * @}
1910 */
1911 #endif /* USE_FULL_LL_DRIVER */
1912
1913 /* Exported constants --------------------------------------------------------*/
1914 /** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
1915 * @{
1916 */
1917
1918 /** @defgroup RNG_LL_CLK_DET Logic that detects the presence of the RNG Clock
1919 * @{
1920 */
1921 #define LL_RNG_CLK_DET_DISABLE 0x00000000U /*!< RNG Clock detection disabled */
1922 #define LL_RNG_CLK_DET_ENABLE RNG_CR_TST_CLK /*!< RNG Clock detection enabled */
1923 /**
1924 * @}
1925 */
1926
1927 /** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
1928 * @brief Flags defines which can be used with LL_RNG_ReadReg function
1929 * @{
1930 */
1931 #define LL_RNG_SR_RNGRDY RNG_SR_RNGRDY /*!< Register contains valid random data */
1932 #define LL_RNG_SR_REVCLK RNG_SR_REVCLK /*!< Clock Reveal bit */
1933 #define LL_RNG_SR_FAULT RNG_SR_FAULT /*!< Fault Reveal bit */
1934 /**
1935 * @}
1936 */
1937
1938 /**
1939 * @}
1940 */
1941
1942 /* Exported macro ------------------------------------------------------------*/
1943 /** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
1944 * @{
1945 */
1946
1947 /** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
1948 * @{
1949 */
1950
1951 /**
1952 * @brief Write a value in RNG register
1953 * @param __INSTANCE__ RNG Instance
1954 * @param __REG__ Register to be written
1955 * @param __VALUE__ Value to be written in the register
1956 * @retval None
1957 */
1958 #define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
1959
1960 /**
1961 * @brief Read a value in RNG register
1962 * @param __INSTANCE__ RNG Instance
1963 * @param __REG__ Register to be read
1964 * @retval Register value
1965 */
1966 #define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
1967 /**
1968 * @}
1969 */
1970
1971 /**
1972 * @}
1973 */
1974
1975
1976 /* Exported functions --------------------------------------------------------*/
1977 /** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
1978 * @{
1979 */
1980 /** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
1981 * @{
1982 */
1983
1984 /**
1985 * @brief Enable Random Number Generation
1986 * @rmtoll CR RNG_DIS LL_RNG_Enable
1987 * @param RNGx RNG Instance
1988 * @retval None
1989 */
LL_RNG_Enable(RNG_TypeDef * RNGx)1990 __STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
1991 {
1992 CLEAR_BIT(RNGx->CR, RNG_CR_RNG_DIS);
1993 }
1994
1995 /**
1996 * @brief Disable Random Number Generation
1997 * @rmtoll CR RNG_DIS LL_RNG_Disable
1998 * @param RNGx RNG Instance
1999 * @retval None
2000 */
LL_RNG_Disable(RNG_TypeDef * RNGx)2001 __STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
2002 {
2003 SET_BIT(RNGx->CR, RNG_CR_RNG_DIS);
2004 }
2005
2006 /**
2007 * @brief Check if Random Number Generator is enabled
2008 * @rmtoll CR RNG_DIS LL_RNG_IsEnabled
2009 * @param RNGx RNG Instance
2010 * @retval State of bit (1 or 0).
2011 */
LL_RNG_IsEnabled(RNG_TypeDef * RNGx)2012 __STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
2013 {
2014 return ((READ_BIT(RNGx->CR, RNG_CR_RNG_DIS) != (RNG_CR_RNG_DIS)) ? 1UL : 0UL);
2015 }
2016
2017 /**
2018 * @brief Enable RNG Clock detection
2019 * @rmtoll CR TST_CLK LL_RNG_EnableClkDetect
2020 * @param RNGx RNG Instance
2021 * @retval None
2022 */
LL_RNG_EnableClkDetect(RNG_TypeDef * RNGx)2023 __STATIC_INLINE void LL_RNG_EnableClkDetect(RNG_TypeDef *RNGx)
2024 {
2025 SET_BIT(RNGx->CR, RNG_CR_TST_CLK);
2026 }
2027
2028 /**
2029 * @brief Disable RNG Clock detection
2030 * @rmtoll CR TST_CLK LL_RNG_DisableClkDetect
2031 * @param RNGx RNG Instance
2032 * @retval None
2033 */
LL_RNG_DisableClkDetect(RNG_TypeDef * RNGx)2034 __STATIC_INLINE void LL_RNG_DisableClkDetect(RNG_TypeDef *RNGx)
2035 {
2036 CLEAR_BIT(RNGx->CR, RNG_CR_TST_CLK);
2037 }
2038
2039 /**
2040 * @}
2041 */
2042
2043 /** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
2044 * @{
2045 */
2046
2047 /**
2048 * @brief Indicate if the RNG value ready Flag is set or not
2049 * @rmtoll SR RNGRDY LL_RNG_IsActiveFlag_RNGRDY
2050 * @param RNGx RNG Instance
2051 * @retval State of bit (1 or 0).
2052 */
LL_RNG_IsActiveFlag_RNGRDY(RNG_TypeDef * RNGx)2053 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_RNGRDY(RNG_TypeDef *RNGx)
2054 {
2055 return ((READ_BIT(RNGx->SR, RNG_SR_RNGRDY) == (RNG_SR_RNGRDY)) ? 1UL : 0UL);
2056 }
2057
2058 /**
2059 * @brief Indicate if the Clock Reveal Status Flag is set or not
2060 * @rmtoll SR REVCLK LL_RNG_IsActiveFlag_REVCLK
2061 * @param RNGx RNG Instance
2062 * @retval State of bit (1 or 0).
2063 */
LL_RNG_IsActiveFlag_REVCLK(RNG_TypeDef * RNGx)2064 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_REVCLK(RNG_TypeDef *RNGx)
2065 {
2066 return ((READ_BIT(RNGx->SR, RNG_SR_REVCLK) == (RNG_SR_REVCLK)) ? 1UL : 0UL);
2067 }
2068
2069 /**
2070 * @brief Indicate if the Fault Reveal Flag is set or not
2071 * @rmtoll SR FAULT LL_RNG_IsActiveFlag_FAULT
2072 * @param RNGx RNG Instance
2073 * @retval State of bit (1 or 0).
2074 */
LL_RNG_IsActiveFlag_FAULT(RNG_TypeDef * RNGx)2075 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_FAULT(RNG_TypeDef *RNGx)
2076 {
2077 return ((READ_BIT(RNGx->SR, RNG_SR_FAULT) == (RNG_SR_FAULT)) ? 1UL : 0UL);
2078 }
2079
2080 /**
2081 * @brief Clear Fault Reveal Flag Flag
2082 * @rmtoll SR FAULT LL_RNG_ClearFlag_FAULT
2083 * @param RNGx RNG Instance
2084 * @retval None
2085 */
LL_RNG_ClearFlag_FAULT(RNG_TypeDef * RNGx)2086 __STATIC_INLINE void LL_RNG_ClearFlag_FAULT(RNG_TypeDef *RNGx)
2087 {
2088 SET_BIT(RNGx->SR, RNG_SR_FAULT);
2089 }
2090
2091 /**
2092 * @}
2093 */
2094
2095 /** @defgroup RNG_LL_EF_Data_Management Data Management
2096 * @{
2097 */
2098
2099 /**
2100 * @brief Return16-bit Random Number value
2101 * @rmtoll DR RNDATA LL_RNG_ReadRandData16
2102 * @param RNGx RNG Instance
2103 * @retval Generated 16-bit random value
2104 */
LL_RNG_ReadRandData16(RNG_TypeDef * RNGx)2105 __STATIC_INLINE uint16_t LL_RNG_ReadRandData16(RNG_TypeDef *RNGx)
2106 {
2107 return (uint16_t)(READ_REG(RNGx->VAL));
2108 }
2109
2110 /**
2111 * @}
2112 */
2113
2114 /**
2115 * @}
2116 */
2117
2118 #if defined(USE_FULL_LL_DRIVER)
2119 /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
2120 * @{
2121 */
2122 ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, LL_RNG_InitTypeDef *RNG_InitStruct);
2123 void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct);
2124 ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
2125
2126 /**
2127 * @}
2128 */
2129 #endif /* USE_FULL_LL_DRIVER */
2130 #endif /* STM32WB07 || STM32WB06 || STM32WB05*/
2131 /**
2132 * @}
2133 */
2134 #endif /* RNG */
2135
2136 /**
2137 * @}
2138 */
2139
2140 #ifdef __cplusplus
2141 }
2142 #endif
2143
2144 #endif /* __STM32WB0x_LL_RNG_H */
2145
