1 /** 2 ****************************************************************************** 3 * @file lis25ba_reg.h 4 * @author Sensors Software Solution Team 5 * @brief This file contains all the functions prototypes for the 6 * lis25ba_reg.c driver. 7 ****************************************************************************** 8 * @attention 9 * 10 * <h2><center>© Copyright (c) 2021 STMicroelectronics. 11 * All rights reserved.</center></h2> 12 * 13 * This software component is licensed by ST under BSD 3-Clause license, 14 * the "License"; You may not use this file except in compliance with the 15 * License. You may obtain a copy of the License at: 16 * opensource.org/licenses/BSD-3-Clause 17 * 18 ****************************************************************************** 19 */ 20 21 /* Define to prevent recursive inclusion -------------------------------------*/ 22 #ifndef LIS25BA_REGS_H 23 #define LIS25BA_REGS_H 24 25 #ifdef __cplusplus 26 extern "C" { 27 #endif 28 29 /* Includes ------------------------------------------------------------------*/ 30 #include <stdint.h> 31 #include <stddef.h> 32 #include <math.h> 33 34 /** @addtogroup LIS25BA 35 * @{ 36 * 37 */ 38 39 /** @defgroup Endianness definitions 40 * @{ 41 * 42 */ 43 44 #ifndef DRV_BYTE_ORDER 45 #ifndef __BYTE_ORDER__ 46 47 #define DRV_LITTLE_ENDIAN 1234 48 #define DRV_BIG_ENDIAN 4321 49 50 /** if _BYTE_ORDER is not defined, choose the endianness of your architecture 51 * by uncommenting the define which fits your platform endianness 52 */ 53 //#define DRV_BYTE_ORDER DRV_BIG_ENDIAN 54 #define DRV_BYTE_ORDER DRV_LITTLE_ENDIAN 55 56 #else /* defined __BYTE_ORDER__ */ 57 58 #define DRV_LITTLE_ENDIAN __ORDER_LITTLE_ENDIAN__ 59 #define DRV_BIG_ENDIAN __ORDER_BIG_ENDIAN__ 60 #define DRV_BYTE_ORDER __BYTE_ORDER__ 61 62 #endif /* __BYTE_ORDER__*/ 63 #endif /* DRV_BYTE_ORDER */ 64 65 /** 66 * @} 67 * 68 */ 69 70 /** @defgroup STMicroelectronics sensors common types 71 * @{ 72 * 73 */ 74 75 #ifndef MEMS_SHARED_TYPES 76 #define MEMS_SHARED_TYPES 77 78 typedef struct 79 { 80 #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 81 uint8_t bit0 : 1; 82 uint8_t bit1 : 1; 83 uint8_t bit2 : 1; 84 uint8_t bit3 : 1; 85 uint8_t bit4 : 1; 86 uint8_t bit5 : 1; 87 uint8_t bit6 : 1; 88 uint8_t bit7 : 1; 89 #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 90 uint8_t bit7 : 1; 91 uint8_t bit6 : 1; 92 uint8_t bit5 : 1; 93 uint8_t bit4 : 1; 94 uint8_t bit3 : 1; 95 uint8_t bit2 : 1; 96 uint8_t bit1 : 1; 97 uint8_t bit0 : 1; 98 #endif /* DRV_BYTE_ORDER */ 99 } bitwise_t; 100 101 #define PROPERTY_DISABLE (0U) 102 #define PROPERTY_ENABLE (1U) 103 104 /** @addtogroup Interfaces_Functions 105 * @brief This section provide a set of functions used to read and 106 * write a generic register of the device. 107 * MANDATORY: return 0 -> no Error. 108 * @{ 109 * 110 */ 111 112 typedef int32_t (*stmdev_write_ptr)(void *, uint8_t, const uint8_t *, uint16_t); 113 typedef int32_t (*stmdev_read_ptr)(void *, uint8_t, uint8_t *, uint16_t); 114 typedef void (*stmdev_mdelay_ptr)(uint32_t millisec); 115 116 typedef struct 117 { 118 /** Component mandatory fields **/ 119 stmdev_write_ptr write_reg; 120 stmdev_read_ptr read_reg; 121 /** Component optional fields **/ 122 stmdev_mdelay_ptr mdelay; 123 /** Customizable optional pointer **/ 124 void *handle; 125 } stmdev_ctx_t; 126 127 /** 128 * @} 129 * 130 */ 131 132 #endif /* MEMS_SHARED_TYPES */ 133 134 #ifndef MEMS_UCF_SHARED_TYPES 135 #define MEMS_UCF_SHARED_TYPES 136 137 /** @defgroup Generic address-data structure definition 138 * @brief This structure is useful to load a predefined configuration 139 * of a sensor. 140 * You can create a sensor configuration by your own or using 141 * Unico / Unicleo tools available on STMicroelectronics 142 * web site. 143 * 144 * @{ 145 * 146 */ 147 148 typedef struct 149 { 150 uint8_t address; 151 uint8_t data; 152 } ucf_line_t; 153 154 /** 155 * @} 156 * 157 */ 158 159 #endif /* MEMS_UCF_SHARED_TYPES */ 160 161 /** 162 * @} 163 * 164 */ 165 166 /** @defgroup LIS25BA_Infos 167 * @{ 168 * 169 */ 170 171 /** I2C Device Address 8 bit format. SA0 = not(I2C_A0 pin) **/ 172 #define LIS25BA_I2C_ADD_L 0x33 173 #define LIS25BA_I2C_ADD_H 0x31 174 175 /** Device Identification (Who am I) **/ 176 #define LIS25BA_ID 0x20 177 178 /** 179 * @} 180 * 181 */ 182 183 #define LIS25BA_TEST_REG 0x0BU 184 typedef struct 185 { 186 #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 187 uint8_t not_used_01 : 3; 188 uint8_t st : 1; 189 uint8_t not_used_02 : 4; 190 #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 191 uint8_t not_used_02 : 4; 192 uint8_t st : 1; 193 uint8_t not_used_01 : 3; 194 #endif /* DRV_BYTE_ORDER */ 195 } lis25ba_test_reg_t; 196 197 #define LIS25BA_WHO_AM_I 0x0FU 198 199 #define LIS25BA_TDM_CMAX_H 0x24U 200 typedef struct 201 { 202 #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 203 uint8_t tdm_cmax : 4; 204 uint8_t not_used_01 : 4; 205 #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 206 uint8_t not_used_01 : 4; 207 uint8_t tdm_cmax : 4; 208 #endif /* DRV_BYTE_ORDER */ 209 } lis25ba_tdm_cmax_h_t; 210 211 #define LIS25BA_TDM_CMAX_L 0x25U 212 typedef struct 213 { 214 uint8_t tdm_cmax : 8; 215 } lis25ba_tdm_cmax_l_t; 216 217 #define LIS25BA_CTRL_REG 0x26U 218 typedef struct 219 { 220 #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 221 uint8_t not_used_01 : 5; 222 uint8_t pd : 1; 223 uint8_t not_used_02 : 2; 224 #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 225 uint8_t not_used_02 : 2; 226 uint8_t pd : 1; 227 uint8_t not_used_01 : 5; 228 #endif /* DRV_BYTE_ORDER */ 229 } lis25ba_ctrl_reg_t; 230 231 #define LIS25BA_TDM_CTRL_REG 0x2EU 232 typedef struct 233 { 234 #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 235 uint8_t not_used_01 : 1; 236 uint8_t wclk_fq : 2; 237 uint8_t not_used_02 : 1; 238 uint8_t mapping : 1; 239 uint8_t data_valid : 1; 240 uint8_t delayed : 1; 241 uint8_t tdm_pd : 1; 242 #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 243 uint8_t tdm_pd : 1; 244 uint8_t delayed : 1; 245 uint8_t data_valid : 1; 246 uint8_t mapping : 1; 247 uint8_t not_used_02 : 1; 248 uint8_t wclk_fq : 2; 249 uint8_t not_used_01 : 1; 250 #endif /* DRV_BYTE_ORDER */ 251 } lis25ba_tdm_ctrl_reg_t; 252 253 #define LIS25BA_AXES_CTRL_REG 0x2FU 254 typedef struct 255 { 256 #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN 257 uint8_t odr_auto_en : 1; 258 uint8_t not_used_01 : 4; 259 uint8_t axisx_en : 1; 260 uint8_t axisy_en : 1; 261 uint8_t axisz_en : 1; 262 #elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN 263 uint8_t axisz_en : 1; 264 uint8_t axisy_en : 1; 265 uint8_t axisx_en : 1; 266 uint8_t not_used_01 : 4; 267 uint8_t odr_auto_en : 1; 268 #endif /* DRV_BYTE_ORDER */ 269 } lis25ba_axes_ctrl_reg_t; 270 271 /** 272 * @defgroup LIS25BA_Register_Union 273 * @brief This union group all the registers that has a bitfield 274 * description. 275 * This union is useful but not need by the driver. 276 * 277 * REMOVING this union you are compliant with: 278 * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed " 279 * 280 * @{ 281 * 282 */ 283 typedef union 284 { 285 lis25ba_test_reg_t test_reg; 286 lis25ba_tdm_cmax_h_t tdm_cmax_h; 287 lis25ba_tdm_cmax_l_t tdm_cmax_l; 288 lis25ba_ctrl_reg_t ctrl_reg; 289 lis25ba_tdm_ctrl_reg_t tdm_ctrl_reg; 290 lis25ba_axes_ctrl_reg_t axes_ctrl_reg; 291 bitwise_t bitwise; 292 uint8_t byte; 293 } lis25ba_reg_t; 294 295 /** 296 * @} 297 * 298 */ 299 300 #ifndef __weak 301 #define __weak __attribute__((weak)) 302 #endif /* __weak */ 303 304 /* 305 * These are the basic platform dependent I/O routines to read 306 * and write device registers connected on a standard bus. 307 * The driver keeps offering a default implementation based on function 308 * pointers to read/write routines for backward compatibility. 309 * The __weak directive allows the final application to overwrite 310 * them with a custom implementation. 311 */ 312 313 int32_t lis25ba_read_reg(const stmdev_ctx_t *ctx, uint8_t reg, 314 uint8_t *data, 315 uint16_t len); 316 int32_t lis25ba_write_reg(const stmdev_ctx_t *ctx, uint8_t reg, 317 uint8_t *data, 318 uint16_t len); 319 320 extern float_t lis25ba_from_raw_to_mg(int16_t lsb); 321 322 typedef struct 323 { 324 uint8_t id; 325 } lis25ba_id_t; 326 int32_t lis25ba_id_get(const stmdev_ctx_t *ctx, lis25ba_id_t *val); 327 328 typedef struct 329 { 330 struct 331 { 332 uint8_t en : 1; /* TDM interface 1=on / 0=off) */ 333 uint8_t clk_pol : 1; /* data valid on 0=rise/1=falling edge of BCLK */ 334 uint8_t clk_edge : 1; /* data on 0=first / 1=second valid edge of BCLK */ 335 uint8_t mapping : 1; /* xl data in 0=slot0-1-2 / 1=slot4-5-6 */ 336 uint16_t cmax : 1; /* BCLK in a WCLK (unused if odr=_XL_HW_SEL) */ 337 } tdm; 338 } lis25ba_bus_mode_t; 339 int32_t lis25ba_bus_mode_set(const stmdev_ctx_t *ctx, 340 lis25ba_bus_mode_t *val); 341 int32_t lis25ba_bus_mode_get(const stmdev_ctx_t *ctx, 342 lis25ba_bus_mode_t *val); 343 344 typedef struct 345 { 346 struct 347 { 348 struct 349 { 350 uint8_t x : 1; /* X-axis: 0=disabled / 1=enabled */ 351 uint8_t y : 1; /* Y-axis: 0=disabled / 1=enabled */ 352 uint8_t z : 1; /* Z-axis: 0=disabled / 1=enabled */ 353 } axis; 354 enum 355 { 356 LIS25BA_XL_OFF = 0x01, /* in power down */ 357 LIS25BA_XL_8kHz = 0x00, /* sampling rate equal to 8 kHz */ 358 LIS25BA_XL_16kHz = 0x02, /* sampling rate equal to 16 kHz */ 359 LIS25BA_XL_24kHz = 0x04, /* sampling rate equal to 24 kHz */ 360 LIS25BA_XL_HW_SEL = 0x10, /* ratio between the MCLK and WCLK */ 361 } odr; 362 } xl; 363 } lis25ba_md_t; 364 int32_t lis25ba_mode_set(const stmdev_ctx_t *ctx, lis25ba_md_t *val); 365 int32_t lis25ba_mode_get(const stmdev_ctx_t *ctx, lis25ba_md_t *val); 366 367 typedef struct 368 { 369 struct 370 { 371 float_t mg[3]; 372 int16_t raw[3]; 373 } xl; 374 } lis25ba_data_t; 375 int32_t lis25ba_data_get(uint16_t *tdm_stream, lis25ba_bus_mode_t *md, 376 lis25ba_data_t *data); 377 378 int32_t lis25ba_self_test_set(const stmdev_ctx_t *ctx, uint8_t val); 379 int32_t lis25ba_self_test_get(const stmdev_ctx_t *ctx, uint8_t *val); 380 381 /** 382 * @} 383 * 384 */ 385 386 #ifdef __cplusplus 387 } 388 #endif 389 390 #endif /*LIS25BA_DRIVER_H */ 391 392 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 393
