1 /*******************************************************************************
2  * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * @file fpga_design_config.h
7  * @author Embedded Software
8  *
9  *
10  * Note 1: This file should not be edited. If you need to modify a parameter
11  * without going through regenerating using the MSS Configurator Libero flow
12  * or editing the associated xml file
13  * the following method is recommended:
14 
15  * 1. edit the following file
16  * boards/your_board/platform_config/mpfs_hal_config/mss_sw_config.h
17 
18  * 2. define the value you want to override there.
19  * (Note: There is a commented example in the platform directory)
20 
21  * Note 2: The definition in mss_sw_config.h takes precedence, as
22  * mss_sw_config.h is included prior to the generated header files located in
23  * boards/your_board/fpga_design_config
24  *
25  */
26 
27 #ifndef FPGA_DESIGN_CONFIG_H_
28 #define FPGA_DESIGN_CONFIG_H_
29 
30 #define  LIBERO_SETTING_MSS_CONFIGURATOR_VERSION                    "2021.1"
31 #define  LIBERO_SETTING_DESIGN_NAME                                 "ICICLE_MSS"
32 #define  LIBERO_SETTING_MPFS_PART                                   "MPFS250T_ES"
33 #define  LIBERO_SETTING_GENERATION_DATE                             "07-06-2021_20:54:25"
34 #define  LIBERO_SETTING_XML_VERSION                                 "0.5.3"
35 #define  LIBERO_SETTING_XML_VERSION_MAJOR                           0
36 #define  LIBERO_SETTING_XML_VERSION_MINOR                           5
37 #define  LIBERO_SETTING_XML_VERSION_PATCH                           3
38 #define  LIBERO_SETTING_HEADER_GENERATOR_VERSION                    "0.6.3"
39 #define  LIBERO_SETTING_HEADER_GENERATOR_VERSION_MAJOR              0
40 #define  LIBERO_SETTING_HEADER_GENERATOR_VERSION_MINOR              6
41 #define  LIBERO_SETTING_HEADER_GENERATOR_VERSION_PATCH              3
42 
43 #include "memory_map/hw_memory.h"
44 #include "memory_map/hw_apb_split.h"
45 #include "memory_map/hw_cache.h"
46 #include "memory_map/hw_pmp_hart0.h"
47 #include "memory_map/hw_pmp_hart1.h"
48 #include "memory_map/hw_pmp_hart2.h"
49 #include "memory_map/hw_pmp_hart3.h"
50 #include "memory_map/hw_pmp_hart4.h"
51 #include "memory_map/hw_mpu_fic0.h"
52 #include "memory_map/hw_mpu_fic1.h"
53 #include "memory_map/hw_mpu_fic2.h"
54 #include "memory_map/hw_mpu_crypto.h"
55 #include "memory_map/hw_mpu_gem0.h"
56 #include "memory_map/hw_mpu_gem1.h"
57 #include "memory_map/hw_mpu_usb.h"
58 #include "memory_map/hw_mpu_mmc.h"
59 #include "memory_map/hw_mpu_scb.h"
60 #include "memory_map/hw_mpu_trace.h"
61 #include "io/hw_mssio_mux.h"
62 #include "io/hw_hsio_mux.h"
63 #include "sgmii/hw_sgmii_tip.h"
64 #include "ddr/hw_ddr_options.h"
65 #include "ddr/hw_ddr_io_bank.h"
66 #include "ddr/hw_ddr_mode.h"
67 #include "ddr/hw_ddr_off_mode.h"
68 #include "ddr/hw_ddr_segs.h"
69 #include "ddr/hw_ddrc.h"
70 #include "clocks/hw_mss_clks.h"
71 #include "clocks/hw_clk_sysreg.h"
72 #include "clocks/hw_clk_mss_pll.h"
73 #include "clocks/hw_clk_sgmii_pll.h"
74 #include "clocks/hw_clk_ddr_pll.h"
75 #include "clocks/hw_clk_mss_cfm.h"
76 #include "clocks/hw_clk_sgmii_cfm.h"
77 #include "general/hw_gen_peripherals.h"
78 
79 #ifdef __cplusplus
80 extern  "C" {
81 #endif
82 
83 /* No content in this file, used for referencing header */
84 
85 #ifdef __cplusplus
86 }
87 #endif
88 
89 
90 #endif /* #ifdef FPGA_DESIGN_CONFIG_H_ */
91 
92