1 /******************************************************************************* 2 * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * @file hw_mpu_fic1.h 7 * @author Microchip-FPGA Embedded Systems Solutions 8 * 9 * 10 * Note 1: This file should not be edited. If you need to modify a parameter 11 * without going through regenerating using the MSS Configurator Libero flow 12 * or editing the associated xml file 13 * the following method is recommended: 14 15 * 1. edit the following file 16 * boards/your_board/platform_config/mpfs_hal_config/mss_sw_config.h 17 18 * 2. define the value you want to override there. 19 * (Note: There is a commented example in the platform directory) 20 21 * Note 2: The definition in mss_sw_config.h takes precedence, as 22 * mss_sw_config.h is included prior to the generated header files located in 23 * boards/your_board/fpga_design_config 24 * 25 */ 26 27 #ifndef HW_MPU_FIC1_H_ 28 #define HW_MPU_FIC1_H_ 29 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP0) 36 /*mpu setup register, 64 bits */ 37 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP0 0x1F00000FFFFFFFFFULL 38 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 39 /* RESERVED [38:18] RW value= 0x0 */ 40 /* MODE [56:8] RW value= 0x1F */ 41 #endif 42 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP1) 43 /*mpu setup register, 64 bits */ 44 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP1 0x1F00000FFFFFFFFFULL 45 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 46 /* RESERVED [38:18] RW value= 0x0 */ 47 /* MODE [56:8] RW value= 0x1F */ 48 #endif 49 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP2) 50 /*pmp setup register, 64 bits */ 51 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP2 0x1F00000FFFFFFFFFULL 52 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 53 /* RESERVED [38:18] RW value= 0x0 */ 54 /* MODE [56:8] RW value= 0x1F */ 55 #endif 56 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP3) 57 /*pmp setup register, 64 bits */ 58 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP3 0x1F00000FFFFFFFFFULL 59 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 60 /* RESERVED [38:18] RW value= 0x0 */ 61 /* MODE [56:8] RW value= 0x1F */ 62 #endif 63 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP4) 64 /*pmp setup register, 64 bits */ 65 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP4 0x1F00000FFFFFFFFFULL 66 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 67 /* RESERVED [38:18] RW value= 0x0 */ 68 /* MODE [56:8] RW value= 0x1F */ 69 #endif 70 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP5) 71 /*pmp setup register, 64 bits */ 72 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP5 0x1F00000FFFFFFFFFULL 73 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 74 /* RESERVED [38:18] RW value= 0x0 */ 75 /* MODE [56:8] RW value= 0x1F */ 76 #endif 77 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP6) 78 /*pmp setup register, 64 bits */ 79 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP6 0x1F00000FFFFFFFFFULL 80 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 81 /* RESERVED [38:18] RW value= 0x0 */ 82 /* MODE [56:8] RW value= 0x1F */ 83 #endif 84 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP7) 85 /*pmp setup register, 64 bits */ 86 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP7 0x1F00000FFFFFFFFFULL 87 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 88 /* RESERVED [38:18] RW value= 0x0 */ 89 /* MODE [56:8] RW value= 0x1F */ 90 #endif 91 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP8) 92 /*pmp setup register, 64 bits */ 93 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP8 0x1F00000FFFFFFFFFULL 94 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 95 /* RESERVED [38:18] RW value= 0x0 */ 96 /* MODE [56:8] RW value= 0x1F */ 97 #endif 98 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP9) 99 /*pmp setup register, 64 bits */ 100 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP9 0x1F00000FFFFFFFFFULL 101 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 102 /* RESERVED [38:18] RW value= 0x0 */ 103 /* MODE [56:8] RW value= 0x1F */ 104 #endif 105 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP10) 106 /*pmp setup register, 64 bits */ 107 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP10 0x1F00000FFFFFFFFFULL 108 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 109 /* RESERVED [38:18] RW value= 0x0 */ 110 /* MODE [56:8] RW value= 0x1F */ 111 #endif 112 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP11) 113 /*pmp setup register, 64 bits */ 114 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP11 0x1F00000FFFFFFFFFULL 115 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 116 /* RESERVED [38:18] RW value= 0x0 */ 117 /* MODE [56:8] RW value= 0x1F */ 118 #endif 119 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP12) 120 /*pmp setup register, 64 bits */ 121 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP12 0x1F00000FFFFFFFFFULL 122 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 123 /* RESERVED [38:18] RW value= 0x0 */ 124 /* MODE [56:8] RW value= 0x1F */ 125 #endif 126 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP13) 127 /*pmp setup register, 64 bits */ 128 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP13 0x1F00000FFFFFFFFFULL 129 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 130 /* RESERVED [38:18] RW value= 0x0 */ 131 /* MODE [56:8] RW value= 0x1F */ 132 #endif 133 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP14) 134 /*pmp setup register, 64 bits */ 135 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP14 0x1F00000FFFFFFFFFULL 136 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 137 /* RESERVED [38:18] RW value= 0x0 */ 138 /* MODE [56:8] RW value= 0x1F */ 139 #endif 140 #if !defined (LIBERO_SETTING_FIC1_MPU_CFG_PMP15) 141 /*pmp setup register, 64 bits */ 142 #define LIBERO_SETTING_FIC1_MPU_CFG_PMP15 0x1F00000FFFFFFFFFULL 143 /* PMP [0:38] RW value= 0xFFFFFFFFF */ 144 /* RESERVED [38:18] RW value= 0x0 */ 145 /* MODE [56:8] RW value= 0x1F */ 146 #endif 147 148 #ifdef __cplusplus 149 } 150 #endif 151 152 153 #endif /* #ifdef HW_MPU_FIC1_H_ */ 154 155