1 /*******************************************************************************
2  * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * @file hw_ddr_off_mode.h
7  * @author Microchip-FPGA Embedded Systems Solutions
8  *
9  *
10  * Note 1: This file should not be edited. If you need to modify a parameter
11  * without going through regenerating using the MSS Configurator Libero flow
12  * or editing the associated xml file
13  * the following method is recommended:
14 
15  * 1. edit the following file
16  * boards/your_board/platform_config/mpfs_hal_config/mss_sw_config.h
17 
18  * 2. define the value you want to override there.
19  * (Note: There is a commented example in the platform directory)
20 
21  * Note 2: The definition in mss_sw_config.h takes precedence, as
22  * mss_sw_config.h is included prior to the generated header files located in
23  * boards/your_board/fpga_design_config
24  *
25  */
26 
27 #ifndef HW_DDR_OFF_MODE_H_
28 #define HW_DDR_OFF_MODE_H_
29 
30 
31 #ifdef __cplusplus
32 extern  "C" {
33 #endif
34 
35 #if !defined (LIBERO_SETTING_DDRPHY_MODE_OFF)
36 /*DDRPHY MODE Register, ddr off */
37 #define LIBERO_SETTING_DDRPHY_MODE_OFF    0x00000000UL
38     /* DDRMODE                           [0:3]   RW value= 0x0 */
39     /* ECC                               [3:1]   RW value= 0x0 */
40     /* CRC                               [4:1]   RW value= 0x0 */
41     /* BUS_WIDTH                         [5:3]   RW value= 0x0 */
42     /* DMI_DBI                           [8:1]   RW value= 0x0 */
43     /* DQ_DRIVE                          [9:2]   RW value= 0x0 */
44     /* DQS_DRIVE                         [11:2]  RW value= 0x0 */
45     /* ADD_CMD_DRIVE                     [13:2]  RW value= 0x0 */
46     /* CLOCK_OUT_DRIVE                   [15:2]  RW value= 0x0 */
47     /* DQ_TERMINATION                    [17:2]  RW value= 0x0 */
48     /* DQS_TERMINATION                   [19:2]  RW value= 0x0 */
49     /* ADD_CMD_INPUT_PIN_TERMINATION     [21:2]  RW value= 0x0 */
50     /* PRESET_ODT_CLK                    [23:2]  RW value= 0x0 */
51     /* POWER_DOWN                        [25:1]  RW value= 0x0 */
52     /* RANK                              [26:1]  RW value= 0x0 */
53     /* RESERVED                          [27:5]  RSVD */
54 #endif
55 #if !defined (LIBERO_SETTING_DPC_BITS_OFF_MODE)
56 /*DPC Bits Register off mode */
57 #define LIBERO_SETTING_DPC_BITS_OFF_MODE    0x00000000UL
58     /* DPC_VS                            [0:4]   RW value= 0x0 */
59     /* DPC_VRGEN_H                       [4:6]   RW value= 0x0 */
60     /* DPC_VRGEN_EN_H                    [10:1]  RW value= 0x0 */
61     /* DPC_MOVE_EN_H                     [11:1]  RW value= 0x0 */
62     /* DPC_VRGEN_V                       [12:6]  RW value= 0x0 */
63     /* DPC_VRGEN_EN_V                    [18:1]  RW value= 0x0 */
64     /* DPC_MOVE_EN_V                     [19:1]  RW value= 0x0 */
65     /* RESERVE01                         [20:12] RSVD */
66 #endif
67 
68 #ifdef __cplusplus
69 }
70 #endif
71 
72 
73 #endif /* #ifdef HW_DDR_OFF_MODE_H_ */
74 
75