Home
last modified time | relevance | path

Searched defs:LFCCLKEN0 (Results 1 – 25 of 77) sorted by relevance

1234

/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_cmu.h71 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg210f32.h276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg210f64.h276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg222f32.h276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg222f64.h276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg110f32.h276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg110f64.h276 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg321f64.h320 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg321f32.h320 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg308f32.h315 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg308f64.h315 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg108f32.h307 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32hg108f64.h307 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_cmu.h102 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b110f1024gq64.h566 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b110f1024gm64.h566 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b110f1024iq64.h566 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b110f1024im64.h566 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b130f512gq64.h566 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b390f1024gl112.h525 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b130f512im64.h566 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b130f512gm64.h566 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b130f512iq64.h566 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
Defm32gg12b390f512gl112.h525 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_cmu.h102 __IOM uint32_t LFCCLKEN0; /**< Low Frequency C Clock Enable Register 0 (Async Reg) */ member

1234