1 /**************************************************************************//** 2 * @file lcd_reg.h 3 * @version V1.00 4 * @brief LCD register definition header file 5 * 6 * @copyright SPDX-License-Identifier: Apache-2.0 7 * @copyright Copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. 8 *****************************************************************************/ 9 #ifndef __LCD_REG_H__ 10 #define __LCD_REG_H__ 11 12 13 /** @addtogroup REGISTER Control Register 14 15 @{ 16 17 */ 18 19 20 /*---------------------- Liquid-Crystal Display -------------------------*/ 21 /** 22 @addtogroup LCD Liquid-Crystal Display(LCD) 23 Memory Mapped Structure for LCD Controller 24 @{ 25 */ 26 27 typedef struct 28 { 29 30 31 /** 32 * @var LCD_T::CTL 33 * Offset: 0x00 LCD Control Register 34 * --------------------------------------------------------------------------------------------------- 35 * |Bits |Field |Descriptions 36 * | :----: | :----: | :---- | 37 * |[0] |EN |LCD Display Enable Bit 38 * | | |0 = LCD display function Disabled 39 * | | |1 = LCD display function Enabled 40 * | | |Note 1: When software writes 1 to this bit, the LCD Controller needs some synchronizing time to completely enable the LCD display function. Before that, the read value of this bit is still 0. 41 * | | |Note 2: When software writes 0 to this bit, the LCD Controller needs some synchronizing time to completely disable the LCD display function. Before that, the read value of this bit is still 1. 42 * |[31] |SYNC |LCD Enable/Disable Synchronizing Indicator (Read Only) 43 * | | |When software writes 0/1 to EN bit (LCD_CTL[0]), the LCD Controller needs some synchronizing time to completely disable/enable the LCD display function. During this time, this bit keeps at 1. 44 * | | |0 = LCD display function is completely Disabled/Enabled 45 * | | |1 = LCD display function is not yet completely Disabled/Enabled 46 * | | |Note 1: The synchronizing time to enable LCD display function is not constant. It is between one and two cycles of LCD_CLK. 47 * | | |Note 2: The LCD display function cannot be disabled until the end of a frame. So the maximum synchronizing time to disable LCD display function could be as long as one frame time. 48 * @var LCD_T::PCTL 49 * Offset: 0x04 LCD Panel Control Registerr 50 * --------------------------------------------------------------------------------------------------- 51 * |Bits |Field |Descriptions 52 * | :----: | :----: | :---- | 53 * |[1:0] |BIAS |LCD Bias Level Selection 54 * | | |This field is used to select the bias level. 55 * | | |0 = Reserved 56 * | | |1 = 1/2 Bias 57 * | | |2 = 1/3 Bias 58 * | | |3 = 1/4 Bias 59 * |[4:2] |DUTY |LCD Duty Ratio Selection 60 * | | |This field is used to select the duty ratio. 61 * | | |0 = 1/1 Duty 62 * | | |1 = 1/2 Duty 63 * | | |2 = 1/3 Duty 64 * | | |3 = 1/4 Duty 65 * | | |4 = 1/5 Duty 66 * | | |5 = 1/6 Duty 67 * | | |6 = 1/7 Duty 68 * | | |7 = 1/8 Duty 69 * |[5] |TYPE |LCD Waveform Type Selection 70 * | | |This bit is used to select the waveform type. 71 * | | |0 = Type A 72 * | | |1 = Type B 73 * |[6] |INV |LCD Waveform Inverse 74 * | | |This bit is used to set the inverse LCD waveform. 75 * | | |0 = COM/SEG waveform is normal 76 * | | |1 = COM/SEG waveform is inversed 77 * |[17:8] |FREQDIV |LCD Operating Frequency Divider 78 * | | |The field is used to divide LCD_CLK to generate the LCD operating frequency. 79 * | | |LCD Operating Frequency = (LCD_CLK Frequency) / (FRRQDIV + 1). 80 * | | |Note 1: FREQDIV can be set from 0 to 1023, therefore, the fastest LCD operating frequency is equal to LCD_CLK frequency, 81 * | | |and the lowest LCD operating frequency is equal to LCD_CLK frequency divided by 1024. 82 * | | |Note 2: LCD frame rate is 83 * | | |(LCD Operating Frequency) x (Duty Ratio) x 1/2 for type A waveform, and 84 * | | |(LCD Operating Frequency) x (Duty Ratio) for type B waveform. 85 * | | |Example: Assume LCD operating frequency is 1 kHz, duty ratio is 1/4, then the LCD frame rate is 86 * | | |1 kHz x (1/4) x (1/2) = 128 Hz for type A waveform, and 87 * | | |1 kHz x (1/4) = 256 Hz for type B waveform. 88 * |[20:18] |CPVSEL |LCD Operating Voltage (VLCD) Select (For Charge Pump Only) 89 * | | |This field is used to select the LCD operating voltage. 90 * | | |0 = 2.6 V 91 * | | |1 = 2.8 V 92 * | | |2 = 3.0 V 93 * | | |3 = 3.2 V 94 * | | |4 = 3.4 V 95 * | | |5 = 3.6 V 96 * | | |Others = (Reserved) 97 * | | |Note: This field is meaningful only if the VLCD source is the charge pump. Otherwise, this field is ignored. 98 * |[27:24] |CPVTUNE |LCD Operating Voltage (VLCD) Fine Tuning (For Charge Pump Only) 99 * | | |This field is used to fine tune the LCD operating voltage. 100 * | | |0 = No tuning 101 * | | |1 = decrease by 1 unit of voltage 102 * | | |2 = decrease by 2 unit of voltage 103 * | | |3 = decrease by 3 unit of voltage 104 * | | |4 = decrease by 4 unit of voltage 105 * | | |5 = decrease by 5 unit of voltage 106 * | | |6 = decrease by 6 unit of voltage 107 * | | |7 = decrease by 7 unit of voltage 108 * | | |8 = increase by 8 units of voltage 109 * | | |9 = increase by 7 units of voltage 110 * | | |10 = increase by 6 units of voltage 111 * | | |11 = increase by 5 units of voltage 112 * | | |12 = increase by 4 units of voltage 113 * | | |13 = increase by 3 units of voltage 114 * | | |14 = increase by 2 units of voltage 115 * | | |15 = increase by 1 unit of voltage 116 * | | |Note 1: A unit of voltage is about 0.03 V. 117 * | | |Note 2: This field is meaningful only if the VLCD source is the charge pump. Otherwise, this field is ignored. 118 * @var LCD_T::FCTL 119 * Offset: 0x08 LCD Frame Control Register 120 * --------------------------------------------------------------------------------------------------- 121 * |Bits |Field |Descriptions 122 * | :----: | :----: | :---- | 123 * |[0] |BLINK |LCD Blinking Enable Bit 124 * | | |0 = LCD blinking function Disabled 125 * | | |1 = LCD blinking function Enabled 126 * |[17:8] |FCV |Frame Counting Value 127 * | | |This field indicates the maximum value that the frame counter can reach. 128 * | | |Note 1: The frame counter automatically increases by 1 at the end of every frame. When the counter reaches FCV, it will recounts from 0 at the end of the next frame. 129 * | | |At this moment, the hardware sets a dedicated flag to 1, and triggers a dedicated interrupt if it is enabled. 130 * | | |Note 2: For type B waveform, the frame counter increases at the end of odd frames, not even frames. 131 * |[27:24] |NFTIME |Null Frame Time 132 * | | |This field is used to configure the length of a null frame. 133 * | | |One null frame time is (1 / LCD_FREQ) x NFTIME. 134 * | | |Note: All COM and SEG output voltages are 0 V during a null frame. 135 * |[31:28] |NFNUM |Number of Frames Inserted By One Null Frame 136 * | | |This field is used to specify the number of continuous normal frames inserted by one null frame. 137 * | | |The number of continuous normal frames is (NFNUM + 1) frames. 138 * @var LCD_T::DCTL 139 * Offset: 0x0C LCD Driving Control Register 140 * --------------------------------------------------------------------------------------------------- 141 * |Bits |Field |Descriptions 142 * | :----: | :----: | :---- | 143 * |[1:0] |VSRC |LCD Operating Voltage (VLCD) Source 144 * | | |0 = VLCD Power 145 * | | |1 = AVDD Power 146 * | | |2 = Built-In Charge Pump 147 * | | |3 = None 148 * | | |Note: Whenever the LCD controller is disabled, all VLCD sources are automatically cut off. 149 * |[2] |RESMODE |Resistive Network Driving Mode 150 * | | |0 = Low-Drive Mode 151 * | | |1 = High-Drive Mode 152 * |[3] |BUFEN |Voltage Buffer Enable Bit 153 * | | |0 = Voltage Buffer Disabled 154 * | | |1 = Voltage Buffer Enabled 155 * | | |Note: When RESMODE = 1, the voltage buffers are automatically disabled. The setting of BUFEN bit is ignored. 156 * |[4] |PSVEN |Power Saving Mode Enable Bit 157 * | | |0 = Power Saving Mode Disabled 158 * | | |1 = Power Saving Mode Enabled 159 * | | |Note: when RESMODE = 0 and BUFEN = 0, the output drivers consumes the least driving current. In this case, the power saving mode is automatically disabled. The setting of PSVEN bit is ignored. 160 * |[5] |PSVREV |Power Saving Timing Reverse 161 * | | |When the timing is reversed, the original powe-saving period becomes no-power-saving, and the original no-power-saving period becomes power-saving. 162 * | | |0 = Timing of power saving is normal 163 * | | |1 = Timing of power saving is reversed 164 * |[11:8] |PSVT1 |Power Saving "Enable Time" Setting 165 * | | |The "Enable Time" of the power saving mode is calculated as "Enable Time" = 15.26 us x (PSVT1 + 1), 166 * | | |where 15.26 us is the half-cycle time of LCD_CLK, whose frequency is about 32 kHz. 167 * | | |PSVT1 can be set as 0, 1, 2, ..., 15, so the minimum "Enable Time" is about 15.26 us, and the maximum "Enable Time" is about 15.26 x 16 = 244.14 us. 168 * | | |Note: In the following two cases, the power saving mode is disabled. The setting of PSVT1 bits is ignored. 169 * | | |1. PSVEN = 0 170 * | | |2. RESMODE = 0 and BUFEN = 0 171 * |[15:12] |PSVT2 |Power Saving "On Time" Setting 172 * | | |The "On Time" of the power saving mode is calculated as "On Time" = 15.26 us x (PSVT2 + 1), 173 * | | |where 15.26 us is the half-cycle time of LCD_CLK, whose frequency is about 32 kHz. 174 * | | |PSVT2 can be set as 0, 1, 2, ..., 15, so the minimum "On Time" is about 15.26 us, and the maximum "On Time" is about 15.26 x 16 = 244.14 us. 175 * | | |Note: In the following two cases, the power saving mode is disabled. The setting of PSVT2 bits is ignored. 176 * | | |1. PSVEN = 0 177 * |[28:16] |CTOTIME |Charging Timer Timeout Time 178 * | | |This field is used to specify the timeout value for the charging timer. When the charging timer reaches this timeout value, a status bit or an interrupt will occur. 179 * | | |The timeout is calculated by the following formula: Timeout = 30.52 us x (CTOTIME + 1), where 30.52 us is the cycle time of LCD_CLK, whose frequency is about 32 kHz. 180 * | | |CTOTIME can be set as 0, 1, 2, ..., 8191, so the minimum timeout is 30.52 us, and the maximum timeout is 30.52 x 8192 = 256 ms. 181 * @var LCD_T::PKGSEL 182 * Offset: 0x10 LCD Package Selection Register 183 * --------------------------------------------------------------------------------------------------- 184 * |Bits |Field |Descriptions 185 * | :----: | :----: | :---- | 186 * |[0] |PKG |Device Package Type Selection 187 * | | |0 = 128-Pin Package 188 * | | |1 = 64-Pin Package 189 * @var LCD_T::STS 190 * Offset: 0x14 LCD Status Register 191 * --------------------------------------------------------------------------------------------------- 192 * |Bits |Field |Descriptions 193 * | :----: | :----: | :---- | 194 * |[0] |FCEF |End of Frame-Counting Flag 195 * | | |This flag is automatically set by hardware at the end of a frame, and the frame counter value must be equal to FCV (LCD_FCTL[17:8], Frame Counting Value). 196 * | | |0 = End of Frame-Counting did not occur 197 * | | |1 = End of Frame-Counting occurred 198 * | | |Note 1: User can clear this bit by writing 1 to it. 199 * | | |Note 2: For type B waveform, this flag is set only at the end of an odd frame. 200 * |[1] |FEF |End of Frame Flag 201 * | | |This flag is automatically set by hardware at the end of a frame. 202 * | | |0 = End of Frame did not occur 203 * | | |1 = End of Frame occurred 204 * | | |Note 1: User can clear this bit by writing 1 to it. 205 * | | |Note 2: For type B waveform, this flag is set only at the end of an odd frame. 206 * |[2] |CTOF |Charging Timeout Flag 207 * | | |This flag is automatically set by hardware when the charging timer reaches the timeout value. 208 * | | |0 = Charging Timeout did not occur 209 * | | |1 = Charging Timeout occurred 210 * | | |Note: User can clear this bit by writing 1 to it. 211 * |[28:16] |CTIME |Charging Timer Value (Read Only) 212 * | | |The field contains the value of the charging timer. It records the charging time of the charge pump. 213 * | | |The charging timer stops counting when the charge pump stops charging or a timeout occurs. At this moment, the hardware dumps the current charging timer value into this field. 214 * | | |Charging Time = 30.52 us x (CTIME + 1), where 30.52 us is the cycle time of LCD_CLK, whose frequency is about 32 kHz. 215 * @var LCD_T::INTEN 216 * Offset: 0x18 LCD Interrupt Enable Register 217 * --------------------------------------------------------------------------------------------------- 218 * |Bits |Field |Descriptions 219 * | :----: | :----: | :---- | 220 * |[0] |FCEIEN |End of Frame-Counting Interrupt Enable Bit 221 * | | |An interrupt occurs at the end of a frame, and the frame counter value must be equal to FCV (LCD_FCTL[17:8], Frame Counting Value). 222 * | | |0 = End of Frame-Counting Interrupt Disabled 223 * | | |1 = End of Frame-Counting Interrupt Enabled 224 * | | |Note: For type B waveform, the interrupt occurs only at the end of an odd frame. 225 * |[1] |FEIEN |End of Frame Interrupt Enable Bit 226 * | | |An interrupt occurs at the end of a frame. 227 * | | |0 = End of Frame Interrupt Disabled 228 * | | |1 = End of Frame Interrupt Enabled 229 * | | |Note: For type B waveform, the interrupt occurs only at the end of an odd frame. 230 * |[2] |CTOIEN |Charging Timeout Interrupt Enable Bit 231 * | | |An interrupt occurs when the charging timer reaches the timeout value. 232 * | | |0 = Charging Timeout Interrupt Disabled 233 * | | |1 = Charging Timeout Interrupt Enabled 234 * @var LCD_T::DATA 235 * Offset: 0x20 LCD Segment Display Data Register 0 236 * --------------------------------------------------------------------------------------------------- 237 * |Bits |Field |Descriptions 238 * | :----: | :----: | :---- | 239 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 240 * | | |Each bit specifies the brightness of each pixel in a segment. 241 * | | |0 = The pixel is light 242 * | | |1 = The pixel is dark 243 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 244 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 245 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 246 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 247 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 248 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 249 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 250 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 251 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 252 * | | |Each bit specifies the brightness of each pixel in a segment. 253 * | | |0 = The pixel is light 254 * | | |1 = The pixel is dark 255 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 256 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 257 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 258 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 259 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 260 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 261 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 262 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 263 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 264 * | | |Each bit specifies the brightness of each pixel in a segment. 265 * | | |0 = The pixel is light 266 * | | |1 = The pixel is dark 267 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 268 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 269 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 270 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 271 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 272 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 273 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 274 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 275 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 276 * | | |Each bit specifies the brightness of each pixel in a segment. 277 * | | |0 = The pixel is light 278 * | | |1 = The pixel is dark 279 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 280 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 281 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 282 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 283 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 284 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 285 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 286 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 287 * Offset: 0x24 LCD Segment Display Data Register 1 288 * --------------------------------------------------------------------------------------------------- 289 * |Bits |Field |Descriptions 290 * | :----: | :----: | :---- | 291 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 292 * | | |Each bit specifies the brightness of each pixel in a segment. 293 * | | |0 = The pixel is light 294 * | | |1 = The pixel is dark 295 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 296 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 297 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 298 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 299 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 300 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 301 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 302 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 303 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 304 * | | |Each bit specifies the brightness of each pixel in a segment. 305 * | | |0 = The pixel is light 306 * | | |1 = The pixel is dark 307 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 308 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 309 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 310 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 311 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 312 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 313 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 314 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 315 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 316 * | | |Each bit specifies the brightness of each pixel in a segment. 317 * | | |0 = The pixel is light 318 * | | |1 = The pixel is dark 319 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 320 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 321 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 322 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 323 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 324 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 325 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 326 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 327 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 328 * | | |Each bit specifies the brightness of each pixel in a segment. 329 * | | |0 = The pixel is light 330 * | | |1 = The pixel is dark 331 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 332 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 333 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 334 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 335 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 336 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 337 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 338 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 339 * Offset: 0x28 LCD Segment Display Data Register 2 340 * --------------------------------------------------------------------------------------------------- 341 * |Bits |Field |Descriptions 342 * | :----: | :----: | :---- | 343 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 344 * | | |Each bit specifies the brightness of each pixel in a segment. 345 * | | |0 = The pixel is light 346 * | | |1 = The pixel is dark 347 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 348 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 349 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 350 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 351 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 352 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 353 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 354 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 355 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 356 * | | |Each bit specifies the brightness of each pixel in a segment. 357 * | | |0 = The pixel is light 358 * | | |1 = The pixel is dark 359 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 360 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 361 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 362 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 363 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 364 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 365 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 366 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 367 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 368 * | | |Each bit specifies the brightness of each pixel in a segment. 369 * | | |0 = The pixel is light 370 * | | |1 = The pixel is dark 371 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 372 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 373 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 374 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 375 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 376 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 377 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 378 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 379 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 380 * | | |Each bit specifies the brightness of each pixel in a segment. 381 * | | |0 = The pixel is light 382 * | | |1 = The pixel is dark 383 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 384 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 385 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 386 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 387 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 388 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 389 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 390 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 391 * Offset: 0x2C LCD Segment Display Data Register 3 392 * --------------------------------------------------------------------------------------------------- 393 * |Bits |Field |Descriptions 394 * | :----: | :----: | :---- | 395 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 396 * | | |Each bit specifies the brightness of each pixel in a segment. 397 * | | |0 = The pixel is light 398 * | | |1 = The pixel is dark 399 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 400 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 401 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 402 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 403 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 404 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 405 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 406 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 407 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 408 * | | |Each bit specifies the brightness of each pixel in a segment. 409 * | | |0 = The pixel is light 410 * | | |1 = The pixel is dark 411 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 412 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 413 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 414 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 415 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 416 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 417 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 418 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 419 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 420 * | | |Each bit specifies the brightness of each pixel in a segment. 421 * | | |0 = The pixel is light 422 * | | |1 = The pixel is dark 423 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 424 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 425 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 426 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 427 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 428 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 429 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 430 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 431 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 432 * | | |Each bit specifies the brightness of each pixel in a segment. 433 * | | |0 = The pixel is light 434 * | | |1 = The pixel is dark 435 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 436 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 437 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 438 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 439 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 440 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 441 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 442 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 443 * Offset: 0x30 LCD Segment Display Data Register 4 444 * --------------------------------------------------------------------------------------------------- 445 * |Bits |Field |Descriptions 446 * | :----: | :----: | :---- | 447 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 448 * | | |Each bit specifies the brightness of each pixel in a segment. 449 * | | |0 = The pixel is light 450 * | | |1 = The pixel is dark 451 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 452 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 453 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 454 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 455 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 456 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 457 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 458 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 459 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 460 * | | |Each bit specifies the brightness of each pixel in a segment. 461 * | | |0 = The pixel is light 462 * | | |1 = The pixel is dark 463 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 464 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 465 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 466 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 467 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 468 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 469 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 470 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 471 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 472 * | | |Each bit specifies the brightness of each pixel in a segment. 473 * | | |0 = The pixel is light 474 * | | |1 = The pixel is dark 475 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 476 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 477 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 478 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 479 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 480 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 481 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 482 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 483 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 484 * | | |Each bit specifies the brightness of each pixel in a segment. 485 * | | |0 = The pixel is light 486 * | | |1 = The pixel is dark 487 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 488 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 489 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 490 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 491 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 492 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 493 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 494 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 495 * Offset: 0x34 LCD Segment Display Data Register 5 496 * --------------------------------------------------------------------------------------------------- 497 * |Bits |Field |Descriptions 498 * | :----: | :----: | :---- | 499 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 500 * | | |Each bit specifies the brightness of each pixel in a segment. 501 * | | |0 = The pixel is light 502 * | | |1 = The pixel is dark 503 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 504 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 505 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 506 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 507 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 508 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 509 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 510 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 511 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 512 * | | |Each bit specifies the brightness of each pixel in a segment. 513 * | | |0 = The pixel is light 514 * | | |1 = The pixel is dark 515 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 516 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 517 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 518 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 519 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 520 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 521 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 522 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 523 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 524 * | | |Each bit specifies the brightness of each pixel in a segment. 525 * | | |0 = The pixel is light 526 * | | |1 = The pixel is dark 527 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 528 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 529 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 530 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 531 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 532 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 533 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 534 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 535 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 536 * | | |Each bit specifies the brightness of each pixel in a segment. 537 * | | |0 = The pixel is light 538 * | | |1 = The pixel is dark 539 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 540 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 541 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 542 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 543 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 544 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 545 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 546 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 547 * Offset: 0x38 LCD Segment Display Data Register 6 548 * --------------------------------------------------------------------------------------------------- 549 * |Bits |Field |Descriptions 550 * | :----: | :----: | :---- | 551 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 552 * | | |Each bit specifies the brightness of each pixel in a segment. 553 * | | |0 = The pixel is light 554 * | | |1 = The pixel is dark 555 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 556 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 557 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 558 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 559 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 560 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 561 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 562 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 563 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 564 * | | |Each bit specifies the brightness of each pixel in a segment. 565 * | | |0 = The pixel is light 566 * | | |1 = The pixel is dark 567 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 568 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 569 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 570 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 571 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 572 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 573 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 574 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 575 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 576 * | | |Each bit specifies the brightness of each pixel in a segment. 577 * | | |0 = The pixel is light 578 * | | |1 = The pixel is dark 579 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 580 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 581 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 582 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 583 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 584 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 585 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 586 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 587 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 588 * | | |Each bit specifies the brightness of each pixel in a segment. 589 * | | |0 = The pixel is light 590 * | | |1 = The pixel is dark 591 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 592 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 593 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 594 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 595 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 596 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 597 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 598 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 599 * Offset: 0x3C LCD Segment Display Data Register 7 600 * --------------------------------------------------------------------------------------------------- 601 * |Bits |Field |Descriptions 602 * | :----: | :----: | :---- | 603 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 604 * | | |Each bit specifies the brightness of each pixel in a segment. 605 * | | |0 = The pixel is light 606 * | | |1 = The pixel is dark 607 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 608 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 609 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 610 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 611 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 612 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 613 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 614 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 615 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 616 * | | |Each bit specifies the brightness of each pixel in a segment. 617 * | | |0 = The pixel is light 618 * | | |1 = The pixel is dark 619 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 620 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 621 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 622 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 623 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 624 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 625 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 626 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 627 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 628 * | | |Each bit specifies the brightness of each pixel in a segment. 629 * | | |0 = The pixel is light 630 * | | |1 = The pixel is dark 631 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 632 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 633 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 634 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 635 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 636 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 637 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 638 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 639 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 640 * | | |Each bit specifies the brightness of each pixel in a segment. 641 * | | |0 = The pixel is light 642 * | | |1 = The pixel is dark 643 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 644 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 645 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 646 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 647 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 648 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 649 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 650 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 651 * Offset: 0x40 LCD Segment Display Data Register 8 652 * --------------------------------------------------------------------------------------------------- 653 * |Bits |Field |Descriptions 654 * | :----: | :----: | :---- | 655 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 656 * | | |Each bit specifies the brightness of each pixel in a segment. 657 * | | |0 = The pixel is light 658 * | | |1 = The pixel is dark 659 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 660 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 661 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 662 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 663 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 664 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 665 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 666 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 667 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 668 * | | |Each bit specifies the brightness of each pixel in a segment. 669 * | | |0 = The pixel is light 670 * | | |1 = The pixel is dark 671 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 672 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 673 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 674 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 675 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 676 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 677 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 678 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 679 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 680 * | | |Each bit specifies the brightness of each pixel in a segment. 681 * | | |0 = The pixel is light 682 * | | |1 = The pixel is dark 683 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 684 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 685 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 686 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 687 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 688 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 689 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 690 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 691 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 692 * | | |Each bit specifies the brightness of each pixel in a segment. 693 * | | |0 = The pixel is light 694 * | | |1 = The pixel is dark 695 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 696 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 697 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 698 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 699 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 700 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 701 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 702 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 703 * Offset: 0x44 LCD Segment Display Data Register 9 704 * --------------------------------------------------------------------------------------------------- 705 * |Bits |Field |Descriptions 706 * | :----: | :----: | :---- | 707 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 708 * | | |Each bit specifies the brightness of each pixel in a segment. 709 * | | |0 = The pixel is light 710 * | | |1 = The pixel is dark 711 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 712 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 713 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 714 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 715 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 716 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 717 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 718 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 719 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 720 * | | |Each bit specifies the brightness of each pixel in a segment. 721 * | | |0 = The pixel is light 722 * | | |1 = The pixel is dark 723 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 724 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 725 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 726 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 727 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 728 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 729 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 730 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 731 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 732 * | | |Each bit specifies the brightness of each pixel in a segment. 733 * | | |0 = The pixel is light 734 * | | |1 = The pixel is dark 735 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 736 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 737 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 738 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 739 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 740 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 741 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 742 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 743 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 744 * | | |Each bit specifies the brightness of each pixel in a segment. 745 * | | |0 = The pixel is light 746 * | | |1 = The pixel is dark 747 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 748 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 749 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 750 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 751 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 752 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 753 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 754 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 755 * Offset: 0x48 LCD Segment Display Data Register 10 756 * --------------------------------------------------------------------------------------------------- 757 * |Bits |Field |Descriptions 758 * | :----: | :----: | :---- | 759 * |[7:0] |DD0 |Display Data of Segments S, where S is (4 x N) + 0, and N is 0, 1, 2, ..., 10 760 * | | |Each bit specifies the brightness of each pixel in a segment. 761 * | | |0 = The pixel is light 762 * | | |1 = The pixel is dark 763 * | | |Note 1: DD0 corresponds to SEG00, SEG04, SEG08, SEG12, SEG16, SEG20, SEG24, SEG28, SEG32, SEG36, and SEG40. 764 * | | |Note 2: Each bit, DD0[n], corresponds to COMn, n= 0 ~ 7. 765 * | | |[Example] Assume 1/4 Duty, and DD0 (= LCD_DATA07[7:0]) = 1001_0110, LCD_DATA07[7:0] corresponds to SEG28 (4 x 7 + 0 = 28), 766 * | | |the pixel SEG28-COM0 is light (LCD_DATA07[0] = 0), 767 * | | |the pixel SEG28-COM1 is dark (LCD_DATA07[1] = 1), 768 * | | |the pixel SEG28-COM2 is dark (LCD_DATA07[2] = 1), 769 * | | |the pixel SEG28-COM3 is light (LCD_DATA07[3] = 0), 770 * | | |LCD_DATA07[7:4] are ignored, since COMs from 4 to 7 are not used. 771 * |[15:8] |DD1 |Display Data of Segments S, where S is (4 x N) + 1, and N is 0, 1, 2, ..., 10 772 * | | |Each bit specifies the brightness of each pixel in a segment. 773 * | | |0 = The pixel is light 774 * | | |1 = The pixel is dark 775 * | | |Note 1: DD1 corresponds to SEG01, SEG05, SEG09, SEG13, SEG17, SEG21, SEG25, SEG29, SEG33, SEG37, and SEG41. 776 * | | |Note 2: Each bit, DD1[n], corresponds to COMn, n= 0 ~ 7. 777 * | | |[Example] Assume 1/4 Duty, and DD1 (= LCD_DATA07[15:8]) = 1001_0110, LCD_DATA07[15:8] corresponds to SEG29 (4 x 7 + 1 = 29), 778 * | | |the pixel SEG29-COM0 is light (LCD_DATA07[8] = 0), 779 * | | |the pixel SEG29-COM1 is dark (LCD_DATA07[9] = 1), 780 * | | |the pixel SEG29-COM2 is dark (LCD_DATA07[10] = 1), 781 * | | |the pixel SEG29-COM3 is light (LCD_DATA07[11] = 0), 782 * | | |LCD_DATA07[15:12] are ignored, since COMs from 4 to 7 are not used. 783 * |[23:16] |DD2 |Display Data of Segments S, where S is (4 x N) + 2, and N is 0, 1, 2, ..., 10 784 * | | |Each bit specifies the brightness of each pixel in a segment. 785 * | | |0 = The pixel is light 786 * | | |1 = The pixel is dark 787 * | | |Note 1: DD2 corresponds to SEG02, SEG06, SEG10, SEG14, SEG18, SEG22, SEG26, SEG30, SEG34, SEG38, and SEG42. 788 * | | |Note 2: Each bit, DD2[n], corresponds to COMn, n= 0 ~ 7. 789 * | | |[Example] Assume 1/4 Duty, and DD2 (= LCD_DATA07[23:16]) = 1001_0110, LCD_DATA07[23:16] corresponds to SEG31 (4 x 7 + 2 = 30), 790 * | | |the pixel SEG30-COM0 is light (LCD_DATA07[16] = 0), 791 * | | |the pixel SEG30-COM1 is dark (LCD_DATA07[17] = 1), 792 * | | |the pixel SEG30-COM2 is dark (LCD_DATA07[18] = 1), 793 * | | |the pixel SEG30-COM3 is light (LCD_DATA07[19] = 0), 794 * | | |LCD_DATA07[23:20] are ignored, since COMs from 4 to 7 are not used. 795 * |[31:24] |DD3 |Display Data of Segments S, where S is (4 x N) + 3, and N is 0, 1, 2, ..., 10 796 * | | |Each bit specifies the brightness of each pixel in a segment. 797 * | | |0 = The pixel is light 798 * | | |1 = The pixel is dark 799 * | | |Note 1: DD3 corresponds to SEG03, SEG07, SEG11, SEG15, SEG19, SEG23, SEG27, SEG31, SEG35, SEG39, and SEG43. 800 * | | |Note 2: Each bit, DD3[n], corresponds to COMn, n= 0 ~ 7. 801 * | | |[Example] Assume 1/4 Duty, and DD3 (= LCD_DATA07[31:24]) = 1001_0110, LCD_DATA07[31:24] corresponds to SEG31 (4 x 7 + 3 = 31), 802 * | | |the pixel SEG31-COM0 is light (LCD_DATA07[24] = 0), 803 * | | |the pixel SEG31-COM1 is dark (LCD_DATA07[25] = 1), 804 * | | |the pixel SEG31-COM2 is dark (LCD_DATA07[26] = 1), 805 * | | |the pixel SEG31-COM3 is light (LCD_DATA07[27] = 0), 806 * | | |LCD_DATA07[31:28] are ignored, since COMs from 4 to 7 are not used. 807 */ 808 __IO uint32_t CTL; /*!< [0x0000] LCD Control Register */ 809 __IO uint32_t PCTL; /*!< [0x0004] LCD Panel Control Register */ 810 __IO uint32_t FCTL; /*!< [0x0008] LCD Frame Control Register */ 811 __IO uint32_t DCTL; /*!< [0x000C] LCD Driving Control Register */ 812 __IO uint32_t PKGSEL; /*!< [0x0010] LCD Package Selection Register */ 813 __IO uint32_t STS; /*!< [0x0014] LCD Status Register */ 814 __IO uint32_t INTEN; /*!< [0x0018] LCD Interrupt Enable Register */ 815 __I uint32_t RESERVED0; /*!< [0x001C] Reserved 0 */ 816 __IO uint32_t DATA[11]; /*!< [0x0020] ~ [0x0048] LCD Segment Display Data Register 0 ~ 10 */ 817 818 } LCD_T; 819 820 /** 821 @addtogroup LCD_CONST LCD Bit Field Definition 822 Constant Definitions for LCD Controller 823 @{ 824 */ 825 826 #define LCD_CTL_EN_Pos (0) /*!< LCD_T::CTL: EN Position */ 827 #define LCD_CTL_EN_Msk (0x1ul << LCD_CTL_EN_Pos) /*!< LCD_T::CTL: EN Mask */ 828 829 #define LCD_CTL_SYNC_Pos (31) /*!< LCD_T::CTL: SYNC Position */ 830 #define LCD_CTL_SYNC_Msk (0x1ul << LCD_CTL_SYNC_Pos) /*!< LCD_T::CTL: SYNC Mask */ 831 832 #define LCD_PCTL_BIAS_Pos (0) /*!< LCD_T::PCTL: BIAS Position */ 833 #define LCD_PCTL_BIAS_Msk (0x3ul << LCD_PCTL_BIAS_Pos) /*!< LCD_T::PCTL: BIAS Mask */ 834 835 #define LCD_PCTL_DUTY_Pos (2) /*!< LCD_T::PCTL: DUTY Position */ 836 #define LCD_PCTL_DUTY_Msk (0x7ul << LCD_PCTL_DUTY_Pos) /*!< LCD_T::PCTL: DUTY Mask */ 837 838 #define LCD_PCTL_TYPE_Pos (5) /*!< LCD_T::PCTL: TYPE Position */ 839 #define LCD_PCTL_TYPE_Msk (0x1ul << LCD_PCTL_TYPE_Pos) /*!< LCD_T::PCTL: TYPE Mask */ 840 841 #define LCD_PCTL_INV_Pos (6) /*!< LCD_T::PCTL: INV Position */ 842 #define LCD_PCTL_INV_Msk (0x1ul << LCD_PCTL_INV_Pos) /*!< LCD_T::PCTL: INV Mask */ 843 844 #define LCD_PCTL_FREQDIV_Pos (8) /*!< LCD_T::PCTL: FREQDIV Position */ 845 #define LCD_PCTL_FREQDIV_Msk (0x3fful << LCD_PCTL_FREQDIV_Pos) /*!< LCD_T::PCTL: FREQDIV Mask */ 846 847 #define LCD_PCTL_CPVSEL_Pos (18) /*!< LCD_T::PCTL: CPVSEL Position */ 848 #define LCD_PCTL_CPVSEL_Msk (0x7ul << LCD_PCTL_CPVSEL_Pos) /*!< LCD_T::PCTL: CPVSEL Mask */ 849 850 #define LCD_PCTL_CPVTUNE_Pos (24) /*!< LCD_T::PCTL: CPVTUNE Position */ 851 #define LCD_PCTL_CPVTUNE_Msk (0xful << LCD_PCTL_CPVTUNE_Pos) /*!< LCD_T::PCTL: CPVTUNE Mask */ 852 853 #define LCD_FCTL_BLINK_Pos (0) /*!< LCD_T::FCTL: BLINK Position */ 854 #define LCD_FCTL_BLINK_Msk (0x1ul << LCD_FCTL_BLINK_Pos) /*!< LCD_T::FCTL: BLINK Mask */ 855 856 #define LCD_FCTL_FCV_Pos (8) /*!< LCD_T::FCTL: FCV Position */ 857 #define LCD_FCTL_FCV_Msk (0x3fful << LCD_FCTL_FCV_Pos) /*!< LCD_T::FCTL: FCV Mask */ 858 859 #define LCD_FCTL_NFTIME_Pos (24) /*!< LCD_T::FCTL: NFTIME Position */ 860 #define LCD_FCTL_NFTIME_Msk (0xful << LCD_FCTL_NFTIME_Pos) /*!< LCD_T::FCTL: NFTIME Mask */ 861 862 #define LCD_FCTL_NFNUM_Pos (28) /*!< LCD_T::FCTL: NFNUM Position */ 863 #define LCD_FCTL_NFNUM_Msk (0xful << LCD_FCTL_NFNUM_Pos) /*!< LCD_T::FCTL: NFNUM Mask */ 864 865 #define LCD_DCTL_VSRC_Pos (0) /*!< LCD_T::DCTL: VSRC Position */ 866 #define LCD_DCTL_VSRC_Msk (0x3ul << LCD_DCTL_VSRC_Pos) /*!< LCD_T::DCTL: VSRC Mask */ 867 868 #define LCD_DCTL_RESMODE_Pos (2) /*!< LCD_T::DCTL: RESMODE Position */ 869 #define LCD_DCTL_RESMODE_Msk (0x1ul << LCD_DCTL_RESMODE_Pos) /*!< LCD_T::DCTL: RESMODE Mask */ 870 871 #define LCD_DCTL_BUFEN_Pos (3) /*!< LCD_T::DCTL: BUFEN Position */ 872 #define LCD_DCTL_BUFEN_Msk (0x1ul << LCD_DCTL_BUFEN_Pos) /*!< LCD_T::DCTL: BUFEN Mask */ 873 874 #define LCD_DCTL_PSVEN_Pos (4) /*!< LCD_T::DCTL: PSVEN Position */ 875 #define LCD_DCTL_PSVEN_Msk (0x1ul << LCD_DCTL_PSVEN_Pos) /*!< LCD_T::DCTL: PSVEN Mask */ 876 877 #define LCD_DCTL_PSVREV_Pos (5) /*!< LCD_T::DCTL: PSVREV Position */ 878 #define LCD_DCTL_PSVREV_Msk (0x1ul << LCD_DCTL_PSVREV_Pos) /*!< LCD_T::DCTL: PSVREV Mask */ 879 880 #define LCD_DCTL_PSVT1_Pos (8) /*!< LCD_T::DCTL: PSVT1 Position */ 881 #define LCD_DCTL_PSVT1_Msk (0xful << LCD_DCTL_PSVT1_Pos) /*!< LCD_T::DCTL: PSVT1 Mask */ 882 883 #define LCD_DCTL_PSVT2_Pos (12) /*!< LCD_T::DCTL: PSVT2 Position */ 884 #define LCD_DCTL_PSVT2_Msk (0xful << LCD_DCTL_PSVT2_Pos) /*!< LCD_T::DCTL: PSVT2 Mask */ 885 886 #define LCD_DCTL_CTOTIME_Pos (16) /*!< LCD_T::DCTL: CTOTIME Position */ 887 #define LCD_DCTL_CTOTIME_Msk (0x1ffful << LCD_DCTL_CTOTIME_Pos) /*!< LCD_T::DCTL: CTOTIME Mask */ 888 889 #define LCD_PKGSEL_PKG_Pos (0) /*!< LCD_T::PKGSEL: PKG Position */ 890 #define LCD_PKGSEL_PKG_Msk (0x1ul << LCD_PKGSEL_PKG_Pos) /*!< LCD_T::PKGSEL: PKG Mask */ 891 892 #define LCD_STS_FCEF_Pos (0) /*!< LCD_T::STS: FCEF Position */ 893 #define LCD_STS_FCEF_Msk (0x1ul << LCD_STS_FCEF_Pos) /*!< LCD_T::STS: FCEF Mask */ 894 895 #define LCD_STS_FEF_Pos (1) /*!< LCD_T::STS: FEF Position */ 896 #define LCD_STS_FEF_Msk (0x1ul << LCD_STS_FEF_Pos) /*!< LCD_T::STS: FEF Mask */ 897 898 #define LCD_STS_CTOF_Pos (2) /*!< LCD_T::STS: CTOF Position */ 899 #define LCD_STS_CTOF_Msk (0x1ul << LCD_STS_CTOF_Pos) /*!< LCD_T::STS: CTOF Mask */ 900 901 #define LCD_STS_CTIME_Pos (16) /*!< LCD_T::STS: CTIME Position */ 902 #define LCD_STS_CTIME_Msk (0x1ffful << LCD_STS_CTIME_Pos) /*!< LCD_T::STS: CTIME Mask */ 903 904 #define LCD_INTEN_FCEIEN_Pos (0) /*!< LCD_T::INTEN: FCEIEN Position */ 905 #define LCD_INTEN_FCEIEN_Msk (0x1ul << LCD_INTEN_FCEIEN_Pos) /*!< LCD_T::INTEN: FCEIEN Mask */ 906 907 #define LCD_INTEN_FEIEN_Pos (1) /*!< LCD_T::INTEN: FEIEN Position */ 908 #define LCD_INTEN_FEIEN_Msk (0x1ul << LCD_INTEN_FEIEN_Pos) /*!< LCD_T::INTEN: FEIEN Mask */ 909 910 #define LCD_INTEN_CTOIEN_Pos (2) /*!< LCD_T::INTEN: CYOIEN Position */ 911 #define LCD_INTEN_CTOIEN_Msk (0x1ul << LCD_INTEN_CTOIEN_Pos) /*!< LCD_T::INTEN: CTOIEN Mask */ 912 913 #define LCD_DATA00_DD0_Pos (0) /*!< LCD_T::DATA00: DD0 Position */ 914 #define LCD_DATA00_DD0_Msk (0xfful << LCD_DATA00_DD0_Pos) /*!< LCD_T::DATA00: DD0 Mask */ 915 916 #define LCD_DATA00_DD1_Pos (8) /*!< LCD_T::DATA00: DD1 Position */ 917 #define LCD_DATA00_DD1_Msk (0xfful << LCD_DATA00_DD1_Pos) /*!< LCD_T::DATA00: DD1 Mask */ 918 919 #define LCD_DATA00_DD2_Pos (16) /*!< LCD_T::DATA00: DD2 Position */ 920 #define LCD_DATA00_DD2_Msk (0xfful << LCD_DATA00_DD2_Pos) /*!< LCD_T::DATA00: DD2 Mask */ 921 922 #define LCD_DATA00_DD3_Pos (24) /*!< LCD_T::DATA00: DD3 Position */ 923 #define LCD_DATA00_DD3_Msk (0xfful << LCD_DATA00_DD3_Pos) /*!< LCD_T::DATA00: DD3 Mask */ 924 925 #define LCD_DATA01_DD0_Pos (0) /*!< LCD_T::DATA01: DD0 Position */ 926 #define LCD_DATA01_DD0_Msk (0xfful << LCD_DATA01_DD0_Pos) /*!< LCD_T::DATA01: DD0 Mask */ 927 928 #define LCD_DATA01_DD1_Pos (8) /*!< LCD_T::DATA01: DD1 Position */ 929 #define LCD_DATA01_DD1_Msk (0xfful << LCD_DATA01_DD1_Pos) /*!< LCD_T::DATA01: DD1 Mask */ 930 931 #define LCD_DATA01_DD2_Pos (16) /*!< LCD_T::DATA01: DD2 Position */ 932 #define LCD_DATA01_DD2_Msk (0xfful << LCD_DATA01_DD2_Pos) /*!< LCD_T::DATA01: DD2 Mask */ 933 934 #define LCD_DATA01_DD3_Pos (24) /*!< LCD_T::DATA01: DD3 Position */ 935 #define LCD_DATA01_DD3_Msk (0xfful << LCD_DATA01_DD3_Pos) /*!< LCD_T::DATA01: DD3 Mask */ 936 937 #define LCD_DATA02_DD0_Pos (0) /*!< LCD_T::DATA02: DD0 Position */ 938 #define LCD_DATA02_DD0_Msk (0xfful << LCD_DATA02_DD0_Pos) /*!< LCD_T::DATA02: DD0 Mask */ 939 940 #define LCD_DATA02_DD1_Pos (8) /*!< LCD_T::DATA02: DD1 Position */ 941 #define LCD_DATA02_DD1_Msk (0xfful << LCD_DATA02_DD1_Pos) /*!< LCD_T::DATA02: DD1 Mask */ 942 943 #define LCD_DATA02_DD2_Pos (16) /*!< LCD_T::DATA02: DD2 Position */ 944 #define LCD_DATA02_DD2_Msk (0xfful << LCD_DATA02_DD2_Pos) /*!< LCD_T::DATA02: DD2 Mask */ 945 946 #define LCD_DATA02_DD3_Pos (24) /*!< LCD_T::DATA02: DD3 Position */ 947 #define LCD_DATA02_DD3_Msk (0xfful << LCD_DATA02_DD3_Pos) /*!< LCD_T::DATA02: DD3 Mask */ 948 949 #define LCD_DATA03_DD0_Pos (0) /*!< LCD_T::DATA03: DD0 Position */ 950 #define LCD_DATA03_DD0_Msk (0xfful << LCD_DATA03_DD0_Pos) /*!< LCD_T::DATA03: DD0 Mask */ 951 952 #define LCD_DATA03_DD1_Pos (8) /*!< LCD_T::DATA03: DD1 Position */ 953 #define LCD_DATA03_DD1_Msk (0xfful << LCD_DATA03_DD1_Pos) /*!< LCD_T::DATA03: DD1 Mask */ 954 955 #define LCD_DATA03_DD2_Pos (16) /*!< LCD_T::DATA03: DD2 Position */ 956 #define LCD_DATA03_DD2_Msk (0xfful << LCD_DATA03_DD2_Pos) /*!< LCD_T::DATA03: DD2 Mask */ 957 958 #define LCD_DATA03_DD3_Pos (24) /*!< LCD_T::DATA03: DD3 Position */ 959 #define LCD_DATA03_DD3_Msk (0xfful << LCD_DATA03_DD3_Pos) /*!< LCD_T::DATA03: DD3 Mask */ 960 961 #define LCD_DATA04_DD0_Pos (0) /*!< LCD_T::DATA04: DD0 Position */ 962 #define LCD_DATA04_DD0_Msk (0xfful << LCD_DATA04_DD0_Pos) /*!< LCD_T::DATA04: DD0 Mask */ 963 964 #define LCD_DATA04_DD1_Pos (8) /*!< LCD_T::DATA04: DD1 Position */ 965 #define LCD_DATA04_DD1_Msk (0xfful << LCD_DATA04_DD1_Pos) /*!< LCD_T::DATA04: DD1 Mask */ 966 967 #define LCD_DATA04_DD2_Pos (16) /*!< LCD_T::DATA04: DD2 Position */ 968 #define LCD_DATA04_DD2_Msk (0xfful << LCD_DATA04_DD2_Pos) /*!< LCD_T::DATA04: DD2 Mask */ 969 970 #define LCD_DATA04_DD3_Pos (24) /*!< LCD_T::DATA04: DD3 Position */ 971 #define LCD_DATA04_DD3_Msk (0xfful << LCD_DATA04_DD3_Pos) /*!< LCD_T::DATA04: DD3 Mask */ 972 973 #define LCD_DATA05_DD0_Pos (0) /*!< LCD_T::DATA05: DD0 Position */ 974 #define LCD_DATA05_DD0_Msk (0xfful << LCD_DATA05_DD0_Pos) /*!< LCD_T::DATA05: DD0 Mask */ 975 976 #define LCD_DATA05_DD1_Pos (8) /*!< LCD_T::DATA05: DD1 Position */ 977 #define LCD_DATA05_DD1_Msk (0xfful << LCD_DATA05_DD1_Pos) /*!< LCD_T::DATA05: DD1 Mask */ 978 979 #define LCD_DATA05_DD2_Pos (16) /*!< LCD_T::DATA05: DD2 Position */ 980 #define LCD_DATA05_DD2_Msk (0xfful << LCD_DATA05_DD2_Pos) /*!< LCD_T::DATA05: DD2 Mask */ 981 982 #define LCD_DATA05_DD3_Pos (24) /*!< LCD_T::DATA05: DD3 Position */ 983 #define LCD_DATA05_DD3_Msk (0xfful << LCD_DATA05_DD3_Pos) /*!< LCD_T::DATA05: DD3 Mask */ 984 985 #define LCD_DATA06_DD0_Pos (0) /*!< LCD_T::DATA06: DD0 Position */ 986 #define LCD_DATA06_DD0_Msk (0xfful << LCD_DATA06_DD0_Pos) /*!< LCD_T::DATA06: DD0 Mask */ 987 988 #define LCD_DATA06_DD1_Pos (8) /*!< LCD_T::DATA06: DD1 Position */ 989 #define LCD_DATA06_DD1_Msk (0xfful << LCD_DATA06_DD1_Pos) /*!< LCD_T::DATA06: DD1 Mask */ 990 991 #define LCD_DATA06_DD2_Pos (16) /*!< LCD_T::DATA06: DD2 Position */ 992 #define LCD_DATA06_DD2_Msk (0xfful << LCD_DATA06_DD2_Pos) /*!< LCD_T::DATA06: DD2 Mask */ 993 994 #define LCD_DATA06_DD3_Pos (24) /*!< LCD_T::DATA06: DD3 Position */ 995 #define LCD_DATA06_DD3_Msk (0xfful << LCD_DATA06_DD3_Pos) /*!< LCD_T::DATA06: DD3 Mask */ 996 997 #define LCD_DATA07_DD0_Pos (0) /*!< LCD_T::DATA07: DD0 Position */ 998 #define LCD_DATA07_DD0_Msk (0xfful << LCD_DATA07_DD0_Pos) /*!< LCD_T::DATA07: DD0 Mask */ 999 1000 #define LCD_DATA07_DD1_Pos (8) /*!< LCD_T::DATA07: DD1 Position */ 1001 #define LCD_DATA07_DD1_Msk (0xfful << LCD_DATA07_DD1_Pos) /*!< LCD_T::DATA07: DD1 Mask */ 1002 1003 #define LCD_DATA07_DD2_Pos (16) /*!< LCD_T::DATA07: DD2 Position */ 1004 #define LCD_DATA07_DD2_Msk (0xfful << LCD_DATA07_DD2_Pos) /*!< LCD_T::DATA07: DD2 Mask */ 1005 1006 #define LCD_DATA07_DD3_Pos (24) /*!< LCD_T::DATA07: DD3 Position */ 1007 #define LCD_DATA07_DD3_Msk (0xfful << LCD_DATA07_DD3_Pos) /*!< LCD_T::DATA07: DD3 Mask */ 1008 1009 #define LCD_DATA08_DD0_Pos (0) /*!< LCD_T::DATA08: DD0 Position */ 1010 #define LCD_DATA08_DD0_Msk (0xfful << LCD_DATA08_DD0_Pos) /*!< LCD_T::DATA08: DD0 Mask */ 1011 1012 #define LCD_DATA08_DD1_Pos (8) /*!< LCD_T::DATA08: DD1 Position */ 1013 #define LCD_DATA08_DD1_Msk (0xfful << LCD_DATA08_DD1_Pos) /*!< LCD_T::DATA08: DD1 Mask */ 1014 1015 #define LCD_DATA08_DD2_Pos (16) /*!< LCD_T::DATA08: DD2 Position */ 1016 #define LCD_DATA08_DD2_Msk (0xfful << LCD_DATA08_DD2_Pos) /*!< LCD_T::DATA08: DD2 Mask */ 1017 1018 #define LCD_DATA08_DD3_Pos (24) /*!< LCD_T::DATA08: DD3 Position */ 1019 #define LCD_DATA08_DD3_Msk (0xfful << LCD_DATA08_DD3_Pos) /*!< LCD_T::DATA08: DD3 Mask */ 1020 1021 #define LCD_DATA09_DD0_Pos (0) /*!< LCD_T::DATA09: DD0 Position */ 1022 #define LCD_DATA09_DD0_Msk (0xfful << LCD_DATA09_DD0_Pos) /*!< LCD_T::DATA09: DD0 Mask */ 1023 1024 #define LCD_DATA09_DD1_Pos (8) /*!< LCD_T::DATA09: DD1 Position */ 1025 #define LCD_DATA09_DD1_Msk (0xfful << LCD_DATA09_DD1_Pos) /*!< LCD_T::DATA09: DD1 Mask */ 1026 1027 #define LCD_DATA09_DD2_Pos (16) /*!< LCD_T::DATA09: DD2 Position */ 1028 #define LCD_DATA09_DD2_Msk (0xfful << LCD_DATA09_DD2_Pos) /*!< LCD_T::DATA09: DD2 Mask */ 1029 1030 #define LCD_DATA09_DD3_Pos (24) /*!< LCD_T::DATA09: DD3 Position */ 1031 #define LCD_DATA09_DD3_Msk (0xfful << LCD_DATA09_DD3_Pos) /*!< LCD_T::DATA09: DD3 Mask */ 1032 1033 #define LCD_DATA10_DD0_Pos (0) /*!< LCD_T::DATA10: DD0 Position */ 1034 #define LCD_DATA10_DD0_Msk (0xfful << LCD_DATA10_DD0_Pos) /*!< LCD_T::DATA10: DD0 Mask */ 1035 1036 #define LCD_DATA10_DD1_Pos (8) /*!< LCD_T::DATA10: DD1 Position */ 1037 #define LCD_DATA10_DD1_Msk (0xfful << LCD_DATA10_DD1_Pos) /*!< LCD_T::DATA10: DD1 Mask */ 1038 1039 #define LCD_DATA10_DD2_Pos (16) /*!< LCD_T::DATA10: DD2 Position */ 1040 #define LCD_DATA10_DD2_Msk (0xfful << LCD_DATA10_DD2_Pos) /*!< LCD_T::DATA10: DD2 Mask */ 1041 1042 #define LCD_DATA10_DD3_Pos (24) /*!< LCD_T::DATA10: DD3 Position */ 1043 #define LCD_DATA10_DD3_Msk (0xfful << LCD_DATA10_DD3_Pos) /*!< LCD_T::DATA10: DD3 Mask */ 1044 1045 /**@}*/ /* LCD_CONST */ 1046 /**@}*/ /* end of LCD register group */ 1047 /**@}*/ /* end of REGISTER group */ 1048 1049 1050 #endif /* __LCD_REG_H__ */ 1051
