1/*
2 * longjmp for the Blackfin processor
3 *
4 * Copyright (C) 2006 Analog Devices, Inc.
5 *
6 * The authors hereby grant permission to use, copy, modify, distribute,
7 * and license this software and its documentation for any purpose, provided
8 * that existing copyright notices are retained in all copies and that this
9 * notice is included verbatim in any distributions. No written agreement,
10 * license, or royalty fee is required for any of the authorized uses.
11 * Modifications to this software may be copyrighted by their authors
12 * and need not follow the licensing terms described here, provided that
13 * the new terms are clearly indicated on the first page of each file where
14 * they apply.
15 */
16
17#define _ASM
18#define _SETJMP_H
19
20
21.text;
22.align 4;
23.globl _longjmp;
24.type _longjmp, STT_FUNC;
25_longjmp:
26	P0 = R0;
27	R0 = [P0 + 0x00];
28	[--SP] = R0;		/* Put P0 on the stack */
29
30	P1 = [P0 + 0x04];
31	P2 = [P0 + 0x08];
32	P3 = [P0 + 0x0C];
33	P4 = [P0 + 0x10];
34	P5 = [P0 + 0x14];
35
36	FP = [P0 + 0x18];
37	R0 = [SP++];		/* Grab P0 from old stack */
38	SP = [P0 + 0x1C];	/* Update Stack Pointer */
39	[--SP] = R0;		/* Put P0 on new stack */
40	[--SP] = R1;		/* Put VAL arg on new stack */
41
42	R0 = [P0 + 0x20];	/* Data Registers */
43	R1 = [P0 + 0x24];
44	R2 = [P0 + 0x28];
45	R3 = [P0 + 0x2C];
46	R4 = [P0 + 0x30];
47	R5 = [P0 + 0x34];
48	R6 = [P0 + 0x38];
49	R7 = [P0 + 0x3C];
50
51	R0 = [P0 + 0x40];
52	ASTAT = R0;
53
54	R0 = [P0 + 0x44];	/* Loop Counters */
55	LC0 = R0;
56	R0 = [P0 + 0x48];
57	LC1 = R0;
58
59	R0 = [P0 + 0x4C];	/* Accumulators */
60	A0.W = R0;
61	R0 = [P0 + 0x50];
62	A0.X = R0;
63	R0 = [P0 + 0x54];
64	A1.W = R0;
65	R0 = [P0 + 0x58];
66	A1.X = R0;
67
68	R0 = [P0 + 0x5C];	/* Index Registers */
69	I0 = R0;
70	R0 = [P0 + 0x60];
71	I1 = R0;
72	R0 = [P0 + 0x64];
73	I2 = R0;
74	R0 = [P0 + 0x68];
75	I3 = R0;
76
77	R0 = [P0 + 0x6C];	/* Modifier Registers */
78	M0 = R0;
79	R0 = [P0 + 0x70];
80	M1 = R0;
81	R0 = [P0 + 0x74];
82	M2 = R0;
83	R0 = [P0 + 0x78];
84	M3 = R0;
85
86	R0 = [P0 + 0x7C];	/* Length Registers */
87	L0 = R0;
88	R0 = [P0 + 0x80];
89	L1 = R0;
90	R0 = [P0 + 0x84];
91	L2 = R0;
92	R0 = [P0 + 0x88];
93	L3 = R0;
94
95	R0 = [P0 + 0x8C];	/* Base Registers */
96	B0 = R0;
97	R0 = [P0 + 0x90];
98	B1 = R0;
99	R0 = [P0 + 0x94];
100	B2 = R0;
101	R0 = [P0 + 0x98];
102	B3 = R0;
103
104	R0 = [P0 + 0x9C];	/* Return Address (PC) */
105	RETS = R0;
106
107	R0 = [SP++];
108	P0 = [SP++];
109
110	CC = R0 == 0;
111	IF !CC JUMP 1f;
112	R0 = 1;
1131:
114	RTS;
115.size _longjmp, .-_longjmp;
116