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Searched defs:ITNS (Results 1 – 7 of 7) sorted by relevance

/trusted-firmware-m-latest/platform/ext/cmsis/CMSIS/Core/Include/
Dcore_cm23.h364 …__IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Regist… member
Dcore_cm33.h497 …__IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Regist… member
Dcore_cm35p.h497 …__IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Regist… member
Dcore_starmc1.h508 …__IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Regist… member
Dcore_cm52.h533 …__IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Regist… member
Dcore_cm55.h507 …__IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Regist… member
Dcore_cm85.h528 …__IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Regist… member