1 /* 2 * Copyright (c) 2023 Wuerth Elektronik eiSos GmbH & Co. KG 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** 8 * @file 9 * @brief Header file for the WSEN-ITDS sensor driver. 10 */ 11 12 #ifndef _WSEN_ITDS_H 13 #define _WSEN_ITDS_H 14 15 /* Includes */ 16 17 #include <stdint.h> 18 19 #include <WeSensorsSDK.h> 20 21 22 /* ITDS 2533020201601 DEVICE_ID */ 23 24 #define ITDS_DEVICE_ID_VALUE 0x44 /**< This is the expected answer when requesting the ITDS_DEVICE_ID_REG */ 25 26 27 /* Available ITDS I2C slave addresses */ 28 29 #define ITDS_ADDRESS_I2C_0 0x18 /**< When SAO of ITDS is connected to ground */ 30 #define ITDS_ADDRESS_I2C_1 0x19 /**< When SAO of ITDS is connected to positive supply voltage */ 31 32 33 /* Register address definitions */ 34 35 #define ITDS_T_OUT_L_REG 0x0D /**< Temperature output LSB value register */ 36 #define ITDS_T_OUT_H_REG 0x0E /**< Temperature output MSB value register */ 37 #define ITDS_DEVICE_ID_REG 0x0F /**< Device ID register */ 38 /* Registers 0x10 - 0x1F are reserved. They contain factory calibration values that shall not be changed */ 39 #define ITDS_CTRL_1_REG 0x20 /**< Control register 1 */ 40 #define ITDS_CTRL_2_REG 0x21 /**< Control register 2 */ 41 #define ITDS_CTRL_3_REG 0x22 /**< Control register 3 */ 42 #define ITDS_CTRL_4_REG 0x23 /**< Control register 4 */ 43 #define ITDS_CTRL_5_REG 0x24 /**< Control register 5 */ 44 #define ITDS_CTRL_6_REG 0x25 /**< Control register 6 */ 45 #define ITDS_T_OUT_REG 0x26 /**< Temperature output data in 8 bit resolution register */ 46 #define ITDS_STATUS_REG 0x27 /**< Status register */ 47 #define ITDS_X_OUT_L_REG 0x28 /**< X axis acceleration output LSB value register */ 48 #define ITDS_X_OUT_H_REG 0x29 /**< X axis acceleration output MSB value register */ 49 #define ITDS_Y_OUT_L_REG 0x2A /**< Y axis acceleration output LSB value register */ 50 #define ITDS_Y_OUT_H_REG 0x2B /**< Y axis acceleration output MSB value register */ 51 #define ITDS_Z_OUT_L_REG 0x2C /**< Z axis acceleration output LSB value register */ 52 #define ITDS_Z_OUT_H_REG 0x2D /**< Z axis acceleration output MSB value register */ 53 #define ITDS_FIFO_CTRL_REG 0x2E /**< FIFO control register */ 54 #define ITDS_FIFO_SAMPLES_REG 0x2F /**< FIFO samples register */ 55 #define ITDS_TAP_X_TH_REG 0x30 /**< Tap recognition threshold in X direction register */ 56 #define ITDS_TAP_Y_TH_REG 0x31 /**< Tap recognition threshold in Y direction register */ 57 #define ITDS_TAP_Z_TH_REG 0x32 /**< Tap recognition threshold in Z direction register */ 58 #define ITDS_INT_DUR_REG 0x33 /**< Interrupt duration register */ 59 #define ITDS_WAKE_UP_TH_REG 0x34 /**< Wake-up threshold register */ 60 #define ITDS_WAKE_UP_DUR_REG 0x35 /**< Wake-up duration register */ 61 #define ITDS_FREE_FALL_REG 0x36 /**< Free-fall register */ 62 #define ITDS_STATUS_DETECT_REG 0x37 /**< Status detect register */ 63 #define ITDS_WAKE_UP_EVENT_REG 0x38 /**< Wake-up event register */ 64 #define ITDS_TAP_EVENT_REG 0x39 /**< Tap event register */ 65 #define ITDS_6D_EVENT_REG 0x3A /**< 6D (orientation change) event register */ 66 #define ITDS_ALL_INT_EVENT_REG 0x3B /**< All interrupts event register */ 67 #define ITDS_X_OFS_USR_REG 0x3C /**< Offset value for X axis register */ 68 #define ITDS_Y_OFS_USR_REG 0x3D /**< Offset value for Y axis register */ 69 #define ITDS_Z_OFS_USR_REG 0x3E /**< Offset value for Z axis register */ 70 #define ITDS_CTRL_7_REG 0x3F /**< Control register 7 */ 71 72 73 /* Register type definitions */ 74 75 /** 76 * @brief CTR_1_REG 77 * 78 * Address 0x20 79 * Type R/W 80 * Default value: 0x00 81 * 82 * ODR[3:0] | Power down / data rate configuration 83 * -------------------------------------------------------------- 84 * 0000 | Power down 85 * | 86 * | High performance Normal mode Low power mode 87 * 0001 | 12.5 Hz 12.5 Hz 1.6 Hz 88 * 0010 | 12.5 Hz 12.5 Hz 12.5 Hz 89 * 0011 | 25 Hz 25 Hz 25 Hz 90 * 0100 | 50 Hz 50 Hz 50 Hz 91 * 0101 | 100 Hz 100 Hz 100 Hz 92 * 0110 | 200 Hz 200 Hz 200 Hz 93 * 0111 | 400 Hz 200 Hz 200 Hz 94 * 1000 | 800 Hz 800 Hz 200 Hz 95 * 1001 | 1600Hz 1600Hz 200 Hz 96 * 97 * 98 * MODE[1:0] | Operating mode and resolution 99 * ---------------------------------------------------------------------------------------- 100 * 00 | Normal mode (14-bit resolution) / Low power mode (12-bit resolution) 101 * 01 | High performance mode (14-bit resolution) 102 * 10 | Single data conversion on demand mode (12/14-bit resolution) 103 * 11 | Unused 104 */ 105 typedef struct 106 { 107 uint8_t powerMode : 2; /**< LP_MODE[1:0]: Select normal mode or low power mode. Default 00 [00: low power mode; 10: normal mode] */ 108 uint8_t operatingMode : 2; /**< MODE[1:0]: Select the operating mode and resolution. Default 00 */ 109 uint8_t outputDataRate : 4; /**< ODR[3:0]: Output data rate selection. Default 0000 */ 110 } ITDS_ctrl1_t; 111 112 /** 113 * @brief CTR_2_REG 114 * 115 * Address 0x21 116 * Type R/W 117 * Default value: 0x00 118 */ 119 typedef struct 120 { 121 uint8_t notUsed01 : 1; /**< This bit must be set to 0 for proper operation of the device. */ 122 uint8_t i2cDisable : 1; /**< I2C_DISABLE: Disable I2C digital Interface. Default: 0 (0: enabled; 1: disabled). */ 123 uint8_t autoAddIncr : 1; /**< IF_ADD_INC: Register address automatically incremented during a multiple byte access with I2C interface. Default: 1. (0: disable; 1: enable). */ 124 uint8_t blockDataUpdate : 1; /**< BDU: Block data update. 0 - continuous update; 1 - output registers are not updated until MSB and LSB have been read. */ 125 uint8_t disCSPullUp : 1; /**< CP_PU_DISC: Disconnect pull up to CS pin. Default: 0 (0: connected; 1: disconnected). */ 126 uint8_t notUsed02 : 1; /**< This bit must be set to 0 for proper operation of the device. */ 127 uint8_t softReset : 1; /**< SOFT_RESET: Software reset. 0: normal mode; 1: SW reset; Self-clearing upon completion. */ 128 uint8_t boot : 1; /**< BOOT: Set this bit to 1 to initiate boot sequence. 0: normal mode; 1: Execute boot sequence. Self-clearing upon completion. */ 129 } ITDS_ctrl2_t; 130 131 /** 132 * @brief CTR_3_REG 133 * 134 * Address 0x22 135 * Type R/W 136 * Default value: 0x00 137 * 138 * 139 * ST[1:0] | Self-test mode 140 * ------------------------------------------- 141 * 00 | Normal mode 142 * 01 | Positive sign self-test 143 * 10 | Negative sign self-test 144 * 11 | - 145 */ 146 typedef struct 147 { 148 uint8_t startSingleDataConv : 1; /**< SLP_MODE_1: Request single data conversion */ 149 uint8_t singleConvTrigger : 1; /**< SLP_MODE_SEL: Single data conversion (on-demand) trigger signal. 0: Triggered by external signal on INT_1, 1: Triggered by writing 1 to SLP_MODE_1. */ 150 uint8_t notUsed01 : 1; /**< This bit must be set to 0 for proper operation of the device */ 151 uint8_t intActiveLevel : 1; /**< H_LACTIVE: Interrupt active level. Default: 0 (0: active high; 1: active low) */ 152 uint8_t enLatchedInterrupt : 1; /**< LIR: Enable latched interrupt. Default: 0. (0: disabled; 1: enabled) */ 153 uint8_t intPinConf : 1; /**< PP_OD: Push-pull/open-drain selection on interrupt pad. Default: 0 (0: push-pull; 1: open-drain) */ 154 uint8_t selfTestMode : 2; /**< ST[1:0]: Select self test mode. Default: 00. */ 155 } ITDS_ctrl3_t; 156 157 /** 158 * @brief CTR_4_REG 159 * 160 * Address 0x23 161 * Type R/W 162 * Default value: 0x00 163 */ 164 typedef struct 165 { 166 uint8_t dataReadyINT0 : 1; /**< INT0_DRDY: Data-ready interrupt signal is routed to INT_0 pin. Default: 0 (0: disabled, 1: enabled) */ 167 uint8_t fifoThresholdINT0 : 1; /**< INT0_FTH: FIFO threshold interrupt signal is routed to INT_0 pin. Default: 0 (0: disabled, 1: enabled)) */ 168 uint8_t fifoFullINT0 : 1; /**< INT0_DIFF5: FIFO full interrupt signal is routed to INT_0 pin. Default: 0 (0: disabled, 1: enabled) */ 169 uint8_t doubleTapINT0 : 1; /**< INT0_TAP: Double-tap recognition signal is routed to INT_0 pin. Default: 0 (0: disabled, 1: enabled) */ 170 uint8_t freeFallINT0 : 1; /**< INT0_FF: Free-fall recognition signal is routed to INT_0 pin. Default: 0 (0: disabled, 1: enabled) */ 171 uint8_t wakeUpINT0 : 1; /**< INT0_WU: Wake-up recognition signal is routed to INT_0 pin. Default: 0 (0: disabled, 1: enabled) */ 172 uint8_t singleTapINT0 : 1; /**< INT0_SINGLE_TAP: Single-tap recognition signal is routed to INT_0 pin: Default: 0 (0: disabled, 1: enabled) */ 173 uint8_t sixDINT0 : 1; /**< INT0_6D: 6D recognition signal is routed to INT_0 pin. Default: 0 (0: disabled, 1: enabled) */ 174 } ITDS_ctrl4_t; 175 176 /** 177 * @brief CTR_5_REG 178 * 179 * Address 0x24 180 * Type R/W 181 * Default value: 0x00 182 */ 183 typedef struct 184 { 185 uint8_t dataReadyINT1 : 1; /**< INT1_DRDY: Data-ready interrupt signal is routed to INT_1 pin. Default: 0 (0: disabled, 1: enabled) */ 186 uint8_t fifoThresholdINT1 : 1; /**< INT1_FTH: FIFO threshold interrupt signal is routed to INT_1 pin. Default: 0 (0: disabled, 1: enabled)) */ 187 uint8_t fifoFullINT1 : 1; /**< INT1_DIFF5: FIFO full interrupt signal is routed to INT_1 pin. Default: 0 (0: disabled, 1: enabled) */ 188 uint8_t fifoOverrunINT1 : 1; /**< INT1_OVR: FIFO overrun interrupt signal is routed to INT_1 pin. Default: 0 (0: disabled, 1: enabled) */ 189 uint8_t tempDataReadyINT1 : 1; /**< INT1_DRDY_T: Temperature data-ready interrupt signal is routed to INT_1 pin. Default: 0 (0: disabled, 1: enabled) */ 190 uint8_t bootStatusINT1 : 1; /**< INT1_BOOT: Boot status interrupt signal is routed to INT_1 pin. Default: 0 (0: disabled, 1: enabled) */ 191 uint8_t sleepStatusChangeINT1 : 1; /**< INT1_SLEEP_CHG: Sleep change status interrupt signal is routed to INT_1 pin. Default: 0 (0: disabled, 1: enabled) */ 192 uint8_t sleepStateINT1 : 1; /**< INT1_SLEEP_STATE: Sleep state interrupt signal is routed to INT_1 pin. Default: 0 (0: disabled, 1: enabled) */ 193 } ITDS_ctrl5_t; 194 195 /** 196 * @brief CTR_6_REG 197 * 198 * Address 0x25 199 * Type R/W 200 * Default value: 0x00 201 * 202 * 203 * BW_FILT[1:0] | Bandwidth selection 204 * ------------------------------------------------------------- 205 * 00 | ODR/2 (except for ODR = 1600 Hz, 400 Hz) 206 * 01 | ODR/4 (High pass / Low pass filter) 207 * 10 | ODR/10 (High pass / Low pass filter) 208 * 11 | ODR/20 (High pass / Low pass filter) 209 * 210 * 211 * FS[1:0] | Full scale selection 212 * --------------------------------------- 213 * 00 | ±2g 214 * 01 | ±4g 215 * 10 | ±8g 216 * 11 | ±16g 217 */ 218 typedef struct 219 { 220 uint8_t notUsed01 : 1; /**< This bit must be set to 0 for proper operation of the device */ 221 uint8_t notUsed02 : 1; /**< This bit must be set to 0 for proper operation of the device */ 222 uint8_t enLowNoise : 1; /**< LOW_NOISE: low noise configuration (0: disabled; 1: enabled) */ 223 uint8_t filterPath : 1; /**< FDS: Filtered path configuration. Default value: 0. (0: low pass filter; 1: high pass filter) */ 224 uint8_t fullScale : 2; /**< FS[1:0]: Full scale selection */ 225 uint8_t filterBandwidth : 2; /**< BW_FILT[1:0]: Filter bandwidth selection */ 226 } ITDS_ctrl6_t; 227 228 /** 229 * @brief STATUS_REG 230 * 231 * Address 0x27 232 * Type R 233 * Default value: 0x00 234 * 235 * Note: The status register is partially duplicated to the STATUS_DETECT_REG register. 236 */ 237 typedef struct 238 { 239 uint8_t dataReady : 1; /**< DRDY: Acceleration data-ready status bit (0: not ready, 1: X-, Y- and Z-axis new data available) */ 240 uint8_t freeFall : 1; /**< FF_IA: Free-fall event detection bit (0: free-fall event not detected; 1: free-fall event detected) */ 241 uint8_t sixDDetection : 1; /**< 6D_IA: Source of change in position portrait/landscape/face-up/face-down. (0: no event detected, 1: change in position detected) */ 242 uint8_t singleTap : 1; /**< SINGLE_TAP: Single-tap event status bit (0: Single-tap event not detected, 1: Single-tap event detected) */ 243 uint8_t doubleTap : 1; /**< DOUBLE_TAP: Double-tap event status bit (0: Double-tap event not detected, 1: Double-tap event detected) */ 244 uint8_t sleepState : 1; /**< SLEEP_STATE: Sleep event status bit (0: Sleep event not detected, 1: Sleep event detected) */ 245 uint8_t wakeUp : 1; /**< WU_IA: Wake-up event detection status bit (0: Wake-up event not detected, 1: Wake-up event detected) */ 246 uint8_t fifoThreshold : 1; /**< FIFO_THS: FIFO threshold status bit (0: FIFO filling is lower than threshold level, 1: FIFO filling is equal to or higher than the threshold level) */ 247 } ITDS_status_t; 248 249 /** 250 * @brief FIFO_CTRL_REG 251 * 252 * Address 0x2E 253 * Type R/W 254 * Default value: 0x00 255 * 256 * FMODE[2:0] | Mode Description 257 * -------------------------------------------------------------------- 258 * 000 | Enable bypass mode and FIFO buffer is turned off (not active) 259 * 001 | Enable FIFO mode 260 * 010 | Reserved 261 * 011 | Enable continuous to FIFO mode 262 * 100 | Enable bypass to continuous mode 263 * 101 | Reserved 264 * 110 | Enable continuous mode 265 * 111 | Reserved 266 */ 267 typedef struct 268 { 269 uint8_t fifoThresholdLevel : 5; /**< FTH[4:0]: Set the FIFO threshold level */ 270 uint8_t fifoMode : 3; /**< FMODE[2:0]: Select the FIFO mode */ 271 } ITDS_fifoCtrl_t; 272 273 /** 274 * @brief FIFO_SAMPLES_REG 275 * 276 * Address 0x2F 277 * Type R 278 * Default value: 0x00 279 */ 280 typedef struct 281 { 282 uint8_t fifoFillLevel : 6; /**< Diff[5:0]: Current fill level of FIFO i.e. the number of unread samples (’000000’ = FIFO empty, ’100000’ = FIFO full, 32 unread samples) */ 283 uint8_t fifoOverrunState : 1; /**< FIFO_OVR: FIFO overrun status (0: FIFO is not completely filled, 1: FIFO is completely filled and at least one sample has been overwritten) */ 284 uint8_t fifoThresholdState : 1; /**< FIFO_FTH: FIFO threshold status bit (0: FIFO filling is lower than threshold level, 1: FIFO filling is equal to or higher than the threshold level) */ 285 } ITDS_fifoSamples_t; 286 287 /** 288 * @brief TAP_X_TH_REG 289 * 290 * Address 0x30 291 * Type R/W 292 * Default value: 0x00 293 * 294 * 6D_THS[1:0] | Threshold definition (degrees) 295 * ------------------------------------------- 296 * 00 | 6 (80 degrees) 297 * 01 | 11 (70 degrees) 298 * 10 | 16 (60 degrees) 299 * 11 | 21 (50 degrees) 300 * 301 */ 302 typedef struct 303 { 304 uint8_t xAxisTapThreshold : 5; /**< TAP_THSX_[4:0]: Threshold for tap recognition at FS = ±2g in X direction */ 305 uint8_t sixDThreshold : 2; /**< 6D_THS[1:0]: Threshold definition (degrees) */ 306 uint8_t fourDDetectionEnabled : 1; /**< 4D_EN: Enable 4D portrait/landscape detection. (0: 4D mode disabled; 1: portrait/landscape detection and face-up/face-down detection enabled) */ 307 } ITDS_tapXThreshold_t; 308 309 /** 310 * @brief TAP_Y_TH_REG 311 * 312 * Address 0x31 313 * Type R/W 314 * Default value: 0x00 315 * 316 * TAP_PRIOR[2:0] | Max Priority | Mid Priority | Min Priority 317 * ------------------------------------------------------ 318 * 000 | X | Y | Z 319 * 001 | Y | X | Z 320 * 010 | X | Z | Y 321 * 011 | Z | Y | X 322 * 100 | X | Y | Z 323 * 101 | Y | Z | X 324 * 110 | Z | X | Y 325 * 111 | Z | Y | X 326 */ 327 typedef struct 328 { 329 uint8_t yAxisTapThreshold : 5; /**< TAP_THSY_[4:0]: Threshold for tap recognition at FS = ±2g in Y direction */ 330 uint8_t tapAxisPriority : 3; /**< TAP_PRIOR[2:0]: Select the axis priority for tap detection */ 331 } ITDS_tapYThreshold_t; 332 333 /** 334 * @brief TAP_Z_TH_REG 335 * 336 * Address 0x32 337 * Type R/W 338 * Default value: 0x00 339 */ 340 typedef struct 341 { 342 uint8_t zAxisTapThreshold : 5; /**< TAP_THSZ_[4:0]: Threshold for tap recognition at FS: ±2g in Z direction. */ 343 uint8_t enTapZ : 1; /**< TAP_Z_EN: Enables tap recognition for Z axis. (0: disabled, 1: enabled) */ 344 uint8_t enTapY : 1; /**< TAP_Y_EN: Enables tap recognition for Y axis. (0: disabled, 1: enabled) */ 345 uint8_t enTapX : 1; /**< TAP_X_EN: Enables tap recognition for X axis. (0: disabled, 1: enabled) */ 346 } ITDS_tapZThreshold_t; 347 348 /** 349 * @brief INT_DUR_REG 350 * 351 * Address 0x33 352 * Type R/W 353 * Default value: 0x00 354 */ 355 typedef struct 356 { 357 uint8_t shock : 2; /**< SHOCK[1:0]: Defines the maximum duration of over-threshold event when detecting taps */ 358 uint8_t quiet : 2; /**< QUIET[1:0]: Defines the expected quiet time after a tap detection */ 359 uint8_t latency : 4; /**< LATENCY[3:0]: Defines the maximum duration time gap for double-tap recognition */ 360 } ITDS_intDuration_t; 361 362 /** 363 * @brief WAKE_UP_TH_REG 364 * 365 * Address 0x34 366 * Type R/W 367 * Default value: 0x00 368 */ 369 typedef struct 370 { 371 uint8_t wakeUpThreshold : 6; /**< WK_THS[5:0]: Defines wake-up threshold, 6-bit unsigned 1 LSB = 1/64 of FS. Default value: 000000 */ 372 uint8_t enInactivityEvent: 1; /**< SLEEP_ON: Enables inactivity (sleep). Default value: 0 (0: sleep disabled, 1: sleep enabled) */ 373 uint8_t enDoubleTapEvent : 1; /**< SINGLE_DOUBLE_TAP: Enable double-tap event. Default value: 0 (0: enable only single-tap, 1: enable both: single and double-tap) */ 374 } ITDS_wakeUpThreshold_t; 375 376 /** 377 * @brief WAKE_UP_DUR_REG 378 * 379 * Address 0x35 380 * Type R/W 381 * Default value: 0x00 382 */ 383 typedef struct 384 { 385 uint8_t sleepDuration : 4; /**< SLEEP_DUR[3:0]: Defines the sleep mode duration. Default value is SLEEP_DUR[3:0] = 0000 (which is 16 * 1/ODR) 1 LSB = 512 * 1/ODR */ 386 uint8_t enStationary : 1; /**< STATIONARY: Enables stationary detection / motion detection with no automatic ODR change when detecting stationary state. Default value: 0 (0: disabled, 1: enabled) */ 387 uint8_t wakeUpDuration : 2; /**< WAKE_DUR[1:0]: This parameter defines the wake-up duration. 1 LSB = 1 * 1/ODR */ 388 uint8_t freeFallDurationMSB : 1; /**< FF_DUR5: This bit defines the free-fall duration. Combined with FF_DUR [4:0] bit in FREE_FALL (0x36) register. 1 LSB = 1 * 1/ODR */ 389 } ITDS_wakeUpDuration_t; 390 391 /** 392 * @brief FREE_FALL_REG 393 * 394 * Address 0x36 395 * Type R/W 396 * Default value: 0x00 397 * 398 * FF_TH[2:0] | Decoded threshold 399 * ----------------------------------------- 400 * 000 | 5 401 * 001 | 7 402 * 010 | 8 403 * 011 | 10 404 * 100 | 11 405 * 101 | 13 406 * 110 | 15 407 * 111 | 16 408 */ 409 typedef struct 410 { 411 uint8_t freeFallThreshold : 3; /**< FF_TH[2:0]: Encoded free-fall threshold value. The decoded value can be multiplied with 31.25mg to get the used threshold. */ 412 uint8_t freeFallDurationLSB: 5; /**< FF_DUR[4:0]: Defines free-fall duration. Is combined with FF_DUR5 bit in WAKE_UP_DUR (0x35) register. 1 LSB = 1 * 1/ODR */ 413 } ITDS_freeFall_t; 414 415 /** 416 * @brief STATUS_DETECT_REG 417 * 418 * Address 0x37 419 * Type R 420 * Default value: 0x00 421 * 422 * Note: This register is partially duplicated from the STATUS_REG register. 423 */ 424 typedef struct 425 { 426 uint8_t dataReady : 1; /**< DRDY: Acceleration data-ready status (0: not ready, 1: X-, Y- and Z-axis new data available) */ 427 uint8_t freeFall : 1; /**< FF_IA: Free-fall event detection status (0: Free-fall event not detected, 1: Free-fall event detected) */ 428 uint8_t sixDDetection : 1; /**< 6D_IA: Orientation change detection status (0: No event detected, 1: A change in orientation has been detected) */ 429 uint8_t singleTap : 1; /**< SINGLE_TAP: Single-tap event status (0: Single-tap event not detected; 1: Single-tap event detected) */ 430 uint8_t doubleTap : 1; /**< DOUBLE_TAP: Double-tap event status (0: Double-tap event not detected, 1: Double-tap event detected) */ 431 uint8_t sleepState : 1; /**< SLEEP_STATE_IA: Sleep event status (0: Sleep event not detected, 1: Sleep event detected) */ 432 uint8_t temperatureDataReady: 1; /**< DRDY_T: Temperature available status (0: Data not available, 1: A new set of data is available) */ 433 uint8_t fifoOverrunState : 1; /**< OVR: FIFO overrun status (0: FIFO is not completely filled, 1: FIFO is completely filled and at least one sample has been overwritten) */ 434 } ITDS_statusDetect_t; 435 436 /** 437 * @brief WAKE_UP_EVENT_REG 438 * 439 * Address 0x38 440 * Type R 441 * Default value: 0x00 442 */ 443 typedef struct 444 { 445 uint8_t wakeUpZ : 1; /**< Z_WU: Wake-up event on Z-axis status (0: Wake-up event on Z-axis not detected, 1: Wake-up event on Z-axis detected) */ 446 uint8_t wakeUpY : 1; /**< Y_WU: Wake-up event on Y-axis status (0: Wake-up event on Y-axis not detected, 1: Wake-up event on Y-axis detected) */ 447 uint8_t wakeUpX : 1; /**< X_WU: Wake-up event on X-axis status (0: Wake-up event on X-axis not detected, 1: Wake-up event on X-axis detected) */ 448 uint8_t wakeUpState : 1; /**< WU_IA: Wake-up event detection status (0: Wake-up event not detected, 1: Wake-up event detected) */ 449 uint8_t sleepState : 1; /**< SLEEP_STATE_IA: Sleep event status (0: Sleep event not detected, 1: Sleep event detected) */ 450 uint8_t freeFallState : 1; /**< FF_IA: Free-fall event detection status (0: FF event not detected, 1: FF event detected) */ 451 uint8_t notUsed01 : 1; /**< This bit must be set to 0 for proper operation of the device */ 452 uint8_t notUsed02 : 1; /**< This bit must be set to 0 for proper operation of the device */ 453 } ITDS_wakeUpEvent_t; 454 455 /** 456 * @brief TAP_EVENT_REG 457 * 458 * Address 0x39 459 * Type R 460 * Default value: 0x00 461 */ 462 typedef struct 463 { 464 uint8_t tapZAxis : 1; /**< Z_TAP: Tap event detection on Z-axis status (0: Tap event on Z-axis not detected, 1: Tap event on Z-axis detected) */ 465 uint8_t tapYAxis : 1; /**< Y_TAP: Tap event detection on Y-axis status (0: Tap event on Y-axis not detected, 1: Tap event on Y-axis detected) */ 466 uint8_t tapXAxis : 1; /**< X_TAP: Tap event detection on X-axis status (0: Tap event on X-axis not detected, 1: Tap event on X-axis detected) */ 467 uint8_t tapSign : 1; /**< TAP_SIGN: Sign of acceleration detected by tap event (0: Tap in positive direction, 1: Tap in negative direction) */ 468 uint8_t doubleState : 1; /**< DOUBLE_TAP: Double-tap event status (0: Double-tap event not detected, 1: Double-tap event detected) */ 469 uint8_t singleState : 1; /**< SINGLE_TAP: Single-tap event status (0: Single-tap event not detected, 1: Single-tap event detected) */ 470 uint8_t tapEventState : 1; /**< TAP_IA: Tap event status (0: Tap event not detected, 1: Tap event detected) */ 471 uint8_t notUsed01 : 1; /**< This bit must be set to 0 for proper operation of the device */ 472 } ITDS_tapEvent_t; 473 474 /** 475 * @brief 6D_EVENT_REG 476 * 477 * Address 0x3A 478 * Type R 479 * Default value: 0x00 480 * 481 * xhOverThreshold, yhOverThreshold, zhOverThreshold: Is set high when the face perpendicular to the 482 * Z (Y, X) axis is almost flat and the acceleration measured on the Z (Y, X) axis is positive and in 483 * the absolute value bigger than the threshold. 484 * 485 * xlOverThreshold (ylOverThreshold, zlOverThreshold): Is set high when the face perpendicular to the 486 * Z (Y, X) axis is almost flat and the acceleration measured on the Z (Y, X) axis is negative and in 487 * the absolute value bigger than the threshold. 488 */ 489 typedef struct 490 { 491 uint8_t xlOverThreshold : 1; /**< 1: XL threshold exceeded, 0: XL threshold not exceeded */ 492 uint8_t xhOverThreshold : 1; /**< 1: XH threshold exceeded, 0: XH threshold not exceeded */ 493 uint8_t ylOverThreshold : 1; /**< 1: YL threshold exceeded, 0: YL threshold not exceeded */ 494 uint8_t yhOverThreshold : 1; /**< 1: YH threshold exceeded, 0: YH threshold not exceeded */ 495 uint8_t zlOverThreshold : 1; /**< 1: ZL threshold exceeded, 0: ZL threshold not exceeded */ 496 uint8_t zhOverThreshold : 1; /**< 1: ZH threshold exceeded, 0: ZH threshold not exceeded */ 497 uint8_t sixDChange : 1; /**< 6D_IA: Orientation change detection status (0: No event detected, 1: A change in orientation has been detected) */ 498 uint8_t notUsed01 : 1; /**< This bit must be set to 0 for proper operation of the device */ 499 } ITDS_6dEvent_t; 500 501 /** 502 * @brief ALL_INT_EVENT_REG 503 * 504 * Address 0x3B 505 * Type R 506 * Default value: 0x00 507 */ 508 typedef struct 509 { 510 uint8_t freeFallState : 1; /**< FF_IA: Free-fall event detection status (0: free-fall event not detected, 1: free-fall event detected) */ 511 uint8_t wakeupState : 1; /**< WU_IA: Wake-up event detection status (0: wake-up event not detected, 1: wake-up event detected) */ 512 uint8_t singleTapState : 1; /**< SINGLE_TAP: Single-tap event status (0: single-tap event not detected, 1: single-tap event detected) */ 513 uint8_t doubleTapState : 1; /**< DOUBLE_TAP: Double-tap event status (0: double-tap event not detected, 1: double-tap event detected) */ 514 uint8_t sixDState : 1; /**< 6D_IA: Orientation change detection status (0: No event detected, 1: A change in orientation has been detected) */ 515 uint8_t sleepChangeState : 1; /**< SLEEP_CHANGE_IA: Sleep change status (0: Sleep change not detected; 1: Sleep change detected) */ 516 uint8_t notUsed01 : 1; /**< This bit must be set to 0 for proper operation of the device */ 517 uint8_t notUsed02 : 1; /**< This bit must be set to 0 for proper operation of the device */ 518 } ITDS_allInterruptEvents_t; 519 520 /** 521 * @brief CTRL_7_REG 522 * 523 * Address 0x3F 524 * Type R/W 525 * Default value: 0x00 526 */ 527 typedef struct 528 { 529 uint8_t lowPassOn6D : 1; /**< 0: ODR/2 low pass filtered data sent to 6D interrupt function (default), 1: LPF_1 output data sent to 6D interrupt function */ 530 uint8_t highPassRefMode : 1; /**< HP_REF_MODE: Enables high-pass filter reference mode. Default: 0 (0: high-pass filter reference mode disabled, 1: high-pass filter reference mode enabled) */ 531 uint8_t userOffset : 1; /**< USR_OFF_W: Defines the selection of weight of the user offset words specified by X_OFS_USR[7:0], Y_OFS_USR[7:0] and Z_OFS_USR[7:0] bits (0:977 µg/LSB, 1: 15.6 mg/LSB) */ 532 uint8_t applyWakeUpOffset : 1; /**< USR_OFF_ON_WU: Enable application of user offset value to data for wake-up function only */ 533 uint8_t applyOffset : 1; /**< USR_OFF_ON_OUT: Enable application of user offset value to output data registers. FDS: bit in CTRL_6 (0x25) must be set to ’0’-logic (low-pass path selected) */ 534 uint8_t enInterrupts : 1; /**< INTERRUPTS_ENABLE: Enable interrupts */ 535 uint8_t INT1toINT0 : 1; /**< INT1_ON_INT0: Defines signal routing (0: normal mode, 1: all signals available only on INT_1 are routed to INT_0) */ 536 uint8_t drdyPulse : 1; /**< DRDY_PULSED: Switches between latched and pulsed mode for data ready interrupt (0: latched mode is used, 1: pulsed mode enabled for data-ready) */ 537 538 } ITDS_ctrl7_t; 539 540 541 /* Functional type definitions */ 542 543 typedef enum 544 { 545 ITDS_disable = 0, 546 ITDS_enable = 1 547 } ITDS_state_t; 548 549 typedef enum 550 { 551 ITDS_positive = 0, 552 ITDS_negative = 1 553 } ITDS_tapSign_t; 554 555 typedef enum 556 { 557 ITDS_odr0 = 0, /**< Power down */ 558 /**< High performance Normal mode Low power mode */ 559 ITDS_odr1 = 1, /**< 12.5 Hz 12.5 Hz 1.6 Hz */ 560 ITDS_odr2 = 2, /**< 12.5 Hz 12.5 Hz 12.5 Hz */ 561 ITDS_odr3 = 3, /**< 25 Hz 25 Hz 25 Hz */ 562 ITDS_odr4 = 4, /**< 50 Hz 50 Hz 50 Hz */ 563 ITDS_odr5 = 5, /**< 100 Hz 100 Hz 100 Hz */ 564 ITDS_odr6 = 6, /**< 200 Hz 200 Hz 200 Hz */ 565 ITDS_odr7 = 7, /**< 400 Hz 200 Hz 200 Hz */ 566 ITDS_odr8 = 8, /**< 800 Hz 800 Hz 200 Hz */ 567 ITDS_odr9 = 9 /**< 1600Hz 1600Hz 200 Hz */ 568 } ITDS_outputDataRate_t; 569 570 typedef enum 571 { 572 ITDS_normalOrLowPower = 0, 573 ITDS_highPerformance = 1, 574 ITDS_singleConversion = 2 575 } ITDS_operatingMode_t; 576 577 typedef enum 578 { 579 ITDS_lowPower = 0, 580 ITDS_normalMode = 1 581 } ITDS_powerMode_t; 582 583 typedef enum 584 { 585 ITDS_off = 0, 586 ITDS_positiveAxis = 1, 587 ITDS_negativeAxis = 2 588 } ITDS_selfTestConfig_t; 589 590 typedef enum 591 { 592 ITDS_pushPull = 0, 593 ITDS_openDrain = 1 594 } ITDS_interruptPinConfig_t; 595 596 typedef enum 597 { 598 ITDS_activeHigh = 0, 599 ITDS_activeLow = 1 600 } ITDS_interruptActiveLevel_t; 601 602 typedef enum 603 { 604 ITDS_externalTrigger = 0, /**< Triggered by external signal on INT_1 */ 605 ITDS_registerTrigger = 1 /**< Triggered by writing register (SLP_MODE_1 = 1) */ 606 } ITDS_singleDataConversionTrigger_t; 607 608 typedef enum 609 { 610 ITDS_outputDataRate_2 = 0, /**< ODR/2 (except for ODR = 1600 Hz, 400 Hz) */ 611 ITDS_outputDataRate_4 = 1, /**< ODR/4 (High pass / Low pass filter) */ 612 ITDS_outputDataRate_10 = 2, /**< ODR/10 (High pass / Low pass filter) */ 613 ITDS_outputDataRate_20 = 3 /**< ODR/20 (High pass / Low pass filter) */ 614 } ITDS_bandwidth_t; 615 616 typedef enum 617 { 618 ITDS_twoG = 0, /**< ±2g */ 619 ITDS_fourG = 1, /**< ±4g */ 620 ITDS_eightG = 2, /**< ±8g */ 621 ITDS_sixteenG = 3 /**< ±16g */ 622 } ITDS_fullScale_t; 623 624 typedef enum 625 { 626 ITDS_lowPass = 0, 627 ITDS_highPass = 1 628 } ITDS_filterType_t; 629 630 typedef enum 631 { 632 ITDS_bypassMode = 0, 633 ITDS_fifoEnabled = 1, 634 ITDS_continuousToFifo = 3, 635 ITDS_bypassToContinuous = 4, 636 ITDS_continuousMode = 6 637 } ITDS_FifoMode_t; 638 639 typedef enum 640 { 641 ITDS_eightyDeg = 0, /**< 6 (80 degrees) */ 642 ITDS_seventyDeg = 1, /**< 11 (70 degrees) */ 643 ITDS_sixtyDeg = 2, /**< 16 (60 degrees) */ 644 ITDS_fiftyDeg = 3 /**< 21 (50 degrees) */ 645 } ITDS_thresholdDegree_t; 646 647 typedef enum 648 { 649 ITDS_X_Y_Z = 0, 650 ITDS_Y_X_Z = 1, 651 ITDS_X_Z_Y = 2, 652 ITDS_Z_Y_X = 3, 653 ITDS_Y_Z_X = 5, 654 ITDS_Z_X_Y = 6 655 } ITDS_tapAxisPriority_t; 656 657 typedef enum 658 { 659 ITDS_five = 0, 660 ITDS_seven = 1, 661 ITDS_eight = 2, 662 ITDS_ten = 3, 663 ITDS_eleven = 4, 664 ITDS_thirteen = 5, 665 ITDS_fifteen = 6, 666 ITDS_sixteen = 7, 667 } ITDS_FreeFallThreshold_t; 668 669 typedef enum 670 { 671 ITDS_latched = 0, 672 ITDS_pulsed = 1 673 } ITDS_drdyPulse_t; 674 675 676 677 #ifdef __cplusplus 678 extern "C" 679 { 680 #endif 681 682 /* Function definitions */ 683 684 int8_t ITDS_getDefaultInterface(WE_sensorInterface_t* sensorInterface); 685 686 int8_t ITDS_getDeviceID(WE_sensorInterface_t* sensorInterface, uint8_t *deviceID); 687 688 /* CTRL-REG 1 */ 689 int8_t ITDS_setOutputDataRate(WE_sensorInterface_t* sensorInterface, ITDS_outputDataRate_t odr); 690 int8_t ITDS_getOutputDataRate(WE_sensorInterface_t* sensorInterface, ITDS_outputDataRate_t *odr); 691 int8_t ITDS_setOperatingMode(WE_sensorInterface_t* sensorInterface, ITDS_operatingMode_t opMode); 692 int8_t ITDS_getOperatingMode(WE_sensorInterface_t* sensorInterface, ITDS_operatingMode_t *opMode); 693 int8_t ITDS_setPowerMode(WE_sensorInterface_t* sensorInterface, ITDS_powerMode_t powerMode); 694 int8_t ITDS_getPowerMode(WE_sensorInterface_t* sensorInterface, ITDS_powerMode_t *powerMode); 695 696 /* CTRL-REG 2 */ 697 int8_t ITDS_reboot(WE_sensorInterface_t* sensorInterface, ITDS_state_t reboot); 698 int8_t ITDS_isRebooting(WE_sensorInterface_t* sensorInterface, ITDS_state_t *rebooting); 699 int8_t ITDS_softReset(WE_sensorInterface_t* sensorInterface, ITDS_state_t swReset); 700 int8_t ITDS_getSoftResetState(WE_sensorInterface_t* sensorInterface, ITDS_state_t *swReset); 701 int8_t ITDS_setCSPullUpDisconnected(WE_sensorInterface_t* sensorInterface, ITDS_state_t disconnectPU); 702 int8_t ITDS_isCSPullUpDisconnected(WE_sensorInterface_t* sensorInterface, ITDS_state_t *puDisconnected); 703 int8_t ITDS_enableBlockDataUpdate(WE_sensorInterface_t* sensorInterface, ITDS_state_t bdu); 704 int8_t ITDS_isBlockDataUpdateEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *bdu); 705 int8_t ITDS_enableAutoIncrement(WE_sensorInterface_t* sensorInterface, ITDS_state_t autoIncr); 706 int8_t ITDS_isAutoIncrementEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *autoIncr); 707 int8_t ITDS_disableI2CInterface(WE_sensorInterface_t* sensorInterface, ITDS_state_t i2cDisable); 708 int8_t ITDS_isI2CInterfaceDisabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *i2cDisabled); 709 710 /* CTRL-REG 3 */ 711 int8_t ITDS_setSelfTestMode(WE_sensorInterface_t* sensorInterface, ITDS_selfTestConfig_t selfTest); 712 int8_t ITDS_getSelfTestMode(WE_sensorInterface_t* sensorInterface, ITDS_selfTestConfig_t *selfTest); 713 int8_t ITDS_setInterruptPinType(WE_sensorInterface_t* sensorInterface, ITDS_interruptPinConfig_t pinType); 714 int8_t ITDS_getInterruptPinType(WE_sensorInterface_t* sensorInterface, ITDS_interruptPinConfig_t *pinType); 715 int8_t ITDS_enableLatchedInterrupt(WE_sensorInterface_t* sensorInterface, ITDS_state_t lir); 716 int8_t ITDS_isLatchedInterruptEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *lir); 717 int8_t ITDS_setInterruptActiveLevel(WE_sensorInterface_t* sensorInterface, ITDS_interruptActiveLevel_t level); 718 int8_t ITDS_getInterruptActiveLevel(WE_sensorInterface_t* sensorInterface, ITDS_interruptActiveLevel_t *level); 719 int8_t ITDS_startSingleDataConversion(WE_sensorInterface_t* sensorInterface, ITDS_state_t start); 720 int8_t ITDS_isSingleDataConversionStarted(WE_sensorInterface_t* sensorInterface, ITDS_state_t *start); 721 int8_t ITDS_setSingleDataConversionTrigger(WE_sensorInterface_t* sensorInterface, ITDS_singleDataConversionTrigger_t conversionTrigger); 722 int8_t ITDS_getSingleDataConversionTrigger(WE_sensorInterface_t* sensorInterface, ITDS_singleDataConversionTrigger_t *conversionTrigger); 723 724 /* CTRL-REG 4 */ 725 int8_t ITDS_enable6DOnINT0(WE_sensorInterface_t* sensorInterface, ITDS_state_t int06D); 726 int8_t ITDS_is6DOnINT0Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int06D); 727 int8_t ITDS_enableSingleTapINT0(WE_sensorInterface_t* sensorInterface, ITDS_state_t int0SingleTap); 728 int8_t ITDS_isSingleTapINT0Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int0SingleTap); 729 int8_t ITDS_enableWakeUpOnINT0(WE_sensorInterface_t* sensorInterface, ITDS_state_t int0WakeUp); 730 int8_t ITDS_isWakeUpOnINT0Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int0WakeUp); 731 int8_t ITDS_enableFreeFallINT0(WE_sensorInterface_t* sensorInterface, ITDS_state_t int0FreeFall); 732 int8_t ITDS_isFreeFallINT0Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int0FreeFall); 733 int8_t ITDS_enableDoubleTapINT0(WE_sensorInterface_t* sensorInterface, ITDS_state_t int0DoubleTap); 734 int8_t ITDS_isDoubleTapINT0Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int0DoubleTap); 735 int8_t ITDS_enableFifoFullINT0(WE_sensorInterface_t* sensorInterface, ITDS_state_t int0FifoFull); 736 int8_t ITDS_isFifoFullINT0Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int0FifoFull); 737 int8_t ITDS_enableFifoThresholdINT0(WE_sensorInterface_t* sensorInterface, ITDS_state_t int0FifoThreshold); 738 int8_t ITDS_isFifoThresholdINT0Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int0FifoThreshold); 739 int8_t ITDS_enableDataReadyINT0(WE_sensorInterface_t* sensorInterface, ITDS_state_t int0DataReady); 740 int8_t ITDS_isDataReadyINT0Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int0DataReady); 741 742 /* CTRL-REG 5 */ 743 int8_t ITDS_enableSleepStatusINT1(WE_sensorInterface_t* sensorInterface, ITDS_state_t int1SleepStatus); 744 int8_t ITDS_isSleepStatusINT1Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int1SleepStatus); 745 int8_t ITDS_enableSleepStatusChangeINT1(WE_sensorInterface_t* sensorInterface, ITDS_state_t int1SleepChange); 746 int8_t ITDS_isSleepStatusChangeINT1Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int1SleepChange); 747 int8_t ITDS_enableBootStatusINT1(WE_sensorInterface_t* sensorInterface, ITDS_state_t int1Boot); 748 int8_t ITDS_isBootStatusINT1Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int1Boot); 749 int8_t ITDS_enableTempDataReadyINT1(WE_sensorInterface_t* sensorInterface, ITDS_state_t int1TempDataReady); 750 int8_t ITDS_isTempDataReadyINT1Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int1TempDataReady); 751 int8_t ITDS_enableFifoOverrunIntINT1(WE_sensorInterface_t* sensorInterface, ITDS_state_t int1FifoOverrun); 752 int8_t ITDS_isFifoOverrunIntINT1Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int1FifoOverrun); 753 int8_t ITDS_enableFifoFullINT1(WE_sensorInterface_t* sensorInterface, ITDS_state_t int1FifoFull); 754 int8_t ITDS_isFifoFullINT1Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int1FifoFull); 755 int8_t ITDS_enableFifoThresholdINT1(WE_sensorInterface_t* sensorInterface, ITDS_state_t int1FifoThresholdInt); 756 int8_t ITDS_isFifoThresholdINT1Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int1FifoThresholdInt); 757 int8_t ITDS_enableDataReadyINT1(WE_sensorInterface_t* sensorInterface, ITDS_state_t int1DataReadyInt); 758 int8_t ITDS_isDataReadyINT1Enabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int1DataReadyInt); 759 760 /* CTRL-REG 6 */ 761 int8_t ITDS_setFilteringCutoff(WE_sensorInterface_t* sensorInterface, ITDS_bandwidth_t filteringCutoff); 762 int8_t ITDS_getFilteringCutoff(WE_sensorInterface_t* sensorInterface, ITDS_bandwidth_t *filteringCutoff); 763 int8_t ITDS_setFullScale(WE_sensorInterface_t* sensorInterface, ITDS_fullScale_t fullScale); 764 int8_t ITDS_getFullScale(WE_sensorInterface_t* sensorInterface, ITDS_fullScale_t *fullScale); 765 int8_t ITDS_setFilterPath(WE_sensorInterface_t* sensorInterface, ITDS_filterType_t filterType); 766 int8_t ITDS_getFilterPath(WE_sensorInterface_t* sensorInterface, ITDS_filterType_t *filterType); 767 int8_t ITDS_enableLowNoise(WE_sensorInterface_t* sensorInterface, ITDS_state_t lowNoise); 768 int8_t ITDS_isLowNoiseEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *lowNoise); 769 770 /* Status */ 771 /* Note: The status register is partially duplicated to the STATUS_DETECT register. */ 772 int8_t ITDS_getStatusRegister(WE_sensorInterface_t* sensorInterface, ITDS_status_t *status); 773 int8_t ITDS_isAccelerationDataReady(WE_sensorInterface_t* sensorInterface, ITDS_state_t *dataReady); 774 int8_t ITDS_getSingleTapState(WE_sensorInterface_t* sensorInterface, ITDS_state_t *singleTap); 775 int8_t ITDS_getDoubleTapState(WE_sensorInterface_t* sensorInterface, ITDS_state_t *doubleTap); 776 int8_t ITDS_getSleepState(WE_sensorInterface_t* sensorInterface, ITDS_state_t *sleepState); 777 778 /* Acceleration output */ 779 int8_t ITDS_getRawAccelerationX(WE_sensorInterface_t* sensorInterface, int16_t *xRawAcc); 780 int8_t ITDS_getRawAccelerationY(WE_sensorInterface_t* sensorInterface, int16_t *yRawAcc); 781 int8_t ITDS_getRawAccelerationZ(WE_sensorInterface_t* sensorInterface, int16_t *zRawAcc); 782 int8_t ITDS_getRawAccelerations(WE_sensorInterface_t* sensorInterface, uint8_t numSamples, 783 int16_t *xRawAcc, 784 int16_t *yRawAcc, 785 int16_t *zRawAcc); 786 787 int8_t ITDS_getAccelerationX_float(WE_sensorInterface_t* sensorInterface, float *xAcc); 788 int8_t ITDS_getAccelerationY_float(WE_sensorInterface_t* sensorInterface, float *yAcc); 789 int8_t ITDS_getAccelerationZ_float(WE_sensorInterface_t* sensorInterface, float *zAcc); 790 int8_t ITDS_getAccelerations_float(WE_sensorInterface_t* sensorInterface, uint8_t numSamples, 791 float *xAcc, 792 float *yAcc, 793 float *zAcc); 794 795 float ITDS_convertAcceleration_float(int16_t acc, ITDS_fullScale_t fullScale); 796 float ITDS_convertAccelerationFs2g_float(int16_t acc); 797 float ITDS_convertAccelerationFs4g_float(int16_t acc); 798 float ITDS_convertAccelerationFs8g_float(int16_t acc); 799 float ITDS_convertAccelerationFs16g_float(int16_t acc); 800 801 int8_t ITDS_getAccelerationX_int(WE_sensorInterface_t* sensorInterface, int16_t *xAcc); 802 int8_t ITDS_getAccelerationY_int(WE_sensorInterface_t* sensorInterface, int16_t *yAcc); 803 int8_t ITDS_getAccelerationZ_int(WE_sensorInterface_t* sensorInterface, int16_t *zAcc); 804 int8_t ITDS_getAccelerations_int(WE_sensorInterface_t* sensorInterface, uint8_t numSamples, 805 int16_t *xAcc, 806 int16_t *yAcc, 807 int16_t *zAcc); 808 809 int16_t ITDS_convertAcceleration_int(int16_t acc, ITDS_fullScale_t fullScale); 810 int16_t ITDS_convertAccelerationFs2g_int(int16_t acc); 811 int16_t ITDS_convertAccelerationFs4g_int(int16_t acc); 812 int16_t ITDS_convertAccelerationFs8g_int(int16_t acc); 813 int16_t ITDS_convertAccelerationFs16g_int(int16_t acc); 814 815 /* Temperature output */ 816 int8_t ITDS_getTemperature8bit(WE_sensorInterface_t* sensorInterface, uint8_t *temp8bit); 817 int8_t ITDS_getRawTemperature12bit(WE_sensorInterface_t* sensorInterface, int16_t *temp12bit); 818 int8_t ITDS_getTemperature12bit(WE_sensorInterface_t* sensorInterface, float *tempDegC); 819 820 /* FIFO CTRL */ 821 int8_t ITDS_setFifoMode(WE_sensorInterface_t* sensorInterface, ITDS_FifoMode_t fifoMode); 822 int8_t ITDS_getFifoMode(WE_sensorInterface_t* sensorInterface, ITDS_FifoMode_t *fifoMode); 823 int8_t ITDS_setFifoThreshold(WE_sensorInterface_t* sensorInterface, uint8_t fifoThreshold); 824 int8_t ITDS_getFifoThreshold(WE_sensorInterface_t* sensorInterface, uint8_t *fifoThreshold); 825 826 /* FIFO_SAMPLES */ 827 int8_t ITDS_getFifoSamplesRegister(WE_sensorInterface_t* sensorInterface, ITDS_fifoSamples_t *fifoSamplesStatus); 828 int8_t ITDS_isFifoThresholdReached(WE_sensorInterface_t* sensorInterface, ITDS_state_t *fifoThr); 829 int8_t ITDS_getFifoOverrunState(WE_sensorInterface_t* sensorInterface, ITDS_state_t *fifoOverrun); 830 int8_t ITDS_getFifoFillLevel(WE_sensorInterface_t* sensorInterface, uint8_t *fifoFill); 831 832 /* TAP_X_TH */ 833 int8_t ITDS_enable4DDetection(WE_sensorInterface_t* sensorInterface, ITDS_state_t detection4D); 834 int8_t ITDS_is4DDetectionEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *detection4D); 835 int8_t ITDS_setTapThresholdX(WE_sensorInterface_t* sensorInterface, uint8_t tapThresholdX); 836 int8_t ITDS_getTapThresholdX(WE_sensorInterface_t* sensorInterface, uint8_t *tapThresholdX); 837 int8_t ITDS_set6DThreshold(WE_sensorInterface_t* sensorInterface, ITDS_thresholdDegree_t threshold6D); 838 int8_t ITDS_get6DThreshold(WE_sensorInterface_t* sensorInterface, ITDS_thresholdDegree_t *threshold6D); 839 840 /* TAP_Y_TH */ 841 int8_t ITDS_setTapThresholdY(WE_sensorInterface_t* sensorInterface, uint8_t tapThresholdY); 842 int8_t ITDS_getTapThresholdY(WE_sensorInterface_t* sensorInterface, uint8_t *tapThresholdY); 843 int8_t ITDS_setTapAxisPriority(WE_sensorInterface_t* sensorInterface, ITDS_tapAxisPriority_t priority); 844 int8_t ITDS_getTapAxisPriority(WE_sensorInterface_t* sensorInterface, ITDS_tapAxisPriority_t *priority); 845 846 /* TAP_Z_TH */ 847 int8_t ITDS_setTapThresholdZ(WE_sensorInterface_t* sensorInterface, uint8_t tapThresholdZ); 848 int8_t ITDS_getTapThresholdZ(WE_sensorInterface_t* sensorInterface, uint8_t *tapThresholdZ); 849 int8_t ITDS_enableTapX(WE_sensorInterface_t* sensorInterface, ITDS_state_t tapX); 850 int8_t ITDS_isTapXEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *tapX); 851 int8_t ITDS_enableTapY(WE_sensorInterface_t* sensorInterface, ITDS_state_t tapY); 852 int8_t ITDS_isTapYEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *tapY); 853 int8_t ITDS_enableTapZ(WE_sensorInterface_t* sensorInterface, ITDS_state_t tapZ); 854 int8_t ITDS_isTapZEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *tapZ); 855 856 /* INT_DUR */ 857 int8_t ITDS_setTapLatencyTime(WE_sensorInterface_t* sensorInterface, uint8_t latencyTime); 858 int8_t ITDS_getTapLatencyTime(WE_sensorInterface_t* sensorInterface, uint8_t *latencyTime); 859 int8_t ITDS_setTapQuietTime(WE_sensorInterface_t* sensorInterface, uint8_t quietTime); 860 int8_t ITDS_getTapQuietTime(WE_sensorInterface_t* sensorInterface, uint8_t *quietTime); 861 int8_t ITDS_setTapShockTime(WE_sensorInterface_t* sensorInterface, uint8_t shockTime); 862 int8_t ITDS_getTapShockTime(WE_sensorInterface_t* sensorInterface, uint8_t *shockTime); 863 864 /* WAKE_UP_TH */ 865 int8_t ITDS_enableDoubleTapEvent(WE_sensorInterface_t* sensorInterface, ITDS_state_t doubleTap); 866 int8_t ITDS_isDoubleTapEventEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *doubleTap); 867 int8_t ITDS_enableInactivityDetection(WE_sensorInterface_t* sensorInterface, ITDS_state_t inactivity); 868 int8_t ITDS_isInactivityDetectionEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *inactivity); 869 int8_t ITDS_setWakeUpThreshold(WE_sensorInterface_t* sensorInterface, uint8_t wakeUpThresh); 870 int8_t ITDS_getWakeUpThreshold(WE_sensorInterface_t* sensorInterface, uint8_t *wakeUpThresh); 871 872 /* WAKE_UP_DUR */ 873 int8_t ITDS_setFreeFallDurationMSB(WE_sensorInterface_t* sensorInterface, uint8_t freeFallDurationMsb); 874 int8_t ITDS_getFreeFallDurationMSB(WE_sensorInterface_t* sensorInterface, uint8_t *freeFallDurationMsb); 875 int8_t ITDS_setWakeUpDuration(WE_sensorInterface_t* sensorInterface, uint8_t duration); 876 int8_t ITDS_getWakeUpDuration(WE_sensorInterface_t* sensorInterface, uint8_t *duration); 877 int8_t ITDS_enableStationaryDetection(WE_sensorInterface_t* sensorInterface, ITDS_state_t stationary); 878 int8_t ITDS_isStationaryDetectionEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *stationary); 879 int8_t ITDS_setSleepDuration(WE_sensorInterface_t* sensorInterface, uint8_t duration); 880 int8_t ITDS_getSleepDuration(WE_sensorInterface_t* sensorInterface, uint8_t *duration); 881 882 /* FREE_FALL */ 883 int8_t ITDS_setFreeFallDuration(WE_sensorInterface_t* sensorInterface, uint8_t freeFallDuration); 884 int8_t ITDS_getFreeFallDuration(WE_sensorInterface_t* sensorInterface, uint8_t *freeFallDuration); 885 int8_t ITDS_setFreeFallDurationLSB(WE_sensorInterface_t* sensorInterface, uint8_t freeFallDurationLsb); 886 int8_t ITDS_getFreeFallDurationLSB(WE_sensorInterface_t* sensorInterface, uint8_t *freeFallDurationLsb); 887 int8_t ITDS_setFreeFallThreshold(WE_sensorInterface_t* sensorInterface, ITDS_FreeFallThreshold_t threshold); 888 int8_t ITDS_getFreeFallThreshold(WE_sensorInterface_t* sensorInterface, ITDS_FreeFallThreshold_t *threshold); 889 890 /* STATUS_DETECT */ 891 /* Note: Most of the status bits are already covered by the STATUS_REG register. */ 892 int8_t ITDS_getStatusDetectRegister(WE_sensorInterface_t* sensorInterface, ITDS_statusDetect_t *statusDetect); 893 int8_t ITDS_isTemperatureDataReady(WE_sensorInterface_t* sensorInterface, ITDS_state_t *dataReady); 894 895 /* WAKE_UP_EVENT */ 896 int8_t ITDS_getWakeUpEventRegister(WE_sensorInterface_t* sensorInterface, ITDS_wakeUpEvent_t *status); 897 int8_t ITDS_isWakeUpXEvent(WE_sensorInterface_t* sensorInterface, ITDS_state_t *wakeUpX); 898 int8_t ITDS_isWakeUpYEvent(WE_sensorInterface_t* sensorInterface, ITDS_state_t *wakeUpY); 899 int8_t ITDS_isWakeUpZEvent(WE_sensorInterface_t* sensorInterface, ITDS_state_t *wakeUpZ); 900 int8_t ITDS_isWakeUpEvent(WE_sensorInterface_t* sensorInterface, ITDS_state_t *wakeUpState); 901 int8_t ITDS_isFreeFallEvent(WE_sensorInterface_t* sensorInterface, ITDS_state_t *freeFall); 902 903 /* TAP_EVENT */ 904 int8_t ITDS_getTapEventRegister(WE_sensorInterface_t* sensorInterface, ITDS_tapEvent_t *status); 905 int8_t ITDS_isTapEvent(WE_sensorInterface_t* sensorInterface, ITDS_state_t *tapEventState); 906 int8_t ITDS_getTapSign(WE_sensorInterface_t* sensorInterface, ITDS_tapSign_t *tapSign); 907 int8_t ITDS_isTapEventXAxis(WE_sensorInterface_t* sensorInterface, ITDS_state_t *tapXAxis); 908 int8_t ITDS_isTapEventYAxis(WE_sensorInterface_t* sensorInterface, ITDS_state_t *tapYAxis); 909 int8_t ITDS_isTapEventZAxis(WE_sensorInterface_t* sensorInterface, ITDS_state_t *tapZAxis); 910 911 912 /* 6D_EVENT */ 913 int8_t ITDS_get6dEventRegister(WE_sensorInterface_t* sensorInterface, ITDS_6dEvent_t *status); 914 int8_t ITDS_has6dOrientationChanged(WE_sensorInterface_t* sensorInterface, ITDS_state_t *orientationChanged); 915 int8_t ITDS_isXLOverThreshold(WE_sensorInterface_t* sensorInterface, ITDS_state_t *xlOverThreshold); 916 int8_t ITDS_isXHOverThreshold(WE_sensorInterface_t* sensorInterface, ITDS_state_t *xhOverThreshold); 917 int8_t ITDS_isYLOverThreshold(WE_sensorInterface_t* sensorInterface, ITDS_state_t *ylOverThreshold); 918 int8_t ITDS_isYHOverThreshold(WE_sensorInterface_t* sensorInterface, ITDS_state_t *yhOverThreshold); 919 int8_t ITDS_isZLOverThreshold(WE_sensorInterface_t* sensorInterface, ITDS_state_t *zlOverThreshold); 920 int8_t ITDS_isZHOverThreshold(WE_sensorInterface_t* sensorInterface, ITDS_state_t *zhOverThreshold); 921 922 /* ALL_INT_EVENT */ 923 int8_t ITDS_getAllInterruptEvents(WE_sensorInterface_t* sensorInterface, ITDS_allInterruptEvents_t *events); 924 int8_t ITDS_isSleepChangeEvent(WE_sensorInterface_t* sensorInterface, ITDS_state_t *sleep); 925 926 /* X_Y_Z_OFS_USR */ 927 int8_t ITDS_setOffsetValueX(WE_sensorInterface_t* sensorInterface, int8_t offsetValueXAxis); 928 int8_t ITDS_getOffsetValueX(WE_sensorInterface_t* sensorInterface, int8_t *offsetValueXAxis); 929 int8_t ITDS_setOffsetValueY(WE_sensorInterface_t* sensorInterface, int8_t offsetValueYAxis); 930 int8_t ITDS_getOffsetValueY(WE_sensorInterface_t* sensorInterface, int8_t *offsetValueYAxis); 931 int8_t ITDS_setOffsetValueZ(WE_sensorInterface_t* sensorInterface, int8_t offsetValueZAxis); 932 int8_t ITDS_getOffsetValueZ(WE_sensorInterface_t* sensorInterface, int8_t *offsetValueZAxis); 933 934 /* CTRL_7 */ 935 int8_t ITDS_setDataReadyPulsed(WE_sensorInterface_t* sensorInterface, ITDS_drdyPulse_t drdyPulsed); 936 int8_t ITDS_isDataReadyPulsed(WE_sensorInterface_t* sensorInterface, ITDS_drdyPulse_t *drdyPulsed); 937 int8_t ITDS_setInt1OnInt0(WE_sensorInterface_t* sensorInterface, ITDS_state_t int1OnInt0); 938 int8_t ITDS_getInt1OnInt0(WE_sensorInterface_t* sensorInterface, ITDS_state_t *int1OnInt0); 939 int8_t ITDS_enableInterrupts(WE_sensorInterface_t* sensorInterface, ITDS_state_t interrupts); 940 int8_t ITDS_areInterruptsEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *interrupts); 941 int8_t ITDS_enableApplyOffset(WE_sensorInterface_t* sensorInterface, ITDS_state_t applyOffset); 942 int8_t ITDS_isApplyOffsetEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *applyOffset); 943 int8_t ITDS_enableApplyWakeUpOffset(WE_sensorInterface_t* sensorInterface, ITDS_state_t applyOffset); 944 int8_t ITDS_isApplyWakeUpOffsetEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *applyOffset); 945 946 int8_t ITDS_setOffsetWeight(WE_sensorInterface_t* sensorInterface, ITDS_state_t offsetWeight); 947 int8_t ITDS_getOffsetWeight(WE_sensorInterface_t* sensorInterface, ITDS_state_t *offsetWeight); 948 949 int8_t ITDS_enableHighPassRefMode(WE_sensorInterface_t* sensorInterface, ITDS_state_t refMode); 950 int8_t ITDS_isHighPassRefModeEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *refMode); 951 952 int8_t ITDS_enableLowPassOn6D(WE_sensorInterface_t* sensorInterface, ITDS_state_t lowPassOn6D); 953 int8_t ITDS_isLowPassOn6DEnabled(WE_sensorInterface_t* sensorInterface, ITDS_state_t *lowPassOn6D); 954 955 #ifdef __cplusplus 956 } 957 #endif 958 959 #endif /* _WSEN_ITDS_H */ 960
