1 /* 2 * Copyright (c) 2020 ITE Corporation. All Rights Reserved. 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_ITE_INTC_H_ 7 #define ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_ITE_INTC_H_ 8 9 #define IRQ_TYPE_NONE 0 10 #define IRQ_TYPE_EDGE_RISING 1 11 #define IRQ_TYPE_EDGE_FALLING 2 12 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) 13 #define IRQ_TYPE_LEVEL_HIGH 4 14 #define IRQ_TYPE_LEVEL_LOW 8 15 16 /* IRQ numbers of WUC */ 17 /* Group 0 of INTC */ 18 #define IT8XXX2_IRQ_WU20 1 19 #define IT8XXX2_IRQ_KBC_OBE 2 20 #define IT8XXX2_IRQ_SMB_D 4 21 #define IT8XXX2_IRQ_WKINTD 5 22 #define IT8XXX2_IRQ_WU23 6 23 /* Group 1 */ 24 #define IT8XXX2_IRQ_SMB_A 9 25 #define IT8XXX2_IRQ_SMB_B 10 26 #define IT8XXX2_IRQ_WU26 12 27 #define IT8XXX2_IRQ_WKINTC 13 28 #define IT8XXX2_IRQ_WU25 14 29 /* Group 2 */ 30 #define IT8XXX2_IRQ_SMB_C 16 31 #define IT8XXX2_IRQ_WU24 17 32 #define IT8XXX2_IRQ_WU22 21 33 #define IT8XXX2_IRQ_USB 23 34 /* Group 3 */ 35 #define IT8XXX2_IRQ_KBC_IBF 24 36 #define IT8XXX2_IRQ_PMC1_IBF 25 37 #define IT8XXX2_IRQ_PMC2_IBF 27 38 #define IT8XXX2_IRQ_TIMER1 30 39 #define IT8XXX2_IRQ_WU21 31 40 /* Group 5 */ 41 #define IT8XXX2_IRQ_WU50 40 42 #define IT8XXX2_IRQ_WU51 41 43 #define IT8XXX2_IRQ_WU52 42 44 #define IT8XXX2_IRQ_WU53 43 45 #define IT8XXX2_IRQ_WU54 44 46 #define IT8XXX2_IRQ_WU55 45 47 #define IT8XXX2_IRQ_WU56 46 48 #define IT8XXX2_IRQ_WU57 47 49 /* Group 6 */ 50 #define IT8XXX2_IRQ_WU60 48 51 #define IT8XXX2_IRQ_WU61 49 52 #define IT8XXX2_IRQ_WU62 50 53 #define IT8XXX2_IRQ_WU63 51 54 #define IT8XXX2_IRQ_WU64 52 55 #define IT8XXX2_IRQ_WU65 53 56 #define IT8XXX2_IRQ_WU66 54 57 #define IT8XXX2_IRQ_WU67 55 58 /* Group 7 */ 59 #define IT8XXX2_IRQ_TIMER2 58 60 /* Group 9 */ 61 #define IT8XXX2_IRQ_WU70 72 62 #define IT8XXX2_IRQ_WU71 73 63 #define IT8XXX2_IRQ_WU72 74 64 #define IT8XXX2_IRQ_WU73 75 65 #define IT8XXX2_IRQ_WU74 76 66 #define IT8XXX2_IRQ_WU75 77 67 #define IT8XXX2_IRQ_WU76 78 68 #define IT8XXX2_IRQ_WU77 79 69 /* Group 10 */ 70 #define IT8XXX2_IRQ_TIMER8 80 71 #define IT8XXX2_IRQ_WU88 85 72 #define IT8XXX2_IRQ_WU89 86 73 #define IT8XXX2_IRQ_WU90 87 74 /* Group 11 */ 75 #define IT8XXX2_IRQ_WU80 88 76 #define IT8XXX2_IRQ_WU81 89 77 #define IT8XXX2_IRQ_WU82 90 78 #define IT8XXX2_IRQ_WU83 91 79 #define IT8XXX2_IRQ_WU84 92 80 #define IT8XXX2_IRQ_WU85 93 81 #define IT8XXX2_IRQ_WU86 94 82 #define IT8XXX2_IRQ_WU87 95 83 /* Group 12 */ 84 #define IT8XXX2_IRQ_WU91 96 85 #define IT8XXX2_IRQ_WU92 97 86 #define IT8XXX2_IRQ_WU93 98 87 #define IT8XXX2_IRQ_WU94 99 88 #define IT8XXX2_IRQ_WU95 100 89 #define IT8XXX2_IRQ_WU96 101 90 #define IT8XXX2_IRQ_WU97 102 91 #define IT8XXX2_IRQ_WU98 103 92 /* Group 13 */ 93 #define IT8XXX2_IRQ_WU99 104 94 #define IT8XXX2_IRQ_WU100 105 95 #define IT8XXX2_IRQ_WU101 106 96 #define IT8XXX2_IRQ_WU102 107 97 #define IT8XXX2_IRQ_WU103 108 98 #define IT8XXX2_IRQ_WU104 109 99 #define IT8XXX2_IRQ_WU105 110 100 #define IT8XXX2_IRQ_WU106 111 101 /* Group 14 */ 102 #define IT8XXX2_IRQ_WU107 112 103 #define IT8XXX2_IRQ_WU108 113 104 #define IT8XXX2_IRQ_WU109 114 105 #define IT8XXX2_IRQ_WU110 115 106 #define IT8XXX2_IRQ_WU111 116 107 #define IT8XXX2_IRQ_WU112 117 108 #define IT8XXX2_IRQ_WU113 118 109 #define IT8XXX2_IRQ_WU114 119 110 /* Group 15 */ 111 #define IT8XXX2_IRQ_WU115 120 112 #define IT8XXX2_IRQ_WU116 121 113 #define IT8XXX2_IRQ_WU117 122 114 #define IT8XXX2_IRQ_WU118 123 115 #define IT8XXX2_IRQ_WU119 124 116 #define IT8XXX2_IRQ_WU120 125 117 #define IT8XXX2_IRQ_WU121 126 118 #define IT8XXX2_IRQ_WU122 127 119 /* Group 16 */ 120 #define IT8XXX2_IRQ_WU128 128 121 #define IT8XXX2_IRQ_WU129 129 122 #define IT8XXX2_IRQ_WU130 130 123 #define IT8XXX2_IRQ_WU131 131 124 #define IT8XXX2_IRQ_WU132 132 125 #define IT8XXX2_IRQ_WU133 133 126 #define IT8XXX2_IRQ_WU134 134 127 #define IT8XXX2_IRQ_WU135 135 128 /* Group 17 */ 129 #define IT8XXX2_IRQ_WU136 136 130 #define IT8XXX2_IRQ_WU137 137 131 #define IT8XXX2_IRQ_WU138 138 132 #define IT8XXX2_IRQ_WU139 139 133 #define IT8XXX2_IRQ_WU140 140 134 #define IT8XXX2_IRQ_WU141 141 135 #define IT8XXX2_IRQ_WU142 142 136 #define IT8XXX2_IRQ_WU143 143 137 /* Group 18 */ 138 #define IT8XXX2_IRQ_WU123 144 139 #define IT8XXX2_IRQ_WU124 145 140 #define IT8XXX2_IRQ_WU125 146 141 #define IT8XXX2_IRQ_WU126 147 142 #define IT8XXX2_IRQ_V_CMP 151 143 /* Group 19 */ 144 #define IT8XXX2_IRQ_SMB_E 152 145 #define IT8XXX2_IRQ_SMB_F 153 146 #define IT8XXX2_IRQ_TIMER3 155 147 #define IT8XXX2_IRQ_TIMER4 156 148 #define IT8XXX2_IRQ_TIMER5 157 149 #define IT8XXX2_IRQ_TIMER6 158 150 #define IT8XXX2_IRQ_TIMER7 159 151 /* Group 20 */ 152 #define IT8XXX2_IRQ_ESPI 162 153 #define IT8XXX2_IRQ_ESPI_VW 163 154 #define IT8XXX2_IRQ_PCH_P80 164 155 #define IT8XXX2_IRQ_USBPD0 165 156 #define IT8XXX2_IRQ_USBPD1 166 157 /* Group 21 */ 158 #define IT8XXX2_IRQ_USBPD2 174 159 /* Group 22 */ 160 #define IT8XXX2_IRQ_WU40 176 161 #define IT8XXX2_IRQ_WU45 177 162 #define IT8XXX2_IRQ_WU46 178 163 #define IT8XXX2_IRQ_WU144 179 164 #define IT8XXX2_IRQ_WU145 180 165 #define IT8XXX2_IRQ_WU146 181 166 #define IT8XXX2_IRQ_WU147 182 167 #define IT8XXX2_IRQ_WU148 183 168 /* Group 23 */ 169 #define IT8XXX2_IRQ_WU149 184 170 #define IT8XXX2_IRQ_WU150 185 171 172 #define IT8XXX2_IRQ_COUNT (CONFIG_NUM_IRQS + 1) 173 174 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_ITE_INTC_H_ */ 175
