1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef __STM32L4xx_HAL_UART_EX_H 38 #define __STM32L4xx_HAL_UART_EX_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 /* Includes ------------------------------------------------------------------*/ 45 #include "stm32l4xx_hal_def.h" 46 47 /** @addtogroup STM32L4xx_HAL_Driver 48 * @{ 49 */ 50 51 /** @addtogroup UARTEx 52 * @{ 53 */ 54 55 /* Exported types ------------------------------------------------------------*/ 56 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 57 * @{ 58 */ 59 60 /** 61 * @brief UART wake up from stop mode parameters 62 */ 63 typedef struct 64 { 65 uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF). 66 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 67 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 68 be filled up. */ 69 70 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 71 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 72 73 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 74 } UART_WakeUpTypeDef; 75 76 /** 77 * @} 78 */ 79 80 /* Exported constants --------------------------------------------------------*/ 81 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 82 * @{ 83 */ 84 85 /** @defgroup UARTEx_Word_Length UARTEx Word Length 86 * @{ 87 */ 88 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 89 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 90 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 91 /** 92 * @} 93 */ 94 95 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 96 * @{ 97 */ 98 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 99 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 100 /** 101 * @} 102 */ 103 104 #if defined(USART_CR1_FIFOEN) 105 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 106 * @brief UART FIFO mode 107 * @{ 108 */ 109 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 110 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 111 /** 112 * @} 113 */ 114 115 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 116 * @brief UART TXFIFO threshold level 117 * @{ 118 */ 119 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ 120 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ 121 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ 122 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ 123 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ 124 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ 125 /** 126 * @} 127 */ 128 129 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 130 * @brief UART RXFIFO threshold level 131 * @{ 132 */ 133 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ 134 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ 135 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ 136 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ 137 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ 138 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ 139 /** 140 * @} 141 */ 142 #endif 143 144 /** 145 * @} 146 */ 147 148 /* Exported macros -----------------------------------------------------------*/ 149 /* Exported functions --------------------------------------------------------*/ 150 /** @addtogroup UARTEx_Exported_Functions 151 * @{ 152 */ 153 154 /** @addtogroup UARTEx_Exported_Functions_Group1 155 * @{ 156 */ 157 158 /* Initialization and de-initialization functions ****************************/ 159 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime); 160 161 /** 162 * @} 163 */ 164 165 /** @addtogroup UARTEx_Exported_Functions_Group2 166 * @{ 167 */ 168 169 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 170 171 #if defined(USART_CR1_FIFOEN) 172 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 173 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 174 #endif 175 176 /** 177 * @} 178 */ 179 180 /** @addtogroup UARTEx_Exported_Functions_Group3 181 * @{ 182 */ 183 184 /* Peripheral Control functions **********************************************/ 185 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 186 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 187 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 188 #if defined(USART_CR3_UCESM) 189 HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart); 190 HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart); 191 #endif /* USART_CR3_UCESM */ 192 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 193 #if defined(USART_CR1_FIFOEN) 194 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 195 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 196 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 197 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 198 #endif 199 200 /** 201 * @} 202 */ 203 204 /** 205 * @} 206 */ 207 208 /* Private macros ------------------------------------------------------------*/ 209 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 210 * @{ 211 */ 212 213 /** @brief Report the UART clock source. 214 * @param __HANDLE__ specifies the UART Handle. 215 * @param __CLOCKSOURCE__ output variable. 216 * @retval UART clocking source, written in __CLOCKSOURCE__. 217 */ 218 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) \ 219 || defined (STM32L496xx) || defined (STM32L4A6xx) \ 220 || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) 221 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 222 do { \ 223 if((__HANDLE__)->Instance == USART1) \ 224 { \ 225 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 226 { \ 227 case RCC_USART1CLKSOURCE_PCLK2: \ 228 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 229 break; \ 230 case RCC_USART1CLKSOURCE_HSI: \ 231 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 232 break; \ 233 case RCC_USART1CLKSOURCE_SYSCLK: \ 234 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 235 break; \ 236 case RCC_USART1CLKSOURCE_LSE: \ 237 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 238 break; \ 239 default: \ 240 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 241 break; \ 242 } \ 243 } \ 244 else if((__HANDLE__)->Instance == USART2) \ 245 { \ 246 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 247 { \ 248 case RCC_USART2CLKSOURCE_PCLK1: \ 249 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 250 break; \ 251 case RCC_USART2CLKSOURCE_HSI: \ 252 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 253 break; \ 254 case RCC_USART2CLKSOURCE_SYSCLK: \ 255 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 256 break; \ 257 case RCC_USART2CLKSOURCE_LSE: \ 258 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 259 break; \ 260 default: \ 261 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 262 break; \ 263 } \ 264 } \ 265 else if((__HANDLE__)->Instance == USART3) \ 266 { \ 267 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 268 { \ 269 case RCC_USART3CLKSOURCE_PCLK1: \ 270 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 271 break; \ 272 case RCC_USART3CLKSOURCE_HSI: \ 273 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 274 break; \ 275 case RCC_USART3CLKSOURCE_SYSCLK: \ 276 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 277 break; \ 278 case RCC_USART3CLKSOURCE_LSE: \ 279 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 280 break; \ 281 default: \ 282 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 283 break; \ 284 } \ 285 } \ 286 else if((__HANDLE__)->Instance == UART4) \ 287 { \ 288 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 289 { \ 290 case RCC_UART4CLKSOURCE_PCLK1: \ 291 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 292 break; \ 293 case RCC_UART4CLKSOURCE_HSI: \ 294 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 295 break; \ 296 case RCC_UART4CLKSOURCE_SYSCLK: \ 297 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 298 break; \ 299 case RCC_UART4CLKSOURCE_LSE: \ 300 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 301 break; \ 302 default: \ 303 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 304 break; \ 305 } \ 306 } \ 307 else if((__HANDLE__)->Instance == UART5) \ 308 { \ 309 switch(__HAL_RCC_GET_UART5_SOURCE()) \ 310 { \ 311 case RCC_UART5CLKSOURCE_PCLK1: \ 312 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 313 break; \ 314 case RCC_UART5CLKSOURCE_HSI: \ 315 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 316 break; \ 317 case RCC_UART5CLKSOURCE_SYSCLK: \ 318 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 319 break; \ 320 case RCC_UART5CLKSOURCE_LSE: \ 321 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 322 break; \ 323 default: \ 324 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 325 break; \ 326 } \ 327 } \ 328 else if((__HANDLE__)->Instance == LPUART1) \ 329 { \ 330 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 331 { \ 332 case RCC_LPUART1CLKSOURCE_PCLK1: \ 333 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 334 break; \ 335 case RCC_LPUART1CLKSOURCE_HSI: \ 336 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 337 break; \ 338 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 339 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 340 break; \ 341 case RCC_LPUART1CLKSOURCE_LSE: \ 342 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 343 break; \ 344 default: \ 345 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 346 break; \ 347 } \ 348 } \ 349 } while(0U) 350 #elif defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L431xx) \ 351 || defined (STM32L433xx) || defined (STM32L443xx) 352 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 353 do { \ 354 if((__HANDLE__)->Instance == USART1) \ 355 { \ 356 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 357 { \ 358 case RCC_USART1CLKSOURCE_PCLK2: \ 359 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 360 break; \ 361 case RCC_USART1CLKSOURCE_HSI: \ 362 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 363 break; \ 364 case RCC_USART1CLKSOURCE_SYSCLK: \ 365 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 366 break; \ 367 case RCC_USART1CLKSOURCE_LSE: \ 368 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 369 break; \ 370 default: \ 371 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 372 break; \ 373 } \ 374 } \ 375 else if((__HANDLE__)->Instance == USART2) \ 376 { \ 377 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 378 { \ 379 case RCC_USART2CLKSOURCE_PCLK1: \ 380 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 381 break; \ 382 case RCC_USART2CLKSOURCE_HSI: \ 383 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 384 break; \ 385 case RCC_USART2CLKSOURCE_SYSCLK: \ 386 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 387 break; \ 388 case RCC_USART2CLKSOURCE_LSE: \ 389 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 390 break; \ 391 default: \ 392 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 393 break; \ 394 } \ 395 } \ 396 else if((__HANDLE__)->Instance == USART3) \ 397 { \ 398 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 399 { \ 400 case RCC_USART3CLKSOURCE_PCLK1: \ 401 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 402 break; \ 403 case RCC_USART3CLKSOURCE_HSI: \ 404 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 405 break; \ 406 case RCC_USART3CLKSOURCE_SYSCLK: \ 407 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 408 break; \ 409 case RCC_USART3CLKSOURCE_LSE: \ 410 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 411 break; \ 412 default: \ 413 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 414 break; \ 415 } \ 416 } \ 417 else if((__HANDLE__)->Instance == LPUART1) \ 418 { \ 419 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 420 { \ 421 case RCC_LPUART1CLKSOURCE_PCLK1: \ 422 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 423 break; \ 424 case RCC_LPUART1CLKSOURCE_HSI: \ 425 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 426 break; \ 427 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 428 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 429 break; \ 430 case RCC_LPUART1CLKSOURCE_LSE: \ 431 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 432 break; \ 433 default: \ 434 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 435 break; \ 436 } \ 437 } \ 438 } while(0U) 439 #elif defined (STM32L432xx) || defined (STM32L442xx) 440 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 441 do { \ 442 if((__HANDLE__)->Instance == USART1) \ 443 { \ 444 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 445 { \ 446 case RCC_USART1CLKSOURCE_PCLK2: \ 447 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 448 break; \ 449 case RCC_USART1CLKSOURCE_HSI: \ 450 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 451 break; \ 452 case RCC_USART1CLKSOURCE_SYSCLK: \ 453 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 454 break; \ 455 case RCC_USART1CLKSOURCE_LSE: \ 456 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 457 break; \ 458 default: \ 459 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 460 break; \ 461 } \ 462 } \ 463 else if((__HANDLE__)->Instance == USART2) \ 464 { \ 465 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 466 { \ 467 case RCC_USART2CLKSOURCE_PCLK1: \ 468 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 469 break; \ 470 case RCC_USART2CLKSOURCE_HSI: \ 471 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 472 break; \ 473 case RCC_USART2CLKSOURCE_SYSCLK: \ 474 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 475 break; \ 476 case RCC_USART2CLKSOURCE_LSE: \ 477 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 478 break; \ 479 default: \ 480 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 481 break; \ 482 } \ 483 } \ 484 else if((__HANDLE__)->Instance == LPUART1) \ 485 { \ 486 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 487 { \ 488 case RCC_LPUART1CLKSOURCE_PCLK1: \ 489 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 490 break; \ 491 case RCC_LPUART1CLKSOURCE_HSI: \ 492 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 493 break; \ 494 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 495 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 496 break; \ 497 case RCC_LPUART1CLKSOURCE_LSE: \ 498 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 499 break; \ 500 default: \ 501 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 502 break; \ 503 } \ 504 } \ 505 } while(0U) 506 #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 507 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 508 do { \ 509 if((__HANDLE__)->Instance == USART1) \ 510 { \ 511 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 512 { \ 513 case RCC_USART1CLKSOURCE_PCLK2: \ 514 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 515 break; \ 516 case RCC_USART1CLKSOURCE_HSI: \ 517 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 518 break; \ 519 case RCC_USART1CLKSOURCE_SYSCLK: \ 520 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 521 break; \ 522 case RCC_USART1CLKSOURCE_LSE: \ 523 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 524 break; \ 525 default: \ 526 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 527 break; \ 528 } \ 529 } \ 530 else if((__HANDLE__)->Instance == USART2) \ 531 { \ 532 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 533 { \ 534 case RCC_USART2CLKSOURCE_PCLK1: \ 535 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 536 break; \ 537 case RCC_USART2CLKSOURCE_HSI: \ 538 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 539 break; \ 540 case RCC_USART2CLKSOURCE_SYSCLK: \ 541 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 542 break; \ 543 case RCC_USART2CLKSOURCE_LSE: \ 544 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 545 break; \ 546 default: \ 547 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 548 break; \ 549 } \ 550 } \ 551 else if((__HANDLE__)->Instance == USART3) \ 552 { \ 553 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 554 { \ 555 case RCC_USART3CLKSOURCE_PCLK1: \ 556 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 557 break; \ 558 case RCC_USART3CLKSOURCE_HSI: \ 559 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 560 break; \ 561 case RCC_USART3CLKSOURCE_SYSCLK: \ 562 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 563 break; \ 564 case RCC_USART3CLKSOURCE_LSE: \ 565 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 566 break; \ 567 default: \ 568 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 569 break; \ 570 } \ 571 } \ 572 else if((__HANDLE__)->Instance == UART4) \ 573 { \ 574 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 575 { \ 576 case RCC_UART4CLKSOURCE_PCLK1: \ 577 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 578 break; \ 579 case RCC_UART4CLKSOURCE_HSI: \ 580 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 581 break; \ 582 case RCC_UART4CLKSOURCE_SYSCLK: \ 583 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 584 break; \ 585 case RCC_UART4CLKSOURCE_LSE: \ 586 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 587 break; \ 588 default: \ 589 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 590 break; \ 591 } \ 592 } \ 593 else if((__HANDLE__)->Instance == LPUART1) \ 594 { \ 595 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 596 { \ 597 case RCC_LPUART1CLKSOURCE_PCLK1: \ 598 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 599 break; \ 600 case RCC_LPUART1CLKSOURCE_HSI: \ 601 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 602 break; \ 603 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 604 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 605 break; \ 606 case RCC_LPUART1CLKSOURCE_LSE: \ 607 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 608 break; \ 609 default: \ 610 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 611 break; \ 612 } \ 613 } \ 614 } while(0U) 615 #endif 616 617 /** @brief Report the UART mask to apply to retrieve the received data 618 * according to the word length and to the parity bits activation. 619 * @note If PCE = 1, the parity bit is not included in the data extracted 620 * by the reception API(). 621 * This masking operation is not carried out in the case of 622 * DMA transfers. 623 * @param __HANDLE__ specifies the UART Handle. 624 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 625 */ 626 #define UART_MASK_COMPUTATION(__HANDLE__) \ 627 do { \ 628 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 629 { \ 630 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 631 { \ 632 (__HANDLE__)->Mask = 0x01FFU ; \ 633 } \ 634 else \ 635 { \ 636 (__HANDLE__)->Mask = 0x00FFU ; \ 637 } \ 638 } \ 639 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 640 { \ 641 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 642 { \ 643 (__HANDLE__)->Mask = 0x00FFU ; \ 644 } \ 645 else \ 646 { \ 647 (__HANDLE__)->Mask = 0x007FU ; \ 648 } \ 649 } \ 650 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 651 { \ 652 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 653 { \ 654 (__HANDLE__)->Mask = 0x007FU ; \ 655 } \ 656 else \ 657 { \ 658 (__HANDLE__)->Mask = 0x003FU ; \ 659 } \ 660 } \ 661 } while(0U) 662 663 664 /** 665 * @brief Ensure that UART frame length is valid. 666 * @param __LENGTH__ UART frame length. 667 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 668 */ 669 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 670 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 671 ((__LENGTH__) == UART_WORDLENGTH_9B)) 672 673 /** 674 * @brief Ensure that UART wake-up address length is valid. 675 * @param __ADDRESS__ UART wake-up address length. 676 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 677 */ 678 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 679 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 680 681 #if defined(USART_CR1_FIFOEN) 682 /** 683 * @brief Ensure that UART TXFIFO threshold level is valid. 684 * @param __THRESHOLD__ UART TXFIFO threshold level. 685 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 686 */ 687 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 688 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 689 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 690 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 691 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 692 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 693 694 /** 695 * @brief Ensure that UART RXFIFO threshold level is valid. 696 * @param __THRESHOLD__ UART RXFIFO threshold level. 697 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 698 */ 699 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 700 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 701 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 702 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 703 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 704 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 705 #endif 706 707 /** 708 * @} 709 */ 710 711 /* Private functions ---------------------------------------------------------*/ 712 713 /** 714 * @} 715 */ 716 717 /** 718 * @} 719 */ 720 721 #ifdef __cplusplus 722 } 723 #endif 724 725 #endif /* __STM32L4xx_HAL_UART_EX_H */ 726 727 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 728
