1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_tim_ex.h 4 * @author MCD Application Team 5 * @brief Header file of TIM HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_TIM_EX_H 21 #define STM32H5xx_HAL_TIM_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup TIMEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief TIM Hall sensor Configuration Structure definition 45 */ 46 47 typedef struct 48 { 49 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 50 This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 51 52 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 53 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 54 55 uint32_t IC1Filter; /*!< Specifies the input capture filter. 56 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 57 58 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 59 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 60 } TIM_HallSensor_InitTypeDef; 61 62 /** 63 * @brief TIM Break/Break2 input configuration 64 */ 65 typedef struct 66 { 67 uint32_t Source; /*!< Specifies the source of the timer break input. 68 This parameter can be a value of @ref TIMEx_Break_Input_Source */ 69 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. 70 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ 71 uint32_t Polarity; /*!< Specifies the break input source polarity. 72 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity */ 73 } TIMEx_BreakInputConfigTypeDef; 74 75 /** 76 * @brief TIM Encoder index configuration 77 */ 78 typedef struct 79 { 80 uint32_t Polarity; /*!< TIM Encoder index polarity.This parameter can be a value of @ref TIMEx_Encoder_Index_Polarity */ 81 82 uint32_t Prescaler; /*!< TIM Encoder index prescaler.This parameter can be a value of @ref TIMEx_Encoder_Index_Prescaler */ 83 84 uint32_t Filter; /*!< TIM Encoder index filter.This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 85 86 uint32_t Blanking; /*!< Specifies whether or not the encoder index event is conditioned by TI3 or TI4 input.This parameter can be a value of @ref TIMEx_Encoder_Index_Blanking */ 87 88 FunctionalState FirstIndexEnable; /*!< Specifies whether or not the encoder first index is enabled.This parameter value can be ENABLE or DISABLE. */ 89 90 uint32_t Position; /*!< Specifies in which AB input configuration the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Position */ 91 92 uint32_t Direction; /*!< Specifies in which counter direction the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Direction */ 93 94 } TIMEx_EncoderIndexConfigTypeDef; 95 96 /** 97 * @} 98 */ 99 /* End of exported types -----------------------------------------------------*/ 100 101 /* Exported constants --------------------------------------------------------*/ 102 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 103 * @{ 104 */ 105 106 /** @defgroup TIMEx_Remap TIM Extended Remapping 107 * @{ 108 */ 109 #define TIM_TIM1_ETR_GPIO 0x00000000UL /*!< TIM1_ETR is not connected to I/O */ 110 #if defined(COMP1) 111 #define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM1_ETR is connected to COMP1 output */ 112 #endif /* COMP1 */ 113 #if defined(COMP1) 114 #define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM1_ETR is connected to COMP2 output */ 115 #endif /* COMP1 */ 116 #define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to ADC1 AWD1 */ 117 #define TIM_TIM1_ETR_ADC1_AWD2 TIM1_AF1_ETRSEL_2 /*!< TIM1_ETR is connected to ADC1 AWD2 */ 118 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to ADC1 AWD3 */ 119 120 #define TIM_TIM2_ETR_GPIO 0x00000000UL /*!< TIM2_ETR is not connected to I/O */ 121 #if defined(COMP1) 122 #define TIM_TIM2_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM2_ETR is connected to COMP1 output */ 123 #endif /* COMP1 */ 124 #if defined(COMP2) 125 #define TIM_TIM2_ETR_COMP2 TIM1_AF1_ETRSEL_0 /*!< TIM2_ETR is connected to COMP2 output */ 126 #endif /* COMP2 */ 127 #define TIM_TIM2_ETR_LSE (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to LSE */ 128 #if defined(SAI1) 129 #define TIM_TIM2_ETR_SAI1_FSA TIM1_AF1_ETRSEL_2 /*!< TIM2_ETR is connected to SAI1 FS_A */ 130 #define TIM_TIM2_ETR_SAI1_FSB (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to SAI1 */ 131 #endif /* SAI1 */ 132 #define TIM_TIM2_ETR_TIM3_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to TIM3 ETR */ 133 #if defined(TIM4) 134 #define TIM_TIM2_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /*!< TIM2_ETR is connected to TIM4 ETR */ 135 #endif /* TIM4 */ 136 #if defined(TIM5) 137 #define TIM_TIM2_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to TIM5 ETR */ 138 #endif /* TIM5 */ 139 #if defined(USB_DRD_FS) 140 #define TIM_TIM2_ETR_USB_SOF (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to USB SOF */ 141 #elif defined(USB_OTG_HS) 142 #define TIM_TIM2_ETR_USBHS_SOF (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /*!< TIM2_ETR is connected to USBHS OTG SOF */ 143 #define TIM_TIM2_ETR_USBFS_SOF (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to USBFS OTG SOF */ 144 #endif /* USB_DRD_FS */ 145 #if defined(ETH_NS) 146 #define TIM_TIM2_ETR_ETH_PPS (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< TIM2_ETR is connected to ETH PPS */ 147 #endif /* ETH_NS */ 148 #if defined(PLAY1) 149 #define TIM_TIM2_ETR_PLAY1_OUT0 TIM1_AF1_ETRSEL_Msk /*!< TIM2_ETR is connected to PLAY1 output 0 */ 150 #endif /* PLAY1 */ 151 152 #define TIM_TIM3_ETR_GPIO 0x00000000UL /*!< TIM3_ETR is not connected to I/O */ 153 #if defined(COMP1) 154 #define TIM_TIM3_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM3_ETR is connected to COMP1 output */ 155 #endif /* COMP1 */ 156 #if defined(COMP2) 157 #define TIM_TIM3_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM3_ETR is connected to COMP2 output */ 158 #endif /* COMP2 */ 159 #if defined(ADC2) 160 #define TIM_TIM3_ETR_ADC2_AWD1 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM3_ETR is connected to ADC2 AWD1 */ 161 #define TIM_TIM3_ETR_ADC2_AWD2 TIM1_AF1_ETRSEL_2 /*!< TIM3_ETR is connected to ADC2 AWD2 */ 162 #define TIM_TIM3_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM3_ETR is connected to ADC2 AWD3 */ 163 #endif /* ADC2 */ 164 #define TIM_TIM3_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /*!< TIM3_ETR is connected to TIM2 ETR */ 165 #if defined(TIM4) 166 #define TIM_TIM3_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /*!< TIM3_ETR is connected to TIM4 ETR */ 167 #endif /* TIM4 */ 168 #if defined(TIM5) 169 #define TIM_TIM3_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1| TIM1_AF1_ETRSEL_0) /*!< TIM3_ETR is connected to TIM5 ETR */ 170 #endif /* TIM5 */ 171 #if defined(ETH_NS) 172 #define TIM_TIM3_ETR_ETH_PPS (TIM1_AF1_ETRSEL_1| TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_3 ) /*!< TIM3_ETR is connected to ETH PPS */ 173 #endif /* ETH_NS */ 174 #if defined(PLAY1) 175 #define TIM_TIM3_ETR_PLAY1_OUT0 TIM1_AF1_ETRSEL_Msk /*!< TIM3_ETR is connected to PLAY1 output 0 */ 176 #endif /* PLAY1 */ 177 178 #if defined(TIM4) 179 #define TIM_TIM4_ETR_GPIO 0x00000000UL /*!< TIM4_ETR is not connected to I/O */ 180 #if defined(COMP1) && defined(COMP2) 181 #define TIM_TIM4_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM4_ETR is connected to COMP1 output */ 182 #define TIM_TIM4_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM4_ETR is connected to COMP2 output */ 183 #endif /* COMP1 && COMP2 */ 184 #define TIM_TIM4_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /*!< TIM4_ETR is connected to TIM2 ETR */ 185 #define TIM_TIM4_ETR_TIM3_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< TIM4_ETR is connected to TIM3 ETR */ 186 #define TIM_TIM4_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1| TIM1_AF1_ETRSEL_0) /*!< TIM4_ETR is connected to TIM5 ETR */ 187 #endif /* TIM4 */ 188 189 #if defined(TIM5) 190 #define TIM_TIM5_ETR_GPIO 0x00000000UL /*!< TIM5_ETR is not connected to I/O */ 191 #define TIM_TIM5_ETR_SAI2_FSA TIM1_AF1_ETRSEL_0 /*!< TIM5_ETR is connected to SAI2 */ 192 #define TIM_TIM5_ETR_SAI2_FSB TIM1_AF1_ETRSEL_1 /*!< TIM5_ETR is connected to SAI2 */ 193 #if defined(COMP1) && defined(COMP2) 194 #define TIM_TIM5_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM5_ETR is connected to COMP1 output */ 195 #define TIM_TIM5_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM5_ETR is connected to COMP2 output */ 196 #endif /* COMP1 && COMP2 */ 197 #define TIM_TIM5_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /*!< TIM5_ETR is connected to TIM2 ETR */ 198 #define TIM_TIM5_ETR_TIM3_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< TIM5_ETR is connected to TIM3 ETR */ 199 #define TIM_TIM5_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /*!< TIM5_ETR is connected to TIM4 ETR */ 200 #if defined(USB_DRD_FS) 201 #define TIM_TIM5_ETR_USB_SOF (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM5_ETR is connected to USB SOF */ 202 #elif defined(USB_OTG_HS) 203 #define TIM_TIM5_ETR_USBHS_SOF (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /*!< TIM5_ETR is connected to USBHS OTG SOF */ 204 #define TIM_TIM5_ETR_USBFS_SOF (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM5_ETR is connected to USBFS OTG SOF */ 205 #endif /* USB_DRD_FS */ 206 #endif /* TIM5 */ 207 208 #if defined(TIM8) 209 #define TIM_TIM8_ETR_GPIO 0x00000000UL /*!< TIM8_ETR is not connected to I/O */ 210 #if defined(COMP1) && defined(COMP2) 211 #define TIM_TIM8_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM8_ETR is connected to COMP1 output */ 212 #define TIM_TIM8_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM8_ETR is connected to COMP2 output */ 213 #endif /* COMP1 && COMP2 */ 214 #define TIM_TIM8_ETR_ADC2_AWD1 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to ADC2 AWD1 */ 215 #define TIM_TIM8_ETR_ADC2_AWD2 TIM1_AF1_ETRSEL_2 /*!< TIM8_ETR is connected to ADC2 AWD2 */ 216 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to ADC2 AWD3 */ 217 #if defined(ADC3) 218 #define TIM_TIM8_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< TIM8_ETR is connected to ADC3 AWD1 */ 219 #define TIM_TIM8_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to ADC3 AWD2 */ 220 #define TIM_TIM8_ETR_ADC3_AWD3 TIM1_AF1_ETRSEL_3 /*!< TIM8_ETR is connected to ADC3 AWD3 */ 221 #endif /* ADC3 */ 222 #endif /* TIM8 */ 223 /** 224 * @} 225 */ 226 227 /** @defgroup TIMEx_Break_Input TIM Extended Break input 228 * @{ 229 */ 230 #define TIM_BREAKINPUT_BRK 0x00000001U /*!< Timer break input */ 231 #define TIM_BREAKINPUT_BRK2 0x00000002U /*!< Timer break2 input */ 232 /** 233 * @} 234 */ 235 236 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source 237 * @{ 238 */ 239 #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /*!< An external source (GPIO) is connected to the BKIN pin */ 240 #if defined(COMP1) 241 #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /*!< The COMP1 output is connected to the break input */ 242 #endif /* COMP1 */ 243 #if defined(COMP2) 244 #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /*!< The COMP2 output is connected to the break input */ 245 #endif /* COMP2 */ 246 #if defined(PLAY1) 247 #define TIM_BREAKINPUTSOURCE_PLAY1 0x00000008U /*!< The PLAY1 output is connected to the break input (only for BKIN) */ 248 #endif /* PLAY1 */ 249 #if defined(MDF1) 250 #define TIM_BREAKINPUTSOURCE_MDF1 0x00000100U /*!< The Digital filter break output is connected to the break input */ 251 #endif /* MDF1 */ 252 /** 253 * @} 254 */ 255 256 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling 257 * @{ 258 */ 259 #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /*!< Break input source is disabled */ 260 #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /*!< Break input source is enabled */ 261 /** 262 * @} 263 */ 264 265 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity 266 * @{ 267 */ 268 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /*!< Break input source is active low */ 269 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /*!< Break input source is active_high */ 270 /** 271 * @} 272 */ 273 274 /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection 275 * @{ 276 */ 277 #define TIM_TIM1_TI1_GPIO 0x00000000UL /*!< TIM1_TI1 is connected to GPIO */ 278 #if defined(COMP1) && defined(COMP2) 279 #define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM1_TI1 is connected to COMP1 OUT */ 280 #define TIM_TIM1_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM1_TI1 is connected to COMP2 OUT */ 281 #elif defined(COMP1) 282 #define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM1_TI1 is connected to COMP1 OUT */ 283 #endif /* COMP1 && COMP2 */ 284 #define TIM_TIM1_TI2_GPIO 0x00000000UL /*!< TIM1_TI2 is connected to GPIO */ 285 #define TIM_TIM1_TI3_GPIO 0x00000000UL /*!< TIM1_TI3 is connected to GPIO */ 286 #define TIM_TIM1_TI4_GPIO 0x00000000UL /*!< TIM1_TI4 is connected to GPIO */ 287 288 #define TIM_TIM2_TI1_GPIO 0x00000000UL /*!< TIM2_TI1 is connected to GPIO */ 289 #if defined(STM32H503xx) 290 #define TIM_TIM2_TI1_LSI TIM_TISEL_TI1SEL_0 /*!< TIM2_TI1 is connected to LSI */ 291 #define TIM_TIM2_TI1_LSE TIM_TISEL_TI1SEL_1 /*!< TIM2_TI1 is connected to LSE */ 292 #define TIM_TIM2_TI1_RTC_WKUP (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM2_TI1 is connected to RTC */ 293 #define TIM_TIM2_TI1_TIM3_TI1 TIM_TISEL_TI1SEL_2 /*!< TIM2_TI1 is connected to TIM3 TI1 */ 294 #endif /* STM32H503xx */ 295 #if defined(ETH_NS) 296 #define TIM_TIM2_TI1_ETH_PPS TIM_TISEL_TI1SEL_0 /*!< TIM2_TI1 is connected to ETH PPS */ 297 #endif /* ETH_NS */ 298 #if defined(COMP1) && defined(COMP2) 299 #define TIM_TIM2_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM2_TI1 is connected to COMP1 output */ 300 #define TIM_TIM2_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM2_TI1 is connected to COMP2 output */ 301 #define TIM_TIM2_TI1_PLAY1_OUT3 TIM_TISEL_TI1SEL_2 /*!< TIM2_TI1 is connected to PLAY1 output 3 */ 302 #endif /* COMP1 && COMP2 */ 303 #define TIM_TIM2_TI2_GPIO 0x00000000UL /*!< TIM2_TI2 is connected to GPIO */ 304 #if defined(STM32H503xx) 305 #define TIM_TIM2_TI2_HSI_1024 TIM_TISEL_TI2SEL_0 /*!< TIM2_TI2 is connected to HSI_1024 */ 306 #define TIM_TIM2_TI2_CSI_128 TIM_TISEL_TI2SEL_1 /*!< TIM2_TI2 is connected to CSI_128 */ 307 #define TIM_TIM2_TI2_MCO2 (TIM_TISEL_TI2SEL_1 |TIM_TISEL_TI2SEL_0) /*!< TIM2_TI2 is connected to MCO2 */ 308 #define TIM_TIM2_TI2_MCO1 TIM_TISEL_TI2SEL_2 /*!< TIM2_TI2 is connected to MCO1 */ 309 #endif /* STM32H503xx */ 310 #if defined(COMP1) && defined(COMP2) 311 #define TIM_TIM2_TI2_COMP1 TIM_TISEL_TI2SEL_0 /*!< TIM2_TI2 is connected to COMP1 output */ 312 #define TIM_TIM2_TI2_COMP2 TIM_TISEL_TI2SEL_1 /*!< TIM2_TI2 is connected to COMP2 output */ 313 #endif /* COMP1 && COMP2 */ 314 #define TIM_TIM2_TI3_GPIO 0x00000000UL /*!< TIM2_TI3 is connected to GPIO */ 315 #define TIM_TIM2_TI4_GPIO 0x00000000UL /*!< TIM2_TI4 is connected to GPIO */ 316 #if defined(STM32H503xx) 317 #define TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0 /*!< TIM2_TI4 is connected to COMP1 */ 318 #endif /* STM32H503xx */ 319 320 #define TIM_TIM3_TI1_GPIO 0x00000000UL /*!< TIM3_TI1 is connected to GPIO */ 321 #if defined(STM32H503xx) 322 #define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM3_TI1 is connected to COMP1 */ 323 #define TIM_TIM3_TI1_MCO1 TIM_TISEL_TI1SEL_1 /*!< TIM3_TI1 is connected to MCO1 */ 324 #define TIM_TIM3_TI1_TIM2_TI1 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM3_TI1 is connected to TIM2 TI1 */ 325 #define TIM_TIM3_TI1_HSE_1MHZ TIM_TISEL_TI1SEL_2 /*!< TIM3_TI1 is connected to HSE 1MHZ */ 326 #endif /* STM32H503xx */ 327 #if defined(ETH_NS) 328 #define TIM_TIM3_TI1_ETH_PPS TIM_TISEL_TI1SEL_0 /*!< TIM3_TI1 is connected to ETH PPS */ 329 #endif /* ETH_NS */ 330 #if defined(COMP1) && defined(COMP2) 331 #define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM3_TI1 is connected to COMP1 output */ 332 #define TIM_TIM3_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM3_TI1 is connected to COMP2 output */ 333 #define TIM_TIM3_TI1_PLAY1_OUT3 TIM_TISEL_TI1SEL_2 /*!< TIM3_TI1 is connected to PLAY1 output 3 */ 334 #endif /* COMP1 && COMP2 */ 335 #define TIM_TIM3_TI2_GPIO 0x00000000UL /*!< TIM3_TI2 is connected to GPIO */ 336 #if defined(STM32H503xx) 337 #define TIM_TIM3_TI2_CSI_128 TIM_TISEL_TI2SEL_0 /*!< TIM3_TI2 is connected to CSI 128 */ 338 #define TIM_TIM3_TI2_MCO2 TIM_TISEL_TI2SEL_1 /*!< TIM3_TI2 is connected to MCO2 */ 339 #define TIM_TIM3_TI2_HSI_1024 (TIM_TISEL_TI2SEL_1 |TIM_TISEL_TI2SEL_0) /*!< TIM3_TI2 is connected to HSI 1024 */ 340 #endif /* STM32H503xx */ 341 #if defined(COMP1) && defined(COMP2) 342 #define TIM_TIM3_TI2_COMP1 TIM_TISEL_TI2SEL_0 /*!< TIM3_TI2 is connected to COMP1 output */ 343 #define TIM_TIM3_TI2_COMP2 TIM_TISEL_TI2SEL_1 /*!< TIM3_TI2 is connected to COMP2 output */ 344 #endif /* COMP1 && COMP2 */ 345 #define TIM_TIM3_TI3_GPIO 0x00000000UL /*!< TIM3_TI3 is connected to GPIO */ 346 #define TIM_TIM3_TI4_GPIO 0x00000000UL /*!< TIM3_TI4 is connected to GPIO */ 347 348 #if defined(TIM4) 349 #define TIM_TIM4_TI1_GPIO 0x00000000UL /*!< TIM4_TI1 is connected to GPIO */ 350 #if defined(COMP1) && defined(COMP2) 351 #define TIM_TIM4_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM4_TI1 is connected to COMP1 output */ 352 #define TIM_TIM4_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM4_TI1 is connected to COMP2 output */ 353 #endif /* COMP1 && COMP2 */ 354 #define TIM_TIM4_TI2_GPIO 0x00000000UL /*!< TIM4_TI2 is connected to GPIO */ 355 #define TIM_TIM4_TI3_GPIO 0x00000000UL /*!< TIM4_TI3 is connected to GPIO */ 356 #define TIM_TIM4_TI4_GPIO 0x00000000UL /*!< TIM4_TI4 is connected to GPIO */ 357 #endif /* TIM4 */ 358 359 #if defined(TIM5) 360 #define TIM_TIM5_TI1_GPIO 0x00000000UL /*!< TIM5_TI1 is connected to GPIO */ 361 #if defined(COMP1) && defined(COMP2) 362 #define TIM_TIM5_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM5_TI1 is connected to COMP1 output */ 363 #define TIM_TIM5_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM5_TI1 is connected to COMP2 output */ 364 #endif /* COMP1 && COMP2 */ 365 #define TIM_TIM5_TI2_GPIO 0x00000000UL /*!< TIM5_TI2 is connected to GPIO */ 366 #define TIM_TIM5_TI3_GPIO 0x00000000UL /*!< TIM5_TI3 is connected to GPIO */ 367 #define TIM_TIM5_TI4_GPIO 0x00000000UL /*!< TIM5_TI4 is connected to GPIO */ 368 #endif /* TIM5 */ 369 370 #if defined(TIM8) 371 #define TIM_TIM8_TI1_GPIO 0x00000000UL /*!< TIM8_TI1 is connected to GPIO */ 372 #if defined(COMP1) && defined(COMP2) 373 #define TIM_TIM8_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM8_TI1 is connected to COMP1 output */ 374 #define TIM_TIM8_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM8_TI1 is connected to COMP2 output */ 375 #endif /* COMP1 && COMP2 */ 376 #define TIM_TIM8_TI2_GPIO 0x00000000UL /*!< TIM8_TI2 is connected to GPIO */ 377 #define TIM_TIM8_TI3_GPIO 0x00000000UL /*!< TIM8_TI3 is connected to GPIO */ 378 #define TIM_TIM8_TI4_GPIO 0x00000000UL /*!< TIM8_TI4 is connected to GPIO */ 379 #endif /* TIM8 */ 380 381 #if defined(TIM12) 382 #define TIM_TIM12_TI1_GPIO 0x00000000UL /*!< TIM12_TI1 is connected to GPIO */ 383 #if defined(COMP1) && defined(COMP2) 384 #define TIM_TIM12_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM12_TI1 is connected to COMP1 output */ 385 #define TIM_TIM12_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM12_TI1 is connected to COMP2 output */ 386 #endif /* COMP1 && COMP2 */ 387 #define TIM_TIM12_TI1_HSI_1024 TIM_TISEL_TI1SEL_2 /*!< TIM12_TI1 is connected to HSI 1024 */ 388 #define TIM_TIM12_TI1_CSI_128 (TIM_TISEL_TI1SEL_2 |TIM_TISEL_TI1SEL_0) /*!< TIM12_TI1 is connected to CSI 128 */ 389 #define TIM_TIM12_TI2_GPIO 0x00000000UL /*!< TIM12_TI2 is connected to GPIO */ 390 #if defined(COMP2) 391 #define TIM_TIM12_TI2_COMP2 TIM_TISEL_TI2SEL_0 /*!< TIM12_TI2 is connected to COMP2 output */ 392 #endif /* COMP2 */ 393 #endif /* TIM12 */ 394 395 #if defined(TIM13) 396 #define TIM_TIM13_TI1_GPIO 0x00000000UL /*!< TIM13_TI1 is connected to GPIO */ 397 #if defined(I3C1) 398 #define TIM_TIM13_TI1_I3C1_IBIACK TIM_TISEL_TI1SEL_0 /*!< TIM13_TI1 is connected to I3C1 IBI ACK */ 399 #endif /* I3C1 */ 400 #if defined(COMP1) && defined(COMP2) 401 #define TIM_TIM13_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM13_TI1 is connected to COMP1 output */ 402 #define TIM_TIM13_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM13_TI1 is connected to COMP2 output */ 403 #endif /* COMP1 && COMP2 */ 404 #endif /* TIM13 */ 405 406 #if defined(TIM14) 407 #define TIM_TIM14_TI1_GPIO 0x00000000UL /*!< TIM14_TI1 is connected to GPIO */ 408 #if defined(I3C2) 409 #define TIM_TIM14_TI1_I3C2_IBIACK TIM_TISEL_TI1SEL_0 /*!< TIM14_TI1 is connected to I3C2 IBI ACK */ 410 #endif /* I3C1 */ 411 #if defined(COMP1) && defined(COMP2) 412 #define TIM_TIM14_TI1_COMP1 TIM_TISEL_TI1SEL_1 /*!< TIM14_TI1 is connected to COMP1 output */ 413 #define TIM_TIM14_TI1_COMP2 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM14_TI1 is connected to COMP2 output */ 414 #endif /* COMP1 && COMP2 */ 415 #endif /* TIM14 */ 416 417 #if defined(TIM15) 418 #define TIM_TIM15_TI1_GPIO 0x00000000UL /*!< TIM15_TI1 is connected to GPIO */ 419 #define TIM_TIM15_TI1_TIM2 TIM_TISEL_TI1SEL_0 /*!< TIM15_TI1 is connected to TIM2 */ 420 #define TIM_TIM15_TI1_TIM3 TIM_TISEL_TI1SEL_1 /*!< TIM15_TI1 is connected to TIM3 */ 421 #define TIM_TIM15_TI1_TIM4 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM15_TI1 is connected to TIM4 */ 422 #define TIM_TIM15_TI1_LSE TIM_TISEL_TI1SEL_2 /*!< TIM15_TI1 is connected to LSE */ 423 #define TIM_TIM15_TI1_CSI_128 (TIM_TISEL_TI1SEL_2 |TIM_TISEL_TI1SEL_0) /*!< TIM15_TI1 is connected to CSI 128*/ 424 #define TIM_TIM15_TI1_MCO2 (TIM_TISEL_TI1SEL_2 |TIM_TISEL_TI1SEL_1) /*!< TIM15_TI1 is connected to MCO2 */ 425 #if defined(COMP1) && defined(COMP2) 426 #define TIM_TIM15_TI1_COMP1 TIM_TISEL_TI1SEL_3 /*!< TIM15_TI1 is connected to COMP1 output */ 427 #define TIM_TIM15_TI1_COMP2 (TIM_TISEL_TI1SEL_3 | TIM_TISEL_TI1SEL_0) /*!< TIM15_TI1 is connected to COMP2 output */ 428 #endif /* COMP1 && COMP2 */ 429 #define TIM_TIM15_TI2_GPIO 0x00000000UL /*!< TIM15_TI1 is connected to GPIO */ 430 #define TIM_TIM15_TI2_TIM2 TIM_TISEL_TI2SEL_0 /*!< TIM15_TI2 is connected to TIM2 */ 431 #define TIM_TIM15_TI2_TIM3 TIM_TISEL_TI2SEL_1 /*!< TIM15_TI2 is connected to TIM3 */ 432 #define TIM_TIM15_TI2_TIM4 (TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0) /*!< TIM15_TI2 is connected to TIM4 */ 433 #if defined(COMP1) && defined(COMP2) 434 #define TIM_TIM15_TI2_COMP1 TIM_TISEL_TI2SEL_2 /*!< TIM15_TI2 is connected to COMP1 output */ 435 #define TIM_TIM15_TI2_COMP2 (TIM_TISEL_TI2SEL_2 | TIM_TISEL_TI2SEL_0) /*!< TIM15_TI2 is connected to COMP2 output */ 436 #endif /* COMP1 && COMP2 */ 437 #endif /* TIM15 */ 438 439 #if defined(TIM16) 440 #define TIM_TIM16_TI1_GPIO 0x00000000UL /*!< TIM16_TI1 is connected to GPIO */ 441 #define TIM_TIM16_TI1_LSI TIM_TISEL_TI1SEL_0 /*!< TIM16_TI1 is connected to LSI */ 442 #define TIM_TIM16_TI1_LSE TIM_TISEL_TI1SEL_1 /*!< TIM16_TI1 is connected to LSE */ 443 #define TIM_TIM16_TI1_RTC_WKUP (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM16_TI1 is connected to RTC */ 444 #if defined(COMP1) && defined(COMP2) 445 #define TIM_TIM16_TI1_COMP1 TIM_TISEL_TI1SEL_3 /*!< TIM16_TI1 is connected to COMP1 output */ 446 #define TIM_TIM16_TI1_COMP2 (TIM_TISEL_TI1SEL_3 | TIM_TISEL_TI1SEL_0) /*!< TIM16_TI1 is connected to COMP2 output */ 447 #endif /* COMP1 && COMP2 */ 448 #endif /* TIM16 */ 449 450 #if defined(TIM17) 451 #define TIM_TIM17_TI1_GPIO 0x00000000UL /*!< TIM17_TI1 is connected to GPIO */ 452 #define TIM_TIM17_TI1_HSE_1MHZ TIM_TISEL_TI1SEL_1 /*!< TIM17_TI1 is connected to HSE 1MHZ */ 453 #define TIM_TIM17_TI1_MCO1 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM17_TI1 is connected to MCO1 */ 454 #if defined(COMP1) && defined(COMP2) 455 #define TIM_TIM17_TI1_COMP1 TIM_TISEL_TI1SEL_2 /*!< TIM17_TI1 is connected to COMP1 output */ 456 #define TIM_TIM17_TI1_COMP2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM17_TI1 is connected to COMP2 output */ 457 #endif /* COMP1 && COMP2 */ 458 #endif /* TIM17 */ 459 /** 460 * @} 461 */ 462 463 /** @defgroup TIMEx_SMS_Preload_Enable TIM Extended Bitfield SMS preload enabling 464 * @{ 465 */ 466 #define TIM_SMS_PRELOAD_SOURCE_UPDATE 0x00000000U /*!< Prelaod of SMS bitfield is disabled */ 467 #define TIM_SMS_PRELOAD_SOURCE_INDEX TIM_SMCR_SMSPS /*!< Preload of SMS bitfield is enabled */ 468 /** 469 * @} 470 */ 471 472 /** @defgroup TIMEx_Encoder_Index_Blanking TIM Extended Encoder index blanking 473 * @{ 474 */ 475 #define TIM_ENCODERINDEX_BLANKING_DISABLE 0x00000000U /*!< Encoder index blanking is disabled */ 476 #define TIM_ENCODERINDEX_BLANKING_TI3 TIM_ECR_IBLK_0 /*!< Encoder index blanking is enabled on TI3 */ 477 #define TIM_ENCODERINDEX_BLANKING_TI4 TIM_ECR_IBLK_1 /*!< Encoder index blanking is enabled on TI4 */ 478 479 /** 480 * @} 481 */ 482 483 /** @defgroup TIMEx_Encoder_Index_Position TIM Extended Encoder index position 484 * @{ 485 */ 486 #define TIM_ENCODERINDEX_POSITION_00 0x00000000U /*!< Encoder index position is AB=00 */ 487 #define TIM_ENCODERINDEX_POSITION_01 TIM_ECR_IPOS_0 /*!< Encoder index position is AB=01 */ 488 #define TIM_ENCODERINDEX_POSITION_10 TIM_ECR_IPOS_1 /*!< Encoder index position is AB=10 */ 489 #define TIM_ENCODERINDEX_POSITION_11 (TIM_ECR_IPOS_1 | TIM_ECR_IPOS_0) /*!< Encoder index position is AB=11 */ 490 #define TIM_ENCODERINDEX_POSITION_0 0x00000000U /*!< In directional clock mode or clock plus direction mode, index resets the counter when clock is 0 */ 491 #define TIM_ENCODERINDEX_POSITION_1 TIM_ECR_IPOS_0 /*!< In directional clock mode or clock plus direction mode, index resets the counter when clock is 1 */ 492 /** 493 * @} 494 */ 495 496 /** @defgroup TIMEx_Encoder_Index_Direction TIM Extended Encoder index direction 497 * @{ 498 */ 499 #define TIM_ENCODERINDEX_DIRECTION_UP_DOWN 0x00000000U /*!< Index resets the counter whatever the direction */ 500 #define TIM_ENCODERINDEX_DIRECTION_UP TIM_ECR_IDIR_0 /*!< Index resets the counter when up-counting only */ 501 #define TIM_ENCODERINDEX_DIRECTION_DOWN TIM_ECR_IDIR_1 /*!< Index resets the counter when down-counting only */ 502 /** 503 * @} 504 */ 505 506 /** @defgroup TIMEx_Encoder_Index_Polarity TIM Extended Encoder index polarity 507 * @{ 508 */ 509 #define TIM_ENCODERINDEX_POLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */ 510 #define TIM_ENCODERINDEX_POLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx pin */ 511 /** 512 * @} 513 */ 514 515 /** @defgroup TIMEx_Encoder_Index_Prescaler TIM Extended Encodder index prescaler 516 * @{ 517 */ 518 #define TIM_ENCODERINDEX_PRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ 519 #define TIM_ENCODERINDEX_PRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */ 520 #define TIM_ENCODERINDEX_PRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */ 521 #define TIM_ENCODERINDEX_PRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */ 522 /** 523 * @} 524 */ 525 526 /** 527 * @} 528 */ 529 /* End of exported constants -------------------------------------------------*/ 530 531 /* Exported macro ------------------------------------------------------------*/ 532 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 533 * @{ 534 */ 535 536 /** 537 * @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency. 538 * @note ex: @ref __HAL_TIM_CALC_PSC(80000000, 1000000); 539 * @param __TIMCLK__ timer input clock frequency (in Hz) 540 * @param __CNTCLK__ counter clock frequency (in Hz) 541 * @retval Prescaler value (between Min_Data=0 and Max_Data=65535) 542 */ 543 #define __HAL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \ 544 ((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((__TIMCLK__)/(__CNTCLK__) - 1U) : 0U 545 546 /** 547 * @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency. 548 * @note ex: @ref __HAL_TIM_CALC_PERIOD(1000000, 0, 10000); 549 * @param __TIMCLK__ timer input clock frequency (in Hz) 550 * @param __PSC__ prescaler 551 * @param __FREQ__ output signal frequency (in Hz) 552 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 553 */ 554 #define __HAL_TIM_CALC_PERIOD(__TIMCLK__, __PSC__, __FREQ__) \ 555 (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) - 1U) : 0U 556 557 /** 558 * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required 559 * output signal frequency. 560 * @note ex: @ref __HAL_TIM_CALC_PERIOD_DITHER(1000000, 0, 10000); 561 * @note This macro should be used only if dithering is already enabled 562 * @param __TIMCLK__ timer input clock frequency (in Hz) 563 * @param __PSC__ prescaler 564 * @param __FREQ__ output signal frequency (in Hz) 565 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65519) 566 */ 567 #define __HAL_TIM_CALC_PERIOD_DITHER(__TIMCLK__, __PSC__, __FREQ__) \ 568 (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? \ 569 (uint32_t)(((uint64_t)(__TIMCLK__)*16/((__FREQ__) * ((__PSC__) + 1U)) - 16U)) : 0U 570 571 /** 572 * @brief HELPER macro calculating the compare value required to achieve the required timer output compare 573 * active/inactive delay. 574 * @note ex: @ref __HAL_TIM_CALC_PULSE(1000000, 0, 10); 575 * @param __TIMCLK__ timer input clock frequency (in Hz) 576 * @param __PSC__ prescaler 577 * @param __DELAY__ timer output compare active/inactive delay (in us) 578 * @retval Compare value (between Min_Data=0 and Max_Data=65535) 579 */ 580 #define __HAL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__) \ 581 ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ 582 / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 583 584 /** 585 * @brief HELPER macro calculating the compare value, with dithering feature enabled, to achieve the required timer 586 * output compare active/inactive delay. 587 * @note ex: @ref __HAL_TIM_CALC_PULSE_DITHER(1000000, 0, 10); 588 * @note This macro should be used only if dithering is already enabled 589 * @param __TIMCLK__ timer input clock frequency (in Hz) 590 * @param __PSC__ prescaler 591 * @param __DELAY__ timer output compare active/inactive delay (in us) 592 * @retval Compare value (between Min_Data=0 and Max_Data=65519) 593 */ 594 #define __HAL_TIM_CALC_PULSE_DITHER(__TIMCLK__, __PSC__, __DELAY__) \ 595 ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__) * 16U) \ 596 / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 597 598 /** 599 * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration 600 * (when the timer operates in one pulse mode). 601 * @note ex: @ref __HAL_TIM_CALC_PERIOD_BY_DELAY(1000000, 0, 10, 20); 602 * @param __TIMCLK__ timer input clock frequency (in Hz) 603 * @param __PSC__ prescaler 604 * @param __DELAY__ timer output compare active/inactive delay (in us) 605 * @param __PULSE__ pulse duration (in us) 606 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 607 */ 608 #define __HAL_TIM_CALC_PERIOD_BY_DELAY(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ 609 ((uint32_t)(__HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__PULSE__)) \ 610 + __HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__DELAY__)))) 611 612 /** 613 * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required 614 * pulse duration (when the timer operates in one pulse mode). 615 * @note ex: @ref __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(1000000, 0, 10, 20); 616 * @note This macro should be used only if dithering is already enabled 617 * @param __TIMCLK__ timer input clock frequency (in Hz) 618 * @param __PSC__ prescaler 619 * @param __DELAY__ timer output compare active/inactive delay (in us) 620 * @param __PULSE__ pulse duration (in us) 621 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65519) 622 */ 623 #define __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ 624 ((uint32_t)(__HAL_TIM_CALC_PULSE_DITHER((__TIMCLK__), (__PSC__), (__PULSE__)) \ 625 + __HAL_TIM_CALC_PULSE_DITHER((__TIMCLK__), (__PSC__), (__DELAY__)))) 626 627 /** 628 * @} 629 */ 630 /* End of exported macro -----------------------------------------------------*/ 631 632 /* Private macro -------------------------------------------------------------*/ 633 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 634 * @{ 635 */ 636 #define IS_TIM_REMAP(__REMAP__) ((((__REMAP__) & 0xFFFC3FFFU) == 0x00000000U)) 637 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ 638 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) 639 #if defined(COMP1) && defined(COMP2) 640 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 641 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 642 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ 643 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_PLAY1) || \ 644 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_MDF1)) 645 #elif defined(COMP1) 646 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 647 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1)) 648 #else 649 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) ((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) 650 #endif /* COMP1 && COMP2 */ 651 652 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ 653 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) 654 655 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ 656 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) 657 658 #define IS_TIM_TISEL(__TISEL__) ((((__TISEL__) & 0xF0F0F0F0U) == 0x00000000U)) 659 660 #define IS_TIM_TISEL_TIX_INSTANCE(INSTANCE, CHANNEL) \ 661 (IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL) && ((CHANNEL) < TIM_CHANNEL_5)) 662 #if defined(STM32H503xx) 663 #define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \ 664 ((((INSTANCE) == TIM1) && \ 665 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 666 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 667 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 668 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 669 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 670 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 671 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 672 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2))) \ 673 || \ 674 (((INSTANCE) == TIM2) && \ 675 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 676 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 677 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 678 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 679 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 680 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12) || \ 681 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 682 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 683 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2))) \ 684 || \ 685 (((INSTANCE) == TIM3) && \ 686 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 687 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 688 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 689 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 690 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 691 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 692 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 693 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2)))) 694 695 #define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \ 696 ((((INSTANCE) == TIM1) && \ 697 (((__SELECTION__) == TIM_TS_ITR1) || \ 698 ((__SELECTION__) == TIM_TS_ITR2) || \ 699 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 700 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 701 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 702 ((__SELECTION__) == TIM_TS_ETRF))) \ 703 || \ 704 (((INSTANCE) == TIM2) && \ 705 (((__SELECTION__) == TIM_TS_ITR0) || \ 706 ((__SELECTION__) == TIM_TS_ITR2) || \ 707 ((__SELECTION__) == TIM_TS_ITR12) || \ 708 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 709 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 710 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 711 ((__SELECTION__) == TIM_TS_ETRF))) \ 712 || \ 713 (((INSTANCE) == TIM3) && \ 714 (((__SELECTION__) == TIM_TS_ITR0) || \ 715 ((__SELECTION__) == TIM_TS_ITR1) || \ 716 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 717 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 718 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 719 ((__SELECTION__) == TIM_TS_ETRF)))) 720 721 #define IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE(INSTANCE, __SELECTION__) \ 722 ((((INSTANCE) == TIM1) && \ 723 (((__SELECTION__) == TIM_TS_ITR1) || \ 724 ((__SELECTION__) == TIM_TS_ITR2) || \ 725 ((__SELECTION__) == TIM_TS_NONE))) \ 726 || \ 727 (((INSTANCE) == TIM2) && \ 728 (((__SELECTION__) == TIM_TS_ITR0) || \ 729 ((__SELECTION__) == TIM_TS_ITR2) || \ 730 ((__SELECTION__) == TIM_TS_ITR12) || \ 731 ((__SELECTION__) == TIM_TS_NONE))) \ 732 || \ 733 (((INSTANCE) == TIM3) && \ 734 (((__SELECTION__) == TIM_TS_ITR0) || \ 735 ((__SELECTION__) == TIM_TS_ITR1) || \ 736 ((__SELECTION__) == TIM_TS_NONE)))) 737 #else 738 #define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \ 739 ((((INSTANCE) == TIM1) && \ 740 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 741 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 742 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 743 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 744 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 745 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 746 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 747 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 748 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 749 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 750 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 751 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 752 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 753 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 754 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 755 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 756 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))) \ 757 || \ 758 (((INSTANCE) == TIM2) && \ 759 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 760 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 761 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 762 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 763 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 764 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 765 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 766 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 767 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 768 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 769 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 770 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 771 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 772 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 773 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 774 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 775 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 776 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12))) \ 777 || \ 778 (((INSTANCE) == TIM3) && \ 779 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 780 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 781 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 782 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 783 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 784 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 785 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 786 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 787 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 788 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 789 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 790 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 791 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 792 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 793 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 794 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 795 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))) \ 796 || \ 797 (((INSTANCE) == TIM4) && \ 798 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 799 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 800 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 801 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 802 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 803 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 804 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 805 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 806 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 807 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 808 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 809 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 810 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 811 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 812 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 813 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 814 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))) \ 815 || \ 816 (((INSTANCE) == TIM5) && \ 817 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 818 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 819 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 820 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 821 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 822 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 823 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 824 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 825 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 826 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 827 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 828 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 829 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 830 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 831 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 832 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 833 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 834 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12))) \ 835 || \ 836 (((INSTANCE) == TIM8) && \ 837 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 838 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 839 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 840 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 841 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 842 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 843 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 844 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 845 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 846 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 847 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 848 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 849 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 850 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 851 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 852 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 853 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))) \ 854 || \ 855 (((INSTANCE) == TIM12) && \ 856 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 857 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 858 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 859 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 860 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 861 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 862 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 863 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 864 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 865 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 866 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 867 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 868 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 869 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 870 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 871 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 872 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))) \ 873 || \ 874 (((INSTANCE) == TIM15) && \ 875 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 876 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 877 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 878 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 879 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 880 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 881 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 882 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 883 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 884 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 885 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 886 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 887 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 888 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 889 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11)))) 890 891 #define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \ 892 ((((INSTANCE) == TIM1) && \ 893 (((__SELECTION__) == TIM_TS_TI1F_ED) || \ 894 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 895 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 896 ((__SELECTION__) == TIM_TS_ETRF) || \ 897 ((__SELECTION__) == TIM_TS_ITR1) || \ 898 ((__SELECTION__) == TIM_TS_ITR2) || \ 899 ((__SELECTION__) == TIM_TS_ITR3) || \ 900 ((__SELECTION__) == TIM_TS_ITR4) || \ 901 ((__SELECTION__) == TIM_TS_ITR5) || \ 902 ((__SELECTION__) == TIM_TS_ITR6) || \ 903 ((__SELECTION__) == TIM_TS_ITR7) || \ 904 ((__SELECTION__) == TIM_TS_ITR8) || \ 905 ((__SELECTION__) == TIM_TS_ITR9) || \ 906 ((__SELECTION__) == TIM_TS_ITR10) || \ 907 ((__SELECTION__) == TIM_TS_ITR11))) \ 908 || \ 909 (((INSTANCE) == TIM2) && \ 910 (((__SELECTION__) == TIM_TS_TI1F_ED) || \ 911 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 912 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 913 ((__SELECTION__) == TIM_TS_ETRF) || \ 914 ((__SELECTION__) == TIM_TS_ITR0) || \ 915 ((__SELECTION__) == TIM_TS_ITR2) || \ 916 ((__SELECTION__) == TIM_TS_ITR3) || \ 917 ((__SELECTION__) == TIM_TS_ITR4) || \ 918 ((__SELECTION__) == TIM_TS_ITR5) || \ 919 ((__SELECTION__) == TIM_TS_ITR6) || \ 920 ((__SELECTION__) == TIM_TS_ITR7) || \ 921 ((__SELECTION__) == TIM_TS_ITR8) || \ 922 ((__SELECTION__) == TIM_TS_ITR9) || \ 923 ((__SELECTION__) == TIM_TS_ITR10) || \ 924 ((__SELECTION__) == TIM_TS_ITR11) || \ 925 ((__SELECTION__) == TIM_TS_ITR12))) \ 926 || \ 927 (((INSTANCE) == TIM3) && \ 928 (((__SELECTION__) == TIM_TS_TI1F_ED) || \ 929 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 930 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 931 ((__SELECTION__) == TIM_TS_ETRF) || \ 932 ((__SELECTION__) == TIM_TS_ITR0) || \ 933 ((__SELECTION__) == TIM_TS_ITR1) || \ 934 ((__SELECTION__) == TIM_TS_ITR3) || \ 935 ((__SELECTION__) == TIM_TS_ITR4) || \ 936 ((__SELECTION__) == TIM_TS_ITR5) || \ 937 ((__SELECTION__) == TIM_TS_ITR6) || \ 938 ((__SELECTION__) == TIM_TS_ITR7) || \ 939 ((__SELECTION__) == TIM_TS_ITR8) || \ 940 ((__SELECTION__) == TIM_TS_ITR9) || \ 941 ((__SELECTION__) == TIM_TS_ITR10) || \ 942 ((__SELECTION__) == TIM_TS_ITR11))) \ 943 || \ 944 (((INSTANCE) == TIM4) && \ 945 (((__SELECTION__) == TIM_TS_TI1F_ED) || \ 946 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 947 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 948 ((__SELECTION__) == TIM_TS_ETRF) || \ 949 ((__SELECTION__) == TIM_TS_ITR0) || \ 950 ((__SELECTION__) == TIM_TS_ITR1) || \ 951 ((__SELECTION__) == TIM_TS_ITR2) || \ 952 ((__SELECTION__) == TIM_TS_ITR4) || \ 953 ((__SELECTION__) == TIM_TS_ITR5) || \ 954 ((__SELECTION__) == TIM_TS_ITR6) || \ 955 ((__SELECTION__) == TIM_TS_ITR7) || \ 956 ((__SELECTION__) == TIM_TS_ITR8) || \ 957 ((__SELECTION__) == TIM_TS_ITR9) || \ 958 ((__SELECTION__) == TIM_TS_ITR10) || \ 959 ((__SELECTION__) == TIM_TS_ITR11))) \ 960 || \ 961 (((INSTANCE) == TIM5) && \ 962 (((__SELECTION__) == TIM_TS_TI1F_ED) || \ 963 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 964 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 965 ((__SELECTION__) == TIM_TS_ETRF) || \ 966 ((__SELECTION__) == TIM_TS_ITR0) || \ 967 ((__SELECTION__) == TIM_TS_ITR1) || \ 968 ((__SELECTION__) == TIM_TS_ITR2) || \ 969 ((__SELECTION__) == TIM_TS_ITR3) || \ 970 ((__SELECTION__) == TIM_TS_ITR5) || \ 971 ((__SELECTION__) == TIM_TS_ITR6) || \ 972 ((__SELECTION__) == TIM_TS_ITR7) || \ 973 ((__SELECTION__) == TIM_TS_ITR8) || \ 974 ((__SELECTION__) == TIM_TS_ITR9) || \ 975 ((__SELECTION__) == TIM_TS_ITR10) || \ 976 ((__SELECTION__) == TIM_TS_ITR11) || \ 977 ((__SELECTION__) == TIM_TS_ITR12))) \ 978 || \ 979 (((INSTANCE) == TIM8) && \ 980 (((__SELECTION__) == TIM_TS_TI1F_ED) || \ 981 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 982 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 983 ((__SELECTION__) == TIM_TS_ETRF) || \ 984 ((__SELECTION__) == TIM_TS_ITR0) || \ 985 ((__SELECTION__) == TIM_TS_ITR1) || \ 986 ((__SELECTION__) == TIM_TS_ITR2) || \ 987 ((__SELECTION__) == TIM_TS_ITR3) || \ 988 ((__SELECTION__) == TIM_TS_ITR4) || \ 989 ((__SELECTION__) == TIM_TS_ITR6) || \ 990 ((__SELECTION__) == TIM_TS_ITR7) || \ 991 ((__SELECTION__) == TIM_TS_ITR8) || \ 992 ((__SELECTION__) == TIM_TS_ITR9) || \ 993 ((__SELECTION__) == TIM_TS_ITR10) || \ 994 ((__SELECTION__) == TIM_TS_ITR11))) \ 995 || \ 996 (((INSTANCE) == TIM12) && \ 997 (((__SELECTION__) == TIM_TS_TI1F_ED) || \ 998 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 999 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1000 ((__SELECTION__) == TIM_TS_ETRF) || \ 1001 ((__SELECTION__) == TIM_TS_ITR0) || \ 1002 ((__SELECTION__) == TIM_TS_ITR1) || \ 1003 ((__SELECTION__) == TIM_TS_ITR2) || \ 1004 ((__SELECTION__) == TIM_TS_ITR3) || \ 1005 ((__SELECTION__) == TIM_TS_ITR4) || \ 1006 ((__SELECTION__) == TIM_TS_ITR5) || \ 1007 ((__SELECTION__) == TIM_TS_ITR7) || \ 1008 ((__SELECTION__) == TIM_TS_ITR8) || \ 1009 ((__SELECTION__) == TIM_TS_ITR9) || \ 1010 ((__SELECTION__) == TIM_TS_ITR10) || \ 1011 ((__SELECTION__) == TIM_TS_ITR11))) \ 1012 || \ 1013 (((INSTANCE) == TIM15) && \ 1014 (((__SELECTION__) == TIM_TS_TI1F_ED) || \ 1015 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 1016 ((__SELECTION__) == TIM_TS_TI2FP2) || \ 1017 ((__SELECTION__) == TIM_TS_ITR0) || \ 1018 ((__SELECTION__) == TIM_TS_ITR1) || \ 1019 ((__SELECTION__) == TIM_TS_ITR2) || \ 1020 ((__SELECTION__) == TIM_TS_ITR3) || \ 1021 ((__SELECTION__) == TIM_TS_ITR4) || \ 1022 ((__SELECTION__) == TIM_TS_ITR5) || \ 1023 ((__SELECTION__) == TIM_TS_ITR6) || \ 1024 ((__SELECTION__) == TIM_TS_ITR7) || \ 1025 ((__SELECTION__) == TIM_TS_ITR8) || \ 1026 ((__SELECTION__) == TIM_TS_ITR10) || \ 1027 ((__SELECTION__) == TIM_TS_ITR11)))) 1028 1029 #define IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE(INSTANCE, __SELECTION__) \ 1030 ((((INSTANCE) == TIM1) && \ 1031 (((__SELECTION__) == TIM_TS_ITR1) || \ 1032 ((__SELECTION__) == TIM_TS_ITR2) || \ 1033 ((__SELECTION__) == TIM_TS_ITR3) || \ 1034 ((__SELECTION__) == TIM_TS_ITR4) || \ 1035 ((__SELECTION__) == TIM_TS_ITR5) || \ 1036 ((__SELECTION__) == TIM_TS_ITR6) || \ 1037 ((__SELECTION__) == TIM_TS_ITR7) || \ 1038 ((__SELECTION__) == TIM_TS_ITR8) || \ 1039 ((__SELECTION__) == TIM_TS_ITR9) || \ 1040 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1041 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1042 ((__SELECTION__) == TIM_TS_NONE))) \ 1043 || \ 1044 (((INSTANCE) == TIM2) && \ 1045 (((__SELECTION__) == TIM_TS_ITR0) || \ 1046 ((__SELECTION__) == TIM_TS_ITR2) || \ 1047 ((__SELECTION__) == TIM_TS_ITR3) || \ 1048 ((__SELECTION__) == TIM_TS_ITR4) || \ 1049 ((__SELECTION__) == TIM_TS_ITR5) || \ 1050 ((__SELECTION__) == TIM_TS_ITR6) || \ 1051 ((__SELECTION__) == TIM_TS_ITR7) || \ 1052 ((__SELECTION__) == TIM_TS_ITR8) || \ 1053 ((__SELECTION__) == TIM_TS_ITR9) || \ 1054 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1055 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1056 ((__SELECTION__) == TIM_TS_ITR12)|| \ 1057 ((__SELECTION__) == TIM_TS_NONE))) \ 1058 || \ 1059 (((INSTANCE) == TIM3) && \ 1060 (((__SELECTION__) == TIM_TS_ITR0) || \ 1061 ((__SELECTION__) == TIM_TS_ITR1) || \ 1062 ((__SELECTION__) == TIM_TS_ITR3) || \ 1063 ((__SELECTION__) == TIM_TS_ITR4) || \ 1064 ((__SELECTION__) == TIM_TS_ITR5) || \ 1065 ((__SELECTION__) == TIM_TS_ITR6) || \ 1066 ((__SELECTION__) == TIM_TS_ITR7) || \ 1067 ((__SELECTION__) == TIM_TS_ITR8) || \ 1068 ((__SELECTION__) == TIM_TS_ITR9) || \ 1069 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1070 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1071 ((__SELECTION__) == TIM_TS_NONE))) \ 1072 || \ 1073 (((INSTANCE) == TIM4) && \ 1074 (((__SELECTION__) == TIM_TS_ITR0) || \ 1075 ((__SELECTION__) == TIM_TS_ITR1) || \ 1076 ((__SELECTION__) == TIM_TS_ITR2) || \ 1077 ((__SELECTION__) == TIM_TS_ITR4) || \ 1078 ((__SELECTION__) == TIM_TS_ITR5) || \ 1079 ((__SELECTION__) == TIM_TS_ITR6) || \ 1080 ((__SELECTION__) == TIM_TS_ITR7) || \ 1081 ((__SELECTION__) == TIM_TS_ITR8) || \ 1082 ((__SELECTION__) == TIM_TS_ITR9) || \ 1083 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1084 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1085 ((__SELECTION__) == TIM_TS_NONE))) \ 1086 || \ 1087 (((INSTANCE) == TIM5) && \ 1088 (((__SELECTION__) == TIM_TS_ITR0) || \ 1089 ((__SELECTION__) == TIM_TS_ITR1) || \ 1090 ((__SELECTION__) == TIM_TS_ITR2) || \ 1091 ((__SELECTION__) == TIM_TS_ITR3) || \ 1092 ((__SELECTION__) == TIM_TS_ITR5) || \ 1093 ((__SELECTION__) == TIM_TS_ITR6) || \ 1094 ((__SELECTION__) == TIM_TS_ITR7) || \ 1095 ((__SELECTION__) == TIM_TS_ITR8) || \ 1096 ((__SELECTION__) == TIM_TS_ITR9) || \ 1097 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1098 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1099 ((__SELECTION__) == TIM_TS_ITR12)|| \ 1100 ((__SELECTION__) == TIM_TS_NONE))) \ 1101 || \ 1102 (((INSTANCE) == TIM8) && \ 1103 (((__SELECTION__) == TIM_TS_ITR0) || \ 1104 ((__SELECTION__) == TIM_TS_ITR1) || \ 1105 ((__SELECTION__) == TIM_TS_ITR2) || \ 1106 ((__SELECTION__) == TIM_TS_ITR3) || \ 1107 ((__SELECTION__) == TIM_TS_ITR4) || \ 1108 ((__SELECTION__) == TIM_TS_ITR6) || \ 1109 ((__SELECTION__) == TIM_TS_ITR7) || \ 1110 ((__SELECTION__) == TIM_TS_ITR8) || \ 1111 ((__SELECTION__) == TIM_TS_ITR9) || \ 1112 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1113 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1114 ((__SELECTION__) == TIM_TS_NONE))) \ 1115 || \ 1116 (((INSTANCE) == TIM12) && \ 1117 (((__SELECTION__) == TIM_TS_ITR0) || \ 1118 ((__SELECTION__) == TIM_TS_ITR1) || \ 1119 ((__SELECTION__) == TIM_TS_ITR2) || \ 1120 ((__SELECTION__) == TIM_TS_ITR3) || \ 1121 ((__SELECTION__) == TIM_TS_ITR4) || \ 1122 ((__SELECTION__) == TIM_TS_ITR5) || \ 1123 ((__SELECTION__) == TIM_TS_ITR7) || \ 1124 ((__SELECTION__) == TIM_TS_ITR8) || \ 1125 ((__SELECTION__) == TIM_TS_ITR9) || \ 1126 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1127 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1128 ((__SELECTION__) == TIM_TS_NONE))) \ 1129 || \ 1130 (((INSTANCE) == TIM15) && \ 1131 (((__SELECTION__) == TIM_TS_ITR0) || \ 1132 ((__SELECTION__) == TIM_TS_ITR1) || \ 1133 ((__SELECTION__) == TIM_TS_ITR2) || \ 1134 ((__SELECTION__) == TIM_TS_ITR3) || \ 1135 ((__SELECTION__) == TIM_TS_ITR4) || \ 1136 ((__SELECTION__) == TIM_TS_ITR5) || \ 1137 ((__SELECTION__) == TIM_TS_ITR6) || \ 1138 ((__SELECTION__) == TIM_TS_ITR7) || \ 1139 ((__SELECTION__) == TIM_TS_ITR8) || \ 1140 ((__SELECTION__) == TIM_TS_ITR10)|| \ 1141 ((__SELECTION__) == TIM_TS_ITR11)|| \ 1142 ((__SELECTION__) == TIM_TS_NONE)))) 1143 1144 #if defined(TIM17) 1145 #define IS_TIM_RTCPREEN_SELECTION(__SELECTION__) ((__SELECTION__) == TIM_TIM17_TI1_HSE_1MHZ) 1146 #endif /* TIM17 */ 1147 #endif /* STM32H503xx */ 1148 1149 #define IS_TIM_OC_CHANNEL_MODE(__MODE__, __CHANNEL__) \ 1150 (IS_TIM_OC_MODE(__MODE__) \ 1151 && ((((__MODE__) == TIM_OCMODE_DIRECTION_OUTPUT) || ((__MODE__) == TIM_OCMODE_PULSE_ON_COMPARE)) \ 1152 ? (((__CHANNEL__) == TIM_CHANNEL_3) || ((__CHANNEL__) == TIM_CHANNEL_4)) : (1 == 1))) 1153 1154 #define IS_TIM_PULSEONCOMPARE_CHANNEL(__CHANNEL__) \ 1155 (((__CHANNEL__) == TIM_CHANNEL_3) || \ 1156 ((__CHANNEL__) == TIM_CHANNEL_4)) 1157 1158 #define IS_TIM_PULSEONCOMPARE_INSTANCE(INSTANCE) IS_TIM_CC3_INSTANCE(INSTANCE) 1159 1160 #define IS_TIM_PULSEONCOMPARE_WIDTH(__WIDTH__) ((__WIDTH__) <= 0xFFU) 1161 1162 #define IS_TIM_PULSEONCOMPARE_WIDTHPRESCALER(__PRESCALER__) ((__PRESCALER__) <= 0x7U) 1163 1164 #define IS_TIM_SLAVE_PRELOAD_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_SMS_PRELOAD_SOURCE_UPDATE) \ 1165 || ((__SOURCE__) == TIM_SMS_PRELOAD_SOURCE_INDEX)) 1166 1167 #define IS_TIM_ENCODERINDEX_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ENCODERINDEX_POLARITY_INVERTED) || \ 1168 ((__POLARITY__) == TIM_ENCODERINDEX_POLARITY_NONINVERTED)) 1169 1170 #define IS_TIM_ENCODERINDEX_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV1) || \ 1171 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV2) || \ 1172 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV4) || \ 1173 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV8)) 1174 1175 #define IS_TIM_ENCODERINDEX_FILTER(__FILTER__) ((__FILTER__) <= 0xFUL) 1176 1177 #define IS_TIM_ENCODERINDEX_POSITION(__POSITION__) (((__POSITION__) == TIM_ENCODERINDEX_POSITION_00) || \ 1178 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_01) || \ 1179 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_10) || \ 1180 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_11) || \ 1181 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_0) || \ 1182 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_1)) 1183 1184 #define IS_TIM_ENCODERINDEX_DIRECTION(__DIRECTION__) (((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP_DOWN) || \ 1185 ((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP) || \ 1186 ((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_DOWN)) 1187 1188 #define IS_TIM_ENCODERINDEX_BLANKING(__BLANKING__) (((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_DISABLE) || \ 1189 ((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_TI3) || \ 1190 ((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_TI4)) 1191 1192 /** 1193 * @} 1194 */ 1195 /* End of private macro ------------------------------------------------------*/ 1196 1197 /* Exported functions --------------------------------------------------------*/ 1198 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 1199 * @{ 1200 */ 1201 1202 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 1203 * @brief Timer Hall Sensor functions 1204 * @{ 1205 */ 1206 /* Timer Hall Sensor functions **********************************************/ 1207 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig); 1208 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 1209 1210 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 1211 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 1212 1213 /* Blocking mode: Polling */ 1214 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 1215 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 1216 /* Non-Blocking mode: Interrupt */ 1217 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 1218 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 1219 /* Non-Blocking mode: DMA */ 1220 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 1221 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 1222 /** 1223 * @} 1224 */ 1225 1226 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 1227 * @brief Timer Complementary Output Compare functions 1228 * @{ 1229 */ 1230 /* Timer Complementary Output Compare functions *****************************/ 1231 /* Blocking mode: Polling */ 1232 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 1233 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 1234 1235 /* Non-Blocking mode: Interrupt */ 1236 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 1237 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 1238 1239 /* Non-Blocking mode: DMA */ 1240 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, 1241 uint16_t Length); 1242 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 1243 /** 1244 * @} 1245 */ 1246 1247 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 1248 * @brief Timer Complementary PWM functions 1249 * @{ 1250 */ 1251 /* Timer Complementary PWM functions ****************************************/ 1252 /* Blocking mode: Polling */ 1253 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 1254 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 1255 1256 /* Non-Blocking mode: Interrupt */ 1257 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 1258 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 1259 /* Non-Blocking mode: DMA */ 1260 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, 1261 uint16_t Length); 1262 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 1263 /** 1264 * @} 1265 */ 1266 1267 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 1268 * @brief Timer Complementary One Pulse functions 1269 * @{ 1270 */ 1271 /* Timer Complementary One Pulse functions **********************************/ 1272 /* Blocking mode: Polling */ 1273 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 1274 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 1275 1276 /* Non-Blocking mode: Interrupt */ 1277 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 1278 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 1279 /** 1280 * @} 1281 */ 1282 1283 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 1284 * @brief Peripheral Control functions 1285 * @{ 1286 */ 1287 /* Extended Control functions ************************************************/ 1288 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 1289 uint32_t CommutationSource); 1290 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 1291 uint32_t CommutationSource); 1292 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 1293 uint32_t CommutationSource); 1294 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 1295 const TIM_MasterConfigTypeDef *sMasterConfig); 1296 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 1297 const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 1298 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, 1299 const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); 1300 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); 1301 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 1302 HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel); 1303 1304 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput); 1305 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(const TIM_HandleTypeDef *htim, uint32_t BreakInput); 1306 HAL_StatusTypeDef HAL_TIMEx_DitheringEnable(TIM_HandleTypeDef *htim); 1307 HAL_StatusTypeDef HAL_TIMEx_DitheringDisable(TIM_HandleTypeDef *htim); 1308 HAL_StatusTypeDef HAL_TIMEx_OC_ConfigPulseOnCompare(TIM_HandleTypeDef *htim, uint32_t PulseWidthPrescaler, 1309 uint32_t PulseWidth); 1310 HAL_StatusTypeDef HAL_TIMEx_ConfigSlaveModePreload(TIM_HandleTypeDef *htim, uint32_t Source); 1311 HAL_StatusTypeDef HAL_TIMEx_EnableSlaveModePreload(TIM_HandleTypeDef *htim); 1312 HAL_StatusTypeDef HAL_TIMEx_DisableSlaveModePreload(TIM_HandleTypeDef *htim); 1313 HAL_StatusTypeDef HAL_TIMEx_EnableDeadTimePreload(TIM_HandleTypeDef *htim); 1314 HAL_StatusTypeDef HAL_TIMEx_DisableDeadTimePreload(TIM_HandleTypeDef *htim); 1315 HAL_StatusTypeDef HAL_TIMEx_ConfigDeadTime(TIM_HandleTypeDef *htim, uint32_t Deadtime); 1316 HAL_StatusTypeDef HAL_TIMEx_ConfigAsymmetricalDeadTime(TIM_HandleTypeDef *htim, uint32_t FallingDeadtime); 1317 HAL_StatusTypeDef HAL_TIMEx_EnableAsymmetricalDeadTime(TIM_HandleTypeDef *htim); 1318 HAL_StatusTypeDef HAL_TIMEx_DisableAsymmetricalDeadTime(TIM_HandleTypeDef *htim); 1319 HAL_StatusTypeDef HAL_TIMEx_ConfigEncoderIndex(TIM_HandleTypeDef *htim, 1320 TIMEx_EncoderIndexConfigTypeDef *sEncoderIndexConfig); 1321 HAL_StatusTypeDef HAL_TIMEx_EnableEncoderIndex(TIM_HandleTypeDef *htim); 1322 HAL_StatusTypeDef HAL_TIMEx_DisableEncoderIndex(TIM_HandleTypeDef *htim); 1323 HAL_StatusTypeDef HAL_TIMEx_EnableEncoderFirstIndex(TIM_HandleTypeDef *htim); 1324 HAL_StatusTypeDef HAL_TIMEx_DisableEncoderFirstIndex(TIM_HandleTypeDef *htim); 1325 /** 1326 * @} 1327 */ 1328 1329 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 1330 * @brief Extended Callbacks functions 1331 * @{ 1332 */ 1333 /* Extended Callback **********************************************************/ 1334 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 1335 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 1336 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 1337 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim); 1338 void HAL_TIMEx_EncoderIndexCallback(TIM_HandleTypeDef *htim); 1339 void HAL_TIMEx_DirectionChangeCallback(TIM_HandleTypeDef *htim); 1340 void HAL_TIMEx_IndexErrorCallback(TIM_HandleTypeDef *htim); 1341 void HAL_TIMEx_TransitionErrorCallback(TIM_HandleTypeDef *htim); 1342 /** 1343 * @} 1344 */ 1345 1346 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 1347 * @brief Extended Peripheral State functions 1348 * @{ 1349 */ 1350 /* Extended Peripheral State functions ***************************************/ 1351 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim); 1352 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN); 1353 /** 1354 * @} 1355 */ 1356 1357 /** 1358 * @} 1359 */ 1360 /* End of exported functions -------------------------------------------------*/ 1361 1362 /* Private functions----------------------------------------------------------*/ 1363 /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions 1364 * @{ 1365 */ 1366 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 1367 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 1368 /** 1369 * @} 1370 */ 1371 /* End of private functions --------------------------------------------------*/ 1372 1373 /** 1374 * @} 1375 */ 1376 1377 /** 1378 * @} 1379 */ 1380 1381 #ifdef __cplusplus 1382 } 1383 #endif 1384 1385 1386 #endif /* STM32H5xx_HAL_TIM_EX_H */ 1387
