1 /** 2 ****************************************************************************** 3 * @file stm32wbaxx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBAxx_HAL_PWR_H 21 #define STM32WBAxx_HAL_PWR_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif /* __cplusplus */ 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbaxx_hal_def.h" 29 30 /** @addtogroup STM32WBAxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup PWR 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 40 /** @defgroup PWR_Exported_Types PWR Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief PWR PVD configuration structure definition 46 */ 47 typedef struct 48 { 49 uint32_t PVDLevel; /*!< Specifies the PVD detection level. 50 This parameter can be a value of 51 @ref PWR_PVD_Detection_Level. */ 52 53 uint32_t Mode; /*!< Specifies the operating mode for the selected pins. 54 This parameter can be a value of @ref PWR_PVD_Mode. */ 55 } PWR_PVDTypeDef; 56 /** 57 * @} 58 */ 59 60 /* Exported constants --------------------------------------------------------*/ 61 62 /** @defgroup PWR_Exported_Constants PWR Exported Constants 63 * @{ 64 */ 65 66 /** @defgroup PWR_PVD_Detection_Level Programmable Voltage Detection Level 67 * @{ 68 */ 69 #define PWR_PVDLEVEL_0 0x00000000UL /*!< PVD threshold around 2.0 V */ 70 #define PWR_PVDLEVEL_1 (PWR_SVMCR_PVDLS_0) /*!< PVD threshold around 2.2 V */ 71 #define PWR_PVDLEVEL_2 (PWR_SVMCR_PVDLS_1) /*!< PVD threshold around 2.4 V */ 72 #define PWR_PVDLEVEL_3 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_1) /*!< PVD threshold around 2.5 V */ 73 #define PWR_PVDLEVEL_4 (PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.6 V */ 74 #define PWR_PVDLEVEL_5 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.8 V */ 75 #define PWR_PVDLEVEL_6 (PWR_SVMCR_PVDLS_1 | PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.9 V */ 76 #define PWR_PVDLEVEL_7 (PWR_SVMCR_PVDLS) /*!< External input analog voltage 77 (compared internally to VREFINT) */ 78 /** 79 * @} 80 */ 81 82 /** @defgroup PWR_PVD_Mode PWR PVD Mode 83 * @{ 84 */ 85 #define PWR_PVD_MODE_NORMAL (0x00U) /*!< Basic Mode is used */ 86 #define PWR_PVD_MODE_IT_RISING (0x05U) /*!< External Interrupt Mode with Rising edge trigger detection */ 87 #define PWR_PVD_MODE_IT_FALLING (0x06U) /*!< External Interrupt Mode with Falling edge trigger detection */ 88 #define PWR_PVD_MODE_IT_RISING_FALLING (0x07U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 89 #define PWR_PVD_MODE_EVENT_RISING (0x09U) /*!< Event Mode with Rising edge trigger detection */ 90 #define PWR_PVD_MODE_EVENT_FALLING (0x0AU) /*!< Event Mode with Falling edge trigger detection */ 91 #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x0BU) /*!< Event Mode with Rising/Falling edge trigger detection */ 92 /** 93 * @} 94 */ 95 96 /** @defgroup PWR_Regulator_In_LowPower_Mode PWR Regulator State in Sleep/Stop Mode 97 * @{ 98 */ 99 #define PWR_MAINREGULATOR_ON (0x00U) /*!< Main Regulator ON in Run Mode */ 100 #define PWR_LOWPOWERREGULATOR_ON (PWR_CR1_LPMS_0) /*!< Main Regulator ON in Low Power Mode */ 101 /** 102 * @} 103 */ 104 105 /** @defgroup PWR_Low_Power_Mode_Selection PWR Low Power Mode Selection 106 * @{ 107 */ 108 #define PWR_LOWPOWERMODE_STOP0 (0x00000000U) /*!< Stop 0: stop mode with main regulator */ 109 #define PWR_LOWPOWERMODE_STOP1 (PWR_CR1_LPMS_0) /*!< Stop 1: stop mode with low power regulator */ 110 #define PWR_LOWPOWERMODE_STANDBY (PWR_CR1_LPMS_2) /*!< Standby mode */ 111 /** 112 * @} 113 */ 114 115 /** @defgroup PWR_Sleep_Mode_Entry PWR Sleep Mode Entry 116 * @{ 117 */ 118 #define PWR_SLEEPENTRY_WFI (0x01U) /*!< Wait For Interruption instruction to enter Sleep mode */ 119 #define PWR_SLEEPENTRY_WFE (0x02U) /*!< Wait For Event instruction to enter Sleep mode */ 120 /** 121 * @} 122 */ 123 124 /** @defgroup PWR_Stop_Mode_Entry PWR Stop Mode Entry 125 * @{ 126 */ 127 #define PWR_STOPENTRY_WFI (0x01U) /*!< Wait For Interruption instruction to enter Stop mode */ 128 #define PWR_STOPENTRY_WFE (0x02U) /*!< Wait For Event instruction to enter Stop mode */ 129 /** 130 * @} 131 */ 132 133 /** @defgroup PWR_Flags PWR Flags 134 * @{ 135 */ 136 #define PWR_FLAG_VOSRDY (1U) /*!< Voltage scaling ready flag */ 137 #define PWR_FLAG_STOPF (2U) /*!< Stop flag */ 138 #define PWR_FLAG_SBF (3U) /*!< Standby flag */ 139 #define PWR_FLAG_ACTVOSRDY (4U) /*!< Currently applied VOS ready flag */ 140 #define PWR_FLAG_PVDO (5U) /*!< VDD voltage detector output flag */ 141 #if defined(PWR_SVMSR_REGS) 142 #define PWR_FLAG_REGS (6U) /*!< Regulator selection flag */ 143 #endif /* defined(PWR_SVMSR_REGS) */ 144 #define PWR_FLAG_REGPARDYVDDRFPA (7U) /*!< Ready bit for VDDHPA voltage level when selecting VDDRFPA input */ 145 #if defined(PWR_RADIOSCR_REGPARDYV11) 146 #define PWR_FLAG_REGPARDYV11 (8U) /*!< Ready bit for VDDHPA voltage level when selecting VDD11 input */ 147 #endif /* defined(PWR_RADIOSCR_REGPARDYV11) */ 148 /** 149 * @} 150 */ 151 152 /** @defgroup PWR_WakeUp_Lines_Flags PWR Wakeup Lines Flags 153 * @{ 154 */ 155 #define PWR_WAKEUP_FLAG1 (0x10U) /*!< Wakeup flag 1 */ 156 #if defined(PWR_WUCR1_WUPEN2) 157 #define PWR_WAKEUP_FLAG2 (0x20U) /*!< Wakeup flag 2 */ 158 #endif /* defined(PWR_WUCR1_WUPEN2) */ 159 #define PWR_WAKEUP_FLAG3 (0x30U) /*!< Wakeup flag 3 */ 160 #define PWR_WAKEUP_FLAG4 (0x40U) /*!< Wakeup flag 4 */ 161 #if defined(PWR_WUCR1_WUPEN5) 162 #define PWR_WAKEUP_FLAG5 (0x50U) /*!< Wakeup flag 5 */ 163 #endif /* defined(PWR_WUCR1_WUPEN5) */ 164 #define PWR_WAKEUP_FLAG6 (0x60U) /*!< Wakeup flag 6 */ 165 #define PWR_WAKEUP_FLAG7 (0x70U) /*!< Wakeup flag 7 */ 166 #define PWR_WAKEUP_FLAG8 (0x80U) /*!< Wakeup flag 8 */ 167 #define PWR_WAKEUP_ALL_FLAG (0x90U) /*!< Wakeup flag all */ 168 /** 169 * @} 170 */ 171 172 /** @defgroup PWR_WakeUp_Pin_High_Polarity PWR Wake Up Pins High Polarity 173 * @{ 174 */ 175 #define PWR_WAKEUP_PIN1_HIGH_0 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_SOURCE_SELECTION_0) /*!< PA0 : Wakeup pin 1 (high polarity) */ 176 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 177 #define PWR_WAKEUP_PIN1_HIGH_1 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_SOURCE_SELECTION_1) /*!< PB2 : Wakeup pin 1 (high polarity) */ 178 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 179 180 #if defined(PWR_WUCR1_WUPEN2) 181 #define PWR_WAKEUP_PIN2_HIGH_0 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_SOURCE_SELECTION_0) /*!< PA4 : Wakeup pin 2 (high polarity) */ 182 #define PWR_WAKEUP_PIN2_HIGH_1 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_SOURCE_SELECTION_1) /*!< PC13 : Wakeup pin 2 (high polarity) */ 183 #endif /* defined(PWR_WUCR1_WUPEN2) */ 184 185 #define PWR_WAKEUP_PIN3_HIGH_1 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_SOURCE_SELECTION_1) /*!< PA1 : Wakeup pin 3 (high polarity) */ 186 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 187 #define PWR_WAKEUP_PIN3_HIGH_2 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_SOURCE_SELECTION_2) /*!< PB6 : Wakeup pin 3 (high polarity) */ 188 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 189 190 #define PWR_WAKEUP_PIN4_HIGH_0 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_SOURCE_SELECTION_0) /*!< PA2 : Wakeup pin 4 (high polarity) */ 191 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 192 #define PWR_WAKEUP_PIN4_HIGH_1 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_SOURCE_SELECTION_1) /*!< PB1 : Wakeup pin 4 (high polarity) */ 193 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 194 195 #if defined(PWR_WUCR1_WUPEN5) 196 #define PWR_WAKEUP_PIN5_HIGH_1 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_SOURCE_SELECTION_1) /*!< PA3 : Wakeup pin 5 (high polarity) */ 197 #define PWR_WAKEUP_PIN5_HIGH_2 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_SOURCE_SELECTION_2) /*!< PB7 : Wakeup pin 5 (high polarity) */ 198 #endif /* defined(PWR_WUCR1_WUPEN5) */ 199 200 #define PWR_WAKEUP_PIN6_HIGH_0 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_SOURCE_SELECTION_0) /*!< PA12 : Wakeup pin 6 (high polarity) */ 201 #define PWR_WAKEUP_PIN6_HIGH_1 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_SOURCE_SELECTION_1) /*!< PA5 : Wakeup pin 6 (high polarity) */ 202 #define PWR_WAKEUP_PIN6_HIGH_3 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 6 (high polarity) */ 203 204 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 205 #define PWR_WAKEUP_PIN7_HIGH_0 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_SOURCE_SELECTION_0) /*!< PB14 : Wakeup pin 7 (high polarity) */ 206 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 207 #define PWR_WAKEUP_PIN7_HIGH_1 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_SOURCE_SELECTION_1) /*!< PA6 : Wakeup pin 7 (high polarity) */ 208 #define PWR_WAKEUP_PIN7_HIGH_3 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 7 (high polarity) */ 209 210 #define PWR_WAKEUP_PIN8_HIGH_1 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_SOURCE_SELECTION_1) /*!< PA7 : Wakeup pin 8 (high polarity) */ 211 #define PWR_WAKEUP_PIN8_HIGH_2 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_SOURCE_SELECTION_2) /*!< PB9 : Wakeup pin 8 (high polarity) */ 212 #define PWR_WAKEUP_PIN8_HIGH_3 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_SOURCE_SELECTION_3) /*!< TAMP : Wakeup pin 8 (high polarity) */ 213 /** 214 * @} 215 */ 216 217 /** @defgroup PWR_WakeUp_Pin_Low_Polarity PWR Wake Up Pins Low Polarity 218 * @{ 219 */ 220 #define PWR_WAKEUP_PIN1_LOW_0 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_POLARITY_LOW | PWR_WAKEUP1_SOURCE_SELECTION_0) /*!< PA0 : Wakeup pin 1 (low polarity) */ 221 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 222 #define PWR_WAKEUP_PIN1_LOW_1 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_POLARITY_LOW | PWR_WAKEUP1_SOURCE_SELECTION_1) /*!< PB2 : Wakeup pin 1 (low polarity) */ 223 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 224 225 #if defined(PWR_WUCR1_WUPEN2) 226 #define PWR_WAKEUP_PIN2_LOW_0 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_POLARITY_LOW | PWR_WAKEUP2_SOURCE_SELECTION_0) /*!< PA4 : Wakeup pin 2 (low polarity) */ 227 #define PWR_WAKEUP_PIN2_LOW_1 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_POLARITY_LOW | PWR_WAKEUP2_SOURCE_SELECTION_1) /*!< PC13 : Wakeup pin 2 (low polarity) */ 228 #endif /* defined(PWR_WUCR1_WUPEN2) */ 229 230 #define PWR_WAKEUP_PIN3_LOW_1 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_POLARITY_LOW | PWR_WAKEUP3_SOURCE_SELECTION_1) /*!< PA1 : Wakeup pin 3 (low polarity) */ 231 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 232 #define PWR_WAKEUP_PIN3_LOW_2 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_POLARITY_LOW | PWR_WAKEUP3_SOURCE_SELECTION_2) /*!< PB6 : Wakeup pin 3 (low polarity) */ 233 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 234 235 #define PWR_WAKEUP_PIN4_LOW_0 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_POLARITY_LOW | PWR_WAKEUP4_SOURCE_SELECTION_0) /*!< PA2 : Wakeup pin 4 (low polarity) */ 236 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 237 #define PWR_WAKEUP_PIN4_LOW_1 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_POLARITY_LOW | PWR_WAKEUP4_SOURCE_SELECTION_1) /*!< PB1 : Wakeup pin 4 (low polarity) */ 238 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 239 240 #if defined(PWR_WUCR1_WUPEN5) 241 #define PWR_WAKEUP_PIN5_LOW_1 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_POLARITY_LOW | PWR_WAKEUP5_SOURCE_SELECTION_1) /*!< PA3 : Wakeup pin 5 (low polarity) */ 242 #define PWR_WAKEUP_PIN5_LOW_2 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_POLARITY_LOW | PWR_WAKEUP5_SOURCE_SELECTION_2) /*!< PB7 : Wakeup pin 5 (low polarity) */ 243 #endif /* defined(PWR_WUCR1_WUPEN5) */ 244 245 #define PWR_WAKEUP_PIN6_LOW_0 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_POLARITY_LOW | PWR_WAKEUP6_SOURCE_SELECTION_0) /*!< PA12 : Wakeup pin 6 (low polarity) */ 246 #define PWR_WAKEUP_PIN6_LOW_1 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_POLARITY_LOW | PWR_WAKEUP6_SOURCE_SELECTION_1) /*!< PA5 : Wakeup pin 6 (low polarity) */ 247 #define PWR_WAKEUP_PIN6_LOW_3 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_POLARITY_LOW | PWR_WAKEUP6_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 6 (low polarity) */ 248 249 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 250 #define PWR_WAKEUP_PIN7_LOW_0 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_POLARITY_LOW | PWR_WAKEUP7_SOURCE_SELECTION_0) /*!< PB14 : Wakeup pin 7 (low polarity) */ 251 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 252 #define PWR_WAKEUP_PIN7_LOW_1 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_POLARITY_LOW | PWR_WAKEUP7_SOURCE_SELECTION_1) /*!< PA6 : Wakeup pin 7 (low polarity) */ 253 #define PWR_WAKEUP_PIN7_LOW_3 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_POLARITY_LOW | PWR_WAKEUP7_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 7 (low polarity) */ 254 255 #define PWR_WAKEUP_PIN8_LOW_1 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_POLARITY_LOW | PWR_WAKEUP8_SOURCE_SELECTION_1) /*!< PA7 : Wakeup pin 8 (low polarity) */ 256 #define PWR_WAKEUP_PIN8_LOW_2 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_POLARITY_LOW | PWR_WAKEUP8_SOURCE_SELECTION_2) /*!< PB9 : Wakeup pin 8 (low polarity) */ 257 #define PWR_WAKEUP_PIN8_LOW_3 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_POLARITY_LOW | PWR_WAKEUP8_SOURCE_SELECTION_3) /*!< TAMP : Wakeup pin 8 (low polarity) */ 258 /** 259 * @} 260 */ 261 262 /** @defgroup PWR_WakeUp_Pins PWR Wake Up Pins (Default polarity and default pin selection) 263 * @{ 264 */ 265 #define PWR_WAKEUP_PIN1 (PWR_WUCR1_WUPEN1) /*!< PA0 : Wakeup pin 1 (high polarity) */ 266 #if defined(PWR_WUCR1_WUPEN2) 267 #define PWR_WAKEUP_PIN2 (PWR_WUCR1_WUPEN2) /*!< PA4 : Wakeup pin 2 (high polarity) */ 268 #endif /* defined(PWR_WUCR1_WUPEN2) */ 269 #define PWR_WAKEUP_PIN3 (PWR_WUCR1_WUPEN3) /*!< reserved */ 270 #define PWR_WAKEUP_PIN4 (PWR_WUCR1_WUPEN4) /*!< PA2 : Wakeup pin 4 (high polarity) */ 271 #if defined(PWR_WUCR1_WUPEN5) 272 #define PWR_WAKEUP_PIN5 (PWR_WUCR1_WUPEN5) /*!< reserved */ 273 #endif /* defined(PWR_WUCR1_WUPEN5) */ 274 #define PWR_WAKEUP_PIN6 (PWR_WUCR1_WUPEN6) /*!< PA12 : Wakeup pin 6 (high polarity) */ 275 #define PWR_WAKEUP_PIN7 (PWR_WUCR1_WUPEN7) /*!< PB14 : Wakeup pin 7 (high polarity) */ 276 #define PWR_WAKEUP_PIN8 (PWR_WUCR1_WUPEN8) /*!< reserved */ 277 /** 278 * @} 279 */ 280 281 #if defined(PWR_SECCFGR_LPMSEC) 282 /** @defgroup PWR_Items PWR Items 283 * @{ 284 */ 285 #define PWR_WKUP1 (PWR_SECCFGR_WUP1SEC) /*!< WUP1 secure protection */ 286 #if defined(PWR_WUCR1_WUPEN2) 287 #define PWR_WKUP2 (PWR_SECCFGR_WUP2SEC) /*!< WUP2 secure protection */ 288 #endif /* defined(PWR_WUCR1_WUPEN2) */ 289 #define PWR_WKUP3 (PWR_SECCFGR_WUP3SEC) /*!< WUP3 secure protection */ 290 #define PWR_WKUP4 (PWR_SECCFGR_WUP4SEC) /*!< WUP4 secure protection */ 291 #if defined(PWR_WUCR1_WUPEN5) 292 #define PWR_WKUP5 (PWR_SECCFGR_WUP5SEC) /*!< WUP5 secure protection */ 293 #endif /* defined(PWR_WUCR1_WUPEN5) */ 294 #define PWR_WKUP6 (PWR_SECCFGR_WUP6SEC) /*!< WUP6 secure protection */ 295 #define PWR_WKUP7 (PWR_SECCFGR_WUP7SEC) /*!< WUP7 secure protection */ 296 #define PWR_WKUP8 (PWR_SECCFGR_WUP8SEC) /*!< WUP8 secure protection */ 297 #define PWR_LPM (PWR_SECCFGR_LPMSEC) /*!< Low power modes secure protection */ 298 #define PWR_VDM (PWR_SECCFGR_VDMSEC) /*!< Voltage detection and monitoring secure protection */ 299 #define PWR_VB (PWR_SECCFGR_VBSEC) /*!< Backup domain secure protection */ 300 #if defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) 301 #define PWR_ALL (PWR_WKUP1 | PWR_WKUP2 | PWR_WKUP3 | PWR_WKUP4 | \ 302 PWR_WKUP5 | PWR_WKUP7 | PWR_WKUP6 | PWR_WKUP8 | \ 303 PWR_LPM | PWR_VDM | PWR_VB) 304 #else 305 #if !defined(PWR_WUCR1_WUPEN5) 306 #define PWR_ALL (PWR_WKUP1 | PWR_WKUP2 | PWR_WKUP3 | PWR_WKUP4 | \ 307 PWR_WKUP7 | PWR_WKUP6 | PWR_WKUP8 | \ 308 PWR_LPM | PWR_VDM | PWR_VB) 309 #elif !defined(PWR_WUCR1_WUPEN2) 310 #define PWR_ALL (PWR_WKUP1 | PWR_WKUP3 | PWR_WKUP4 | \ 311 PWR_WKUP5 | PWR_WKUP7 | PWR_WKUP6 | PWR_WKUP8 | \ 312 PWR_LPM | PWR_VDM | PWR_VB) 313 #else 314 #define PWR_ALL (PWR_WKUP1 | PWR_WKUP3 | PWR_WKUP4 | \ 315 PWR_WKUP7 | PWR_WKUP6 | PWR_WKUP8 | \ 316 PWR_LPM | PWR_VDM | PWR_VB) 317 #endif /* !defined(PWR_WUCR1_WUPEN5) */ 318 #endif /* defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) */ 319 /** 320 * @} 321 */ 322 #endif /* defined(PWR_SECCFGR_LPMSEC) */ 323 324 #if defined(PWR_PRIVCFGR_SPRIV) 325 /** @defgroup PWR_Attributes PWR Attributes 326 * @brief PWR Privilege/NPrivilege and Secure/NSecure Attributes 327 * @{ 328 */ 329 #define PWR_NSEC_PRIV (PWR_ITEM_ATTR_NSEC_PRIV_MASK | 0x01U) /*!< NSecure and Privileged attribute */ 330 #define PWR_NSEC_NPRIV (PWR_ITEM_ATTR_NSEC_PRIV_MASK) /*!< NSecure and NPrivileged attribute */ 331 #define PWR_SEC_PRIV (PWR_ITEM_ATTR_SEC_PRIV_MASK | 0x02U) /*!< Secure and Privileged attribute */ 332 #define PWR_SEC_NPRIV (PWR_ITEM_ATTR_SEC_PRIV_MASK) /*!< Secure and NPrivileged attribute */ 333 /** 334 * @} 335 */ 336 #endif /* defined(PWR_PRIVCFGR_SPRIV) */ 337 338 /** 339 * @} 340 */ 341 342 /* Exported macros -----------------------------------------------------------*/ 343 344 /** @defgroup PWR_Exported_Macros PWR Exported Macros 345 * @{ 346 */ 347 348 /** @brief Check PWR flags are set or not. 349 * @param __FLAG__ : Specifies the flag to check. 350 * This parameter can be one of the following values when available : 351 * @arg @ref PWR_FLAG_VOSRDY : Voltage scaling ready flag. 352 * Indicates that the Vcore level at or above VOS selected level. 353 * @arg @ref PWR_FLAG_STOPF : Stop flag. 354 * Indicates that the device was resumed from Stop mode. 355 * @arg @ref PWR_FLAG_SBF : Standby flag. 356 * Indicates that the device was resumed from Standby mode. 357 * @arg @ref PWR_FLAG_ACTVOSRDY : Currently applied VOS ready flag. 358 * Indicates that Vcore is equal to the current 359 * voltage scaling provided by ACTVOS. 360 * @arg @ref PWR_FLAG_PVDO VDD : Voltage detector output flag. 361 * Indicates that Vdd is equal or above 362 * the PVD threshold selected by PVDLS. 363 * @arg @ref PWR_FLAG_REGS : Regulator selection flag. 364 * Indicates the regulator selected.(*) 365 * @arg @ref PWR_FLAG_REGPARDYVDDRFPA : Ready bit for VDDHPA voltage level when selecting VDDRFPA 366 * input. 367 * Indicates VDDHPA voltage level is ready. 368 * @arg @ref PWR_FLAG_REGPARDYV11 : Ready bit for VDDHPA voltage level when selecting VDD11 369 * input. 370 * Indicates VDDHPA voltage level is ready.(*) 371 * @arg @ref PWR_WAKEUP_FLAG1 : Wakeup flag 1. 372 * Indicates that a wakeup event was received from the WKUP line 1. 373 * @arg @ref PWR_WAKEUP_FLAG2 : Wakeup flag 2. 374 * Indicates that a wakeup event was received from the WKUP line 2. 375 * @arg @ref PWR_WAKEUP_FLAG3 : Wakeup flag 3. 376 * Indicates that a wakeup event was received from the WKUP line 3. 377 * @arg @ref PWR_WAKEUP_FLAG4 : Wakeup flag 4. 378 * Indicates that a wakeup event was received from the WKUP line 4. 379 * @arg @ref PWR_WAKEUP_FLAG5 : Wakeup flag 5. 380 * Indicates that a wakeup event was received from the WKUP line 5. 381 * @arg @ref PWR_WAKEUP_FLAG6 : Wakeup flag 6. 382 * Indicates that a wakeup event was received from the WKUP line 6. 383 * @arg @ref PWR_WAKEUP_FLAG7 : Wakeup flag 7. 384 * Indicates that a wakeup event was received from the WKUP line 7. 385 * @arg @ref PWR_WAKEUP_FLAG8 : Wakeup flag 8. 386 * Indicates that a wakeup event was received from the WKUP line 8. 387 * (*) Feature not available on all devices of the family 388 * @retval The state of __FLAG__ (TRUE or FALSE). 389 */ 390 #if defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) 391 #if defined(PWR_FLAG_REGS) 392 #define __HAL_PWR_GET_FLAG(__FLAG__)( \ 393 ((__FLAG__) == PWR_FLAG_VOSRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_VOSRDY)== \ 394 PWR_VOSR_VOSRDY) : \ 395 ((__FLAG__) == PWR_FLAG_STOPF) ? (READ_BIT(PWR->SR, PWR_SR_STOPF)== \ 396 PWR_SR_STOPF) : \ 397 ((__FLAG__) == PWR_FLAG_SBF) ? (READ_BIT(PWR->SR, PWR_SR_SBF)== \ 398 PWR_SR_SBF) : \ 399 ((__FLAG__) == PWR_FLAG_ACTVOSRDY) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_ACTVOSRDY)== \ 400 PWR_SVMSR_ACTVOSRDY): \ 401 ((__FLAG__) == PWR_FLAG_PVDO) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_PVDO)== \ 402 PWR_SVMSR_PVDO) : \ 403 ((__FLAG__) == PWR_FLAG_REGS) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_REGS)== \ 404 PWR_SVMSR_REGS) : \ 405 ((__FLAG__) == PWR_FLAG_REGPARDYVDDRFPA) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYVDDRFPA)== \ 406 PWR_RADIOSCR_REGPARDYVDDRFPA) : \ 407 ((__FLAG__) == PWR_FLAG_REGPARDYV11) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYV11)== \ 408 PWR_RADIOSCR_REGPARDYV11) : \ 409 ((__FLAG__) == PWR_WAKEUP_FLAG1) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF1) == \ 410 PWR_WUSR_WUF1) : \ 411 ((__FLAG__) == PWR_WAKEUP_FLAG2) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF2) == \ 412 PWR_WUSR_WUF2) : \ 413 ((__FLAG__) == PWR_WAKEUP_FLAG3) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF3) == \ 414 PWR_WUSR_WUF3) : \ 415 ((__FLAG__) == PWR_WAKEUP_FLAG4) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF4) == \ 416 PWR_WUSR_WUF4) : \ 417 ((__FLAG__) == PWR_WAKEUP_FLAG5) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF5) == \ 418 PWR_WUSR_WUF5) : \ 419 ((__FLAG__) == PWR_WAKEUP_FLAG6) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF6) == \ 420 PWR_WUSR_WUF6) : \ 421 ((__FLAG__) == PWR_WAKEUP_FLAG7) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF7) == \ 422 PWR_WUSR_WUF7) : \ 423 (READ_BIT(PWR->WUSR, PWR_WUSR_WUF8) == PWR_WUSR_WUF8)) 424 #else 425 #define __HAL_PWR_GET_FLAG(__FLAG__)( \ 426 ((__FLAG__) == PWR_FLAG_VOSRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_VOSRDY)== \ 427 PWR_VOSR_VOSRDY) : \ 428 ((__FLAG__) == PWR_FLAG_STOPF) ? (READ_BIT(PWR->SR, PWR_SR_STOPF)== \ 429 PWR_SR_STOPF) : \ 430 ((__FLAG__) == PWR_FLAG_SBF) ? (READ_BIT(PWR->SR, PWR_SR_SBF)== \ 431 PWR_SR_SBF) : \ 432 ((__FLAG__) == PWR_FLAG_ACTVOSRDY) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_ACTVOSRDY)== \ 433 PWR_SVMSR_ACTVOSRDY): \ 434 ((__FLAG__) == PWR_FLAG_PVDO) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_PVDO)== \ 435 PWR_SVMSR_PVDO) : \ 436 ((__FLAG__) == PWR_FLAG_REGPARDYVDDRFPA) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYVDDRFPA)== \ 437 PWR_RADIOSCR_REGPARDYVDDRFPA) : \ 438 ((__FLAG__) == PWR_WAKEUP_FLAG1) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF1) == \ 439 PWR_WUSR_WUF1) : \ 440 ((__FLAG__) == PWR_WAKEUP_FLAG2) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF2) == \ 441 PWR_WUSR_WUF2) : \ 442 ((__FLAG__) == PWR_WAKEUP_FLAG3) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF3) == \ 443 PWR_WUSR_WUF3) : \ 444 ((__FLAG__) == PWR_WAKEUP_FLAG4) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF4) == \ 445 PWR_WUSR_WUF4) : \ 446 ((__FLAG__) == PWR_WAKEUP_FLAG5) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF5) == \ 447 PWR_WUSR_WUF5) : \ 448 ((__FLAG__) == PWR_WAKEUP_FLAG6) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF6) == \ 449 PWR_WUSR_WUF6) : \ 450 ((__FLAG__) == PWR_WAKEUP_FLAG7) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF7) == \ 451 PWR_WUSR_WUF7) : \ 452 (READ_BIT(PWR->WUSR, PWR_WUSR_WUF8) == PWR_WUSR_WUF8)) 453 #endif /* defined(PWR_FLAG_REGS) */ 454 #else 455 #define __HAL_PWR_GET_FLAG(__FLAG__)( \ 456 ((__FLAG__) == PWR_FLAG_VOSRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_VOSRDY)== \ 457 PWR_VOSR_VOSRDY) : \ 458 ((__FLAG__) == PWR_FLAG_STOPF) ? (READ_BIT(PWR->SR, PWR_SR_STOPF)== \ 459 PWR_SR_STOPF) : \ 460 ((__FLAG__) == PWR_FLAG_SBF) ? (READ_BIT(PWR->SR, PWR_SR_SBF)== \ 461 PWR_SR_SBF) : \ 462 ((__FLAG__) == PWR_FLAG_ACTVOSRDY) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_ACTVOSRDY)== \ 463 PWR_SVMSR_ACTVOSRDY): \ 464 ((__FLAG__) == PWR_FLAG_PVDO) ?(READ_BIT(PWR->SVMSR, PWR_SVMSR_PVDO)== \ 465 PWR_SVMSR_PVDO) : \ 466 ((__FLAG__) == PWR_FLAG_REGPARDYVDDRFPA) ?(READ_BIT(PWR->RADIOSCR, PWR_RADIOSCR_REGPARDYVDDRFPA)== \ 467 PWR_RADIOSCR_REGPARDYVDDRFPA) : \ 468 ((__FLAG__) == PWR_WAKEUP_FLAG1) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF1) == \ 469 PWR_WUSR_WUF1) : \ 470 ((__FLAG__) == PWR_WAKEUP_FLAG3) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF3) == \ 471 PWR_WUSR_WUF3) : \ 472 ((__FLAG__) == PWR_WAKEUP_FLAG4) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF4) == \ 473 PWR_WUSR_WUF4) : \ 474 ((__FLAG__) == PWR_WAKEUP_FLAG6) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF6) == \ 475 PWR_WUSR_WUF6) : \ 476 ((__FLAG__) == PWR_WAKEUP_FLAG7) ?(READ_BIT(PWR->WUSR, PWR_WUSR_WUF7) == \ 477 PWR_WUSR_WUF7) : \ 478 (READ_BIT(PWR->WUSR, PWR_WUSR_WUF8) == PWR_WUSR_WUF8)) 479 #endif /*defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) */ 480 481 /** @brief Clear PWR flags. 482 * @param __FLAG__ : Specifies the flag to clear. 483 * This parameter can be one of the following values when available: 484 * @arg @ref PWR_FLAG_STOPF : Stop flag. 485 * Indicates that the device was resumed from Stop mode. 486 * @arg @ref PWR_FLAG_SBF : Standby flag. 487 * Indicates that the device was resumed from Standby mode. 488 * @arg @ref PWR_WAKEUP_FLAG1 : Wakeup flag 1. 489 * Indicates that a wakeup event was received from the WKUP line 1. 490 * @arg @ref PWR_WAKEUP_FLAG2 : Wakeup flag 2. 491 * Indicates that a wakeup event was received from the WKUP line 2. 492 * @arg @ref PWR_WAKEUP_FLAG3 : Wakeup flag 3. 493 * Indicates that a wakeup event was received from the WKUP line 3. 494 * @arg @ref PWR_WAKEUP_FLAG4 : Wakeup flag 4. 495 * Indicates that a wakeup event was received from the WKUP line 4. 496 * @arg @ref PWR_WAKEUP_FLAG5 : Wakeup flag 5. 497 * Indicates that a wakeup event was received from the WKUP line 5. 498 * @arg @ref PWR_WAKEUP_FLAG6 : Wakeup flag 6. 499 * Indicates that a wakeup event was received from the WKUP line 6. 500 * @arg @ref PWR_WAKEUP_FLAG7 : Wakeup flag 7. 501 * Indicates that a wakeup event was received from the WKUP line 7. 502 * @arg @ref PWR_WAKEUP_FLAG8 : Wakeup flag 8. 503 * Indicates that a wakeup event was received from the WKUP line 8. 504 * @arg @ref PWR_WAKEUP_ALL_FLAG : all Wakeup flags. 505 * @retval None. 506 */ 507 #if defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) 508 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( \ 509 ((__FLAG__) == PWR_FLAG_STOPF) ? (SET_BIT(PWR->SR, PWR_SR_CSSF)) : \ 510 ((__FLAG__) == PWR_FLAG_SBF) ? (SET_BIT(PWR->SR, PWR_SR_CSSF)) : \ 511 ((__FLAG__) == PWR_WAKEUP_FLAG1) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF1)) : \ 512 ((__FLAG__) == PWR_WAKEUP_FLAG2) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF2)) : \ 513 ((__FLAG__) == PWR_WAKEUP_FLAG3) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF3)) : \ 514 ((__FLAG__) == PWR_WAKEUP_FLAG4) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF4)) : \ 515 ((__FLAG__) == PWR_WAKEUP_FLAG5) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF5)) : \ 516 ((__FLAG__) == PWR_WAKEUP_FLAG6) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF6)) : \ 517 ((__FLAG__) == PWR_WAKEUP_FLAG7) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF7)) : \ 518 ((__FLAG__) == PWR_WAKEUP_FLAG8) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF8)) : \ 519 (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF))) 520 #else 521 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( \ 522 ((__FLAG__) == PWR_FLAG_STOPF) ? (SET_BIT(PWR->SR, PWR_SR_CSSF)) : \ 523 ((__FLAG__) == PWR_FLAG_SBF) ? (SET_BIT(PWR->SR, PWR_SR_CSSF)) : \ 524 ((__FLAG__) == PWR_WAKEUP_FLAG1) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF1)) : \ 525 ((__FLAG__) == PWR_WAKEUP_FLAG3) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF3)) : \ 526 ((__FLAG__) == PWR_WAKEUP_FLAG4) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF4)) : \ 527 ((__FLAG__) == PWR_WAKEUP_FLAG6) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF6)) : \ 528 ((__FLAG__) == PWR_WAKEUP_FLAG7) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF7)) : \ 529 ((__FLAG__) == PWR_WAKEUP_FLAG8) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF8)) : \ 530 (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF))) 531 #endif /* defined(PWR_WUCR1_WUPEN2) && defined(PWR_WUCR1_WUPEN5) */ 532 533 /** 534 * @brief Enable the PVD Extended Interrupt Line. 535 * @retval None. 536 */ 537 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 538 539 /** 540 * @brief Disable the PVD Extended Interrupt Line. 541 * @retval None. 542 */ 543 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 544 545 /** 546 * @brief Enable the PVD Event Line. 547 * @retval None. 548 */ 549 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_PVD) 550 551 /** 552 * @brief Disable the PVD Event Line. 553 * @retval None. 554 */ 555 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_PVD) 556 557 /** 558 * @brief Enable the PVD Extended Interrupt Rising Trigger. 559 * @retval None. 560 */ 561 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 562 563 /** 564 * @brief Disable the PVD Extended Interrupt Rising Trigger. 565 * @retval None. 566 */ 567 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 568 569 /** 570 * @brief Enable the PVD Extended Interrupt Falling Trigger. 571 * @retval None. 572 */ 573 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 574 575 /** 576 * @brief Disable the PVD Extended Interrupt Falling Trigger. 577 * @retval None. 578 */ 579 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 580 581 /** 582 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. 583 * @retval None. 584 */ 585 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 586 do \ 587 { \ 588 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 589 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 590 } while(0) 591 592 /** 593 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 594 * @retval None. 595 */ 596 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 597 do \ 598 { \ 599 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 600 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 601 } while(0) 602 603 /** 604 * @brief Generate a Software Interrupt on selected EXTI line. 605 * @retval None 606 */ 607 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD) 608 609 /** 610 * @brief Check whether or not the PVD EXTI interrupt Rising flag is set. 611 * @retval EXTI PVD Line Status. 612 */ 613 #define __HAL_PWR_PVD_EXTI_GET_RISING_FLAG() (EXTI->RPR1 & PWR_EXTI_LINE_PVD) 614 615 /** 616 * @brief Check whether or not the PVD EXTI interrupt Falling flag is set. 617 * @retval EXTI PVD Line Status. 618 */ 619 #define __HAL_PWR_PVD_EXTI_GET_FALLING_FLAG() (EXTI->FPR1 & PWR_EXTI_LINE_PVD) 620 621 /** 622 * @brief Clear the PVD EXTI interrupt Rising flag. 623 * @retval None 624 */ 625 #define __HAL_PWR_PVD_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_PVD) 626 627 /** 628 * @brief Clear the PVD EXTI interrupt Falling flag. 629 * @retval None 630 */ 631 #define __HAL_PWR_PVD_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_PVD) 632 /** 633 * @} 634 */ 635 636 /* Private constants ---------------------------------------------------------*/ 637 638 /** @addtogroup PWR_Private_Constants PWR Private Constants 639 * @{ 640 */ 641 /* Define PVD extended interrupts and event line */ 642 #define PWR_EXTI_LINE_PVD (0x00010000UL) /*!< PVD EXTI Line */ 643 644 /* Defines wake up lines shift */ 645 #define PWR_WUP_POLARITY_SHIFT (0x08U) /*!< Internal constant used to retrieve wakeup signal polarity */ 646 #define PWR_WUP_SELECT_SIGNAL_SHIFT (0x10U) /*!< Internal constant used to retrieve wakeup signal selection */ 647 648 /* Defines wake up lines mask */ 649 #define PWR_EWUP_MASK (0x000000FFUL) /*!< Internal constant used to retrieve wakeup signal enable */ 650 #define PWR_WUP_POLARITY_MASK (0x0000FF00UL) /*!< Internal constant used to retrieve wakeup signal polarity */ 651 #define PWR_WUP_SELECT_MASK (0xFFFF0000UL) /*!< Internal constant used to retrieve wakeup signal selection */ 652 653 /* Defines wake up lines selection */ 654 #define PWR_WAKEUP1_SOURCE_SELECTION_0 (0U) 655 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 656 #define PWR_WAKEUP1_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL1_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 657 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 658 659 #if defined(PWR_WUCR1_WUPEN2) 660 #define PWR_WAKEUP2_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 661 #define PWR_WAKEUP2_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL2_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 662 #endif /* defined(PWR_WUCR1_WUPEN2) */ 663 664 #define PWR_WAKEUP3_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL3_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 665 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 666 #define PWR_WAKEUP3_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL3_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 667 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 668 669 #define PWR_WAKEUP4_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 670 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 671 #define PWR_WAKEUP4_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL4_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 672 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 673 674 #if defined(PWR_WUCR1_WUPEN5) 675 #define PWR_WAKEUP5_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL5_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 676 #define PWR_WAKEUP5_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL5_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 677 #endif /* defined(PWR_WUCR1_WUPEN5) */ 678 679 #define PWR_WAKEUP6_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 680 #define PWR_WAKEUP6_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL6_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 681 #define PWR_WAKEUP6_SOURCE_SELECTION_3 ((PWR_WUCR3_WUSEL6_0 | PWR_WUCR3_WUSEL6_1) << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 682 683 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) 684 #define PWR_WAKEUP7_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 685 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */ 686 #define PWR_WAKEUP7_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL7_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 687 #define PWR_WAKEUP7_SOURCE_SELECTION_3 ((PWR_WUCR3_WUSEL7_0 | PWR_WUCR3_WUSEL7_1) << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 688 689 #define PWR_WAKEUP8_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL8_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 690 #define PWR_WAKEUP8_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL8_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 691 #define PWR_WAKEUP8_SOURCE_SELECTION_3 ((PWR_WUCR3_WUSEL8_0 | PWR_WUCR3_WUSEL8_1) << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 692 693 /* Defines wake up lines low polarity */ 694 #define PWR_WAKEUP1_POLARITY_LOW (PWR_WUCR2_WUPP1 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 695 #if defined(PWR_WUCR1_WUPEN2) 696 #define PWR_WAKEUP2_POLARITY_LOW (PWR_WUCR2_WUPP2 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 697 #endif /* defined(PWR_WUCR1_WUPEN2) */ 698 #define PWR_WAKEUP3_POLARITY_LOW (PWR_WUCR2_WUPP3 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 699 #define PWR_WAKEUP4_POLARITY_LOW (PWR_WUCR2_WUPP4 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 700 #if defined(PWR_WUCR1_WUPEN5) 701 #define PWR_WAKEUP5_POLARITY_LOW (PWR_WUCR2_WUPP5 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 702 #endif /* defined(PWR_WUCR1_WUPEN5) */ 703 #define PWR_WAKEUP6_POLARITY_LOW (PWR_WUCR2_WUPP6 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 704 #define PWR_WAKEUP7_POLARITY_LOW (PWR_WUCR2_WUPP7 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 705 #define PWR_WAKEUP8_POLARITY_LOW (PWR_WUCR2_WUPP8 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 706 707 /* Defines attribute */ 708 #define PWR_ITEM_ATTR_NSEC_PRIV_MASK (0x10U) /*!< NSecure Privilege / NPrivilege attribute item mask */ 709 #define PWR_ITEM_ATTR_SEC_PRIV_MASK (0x20U) /*!< Secure Privilege / NPrivilege attribute item mask */ 710 /** 711 * @} 712 */ 713 714 /* Private macros ------------------------------------------------------------*/ 715 716 /** @addtogroup PWR_Private_Macros PWR Private Macros 717 * @{ 718 */ 719 720 /* Stop mode entry check macro */ 721 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_LOWPOWERMODE_STOP0) || \ 722 ((REGULATOR) == PWR_LOWPOWERMODE_STOP1)) 723 724 725 /* Wake up pins check macro */ 726 #if defined(STM32WBA50xx) 727 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1_HIGH_0) ||\ 728 ((PIN) == PWR_WAKEUP_PIN3_HIGH_1) ||\ 729 ((PIN) == PWR_WAKEUP_PIN4_HIGH_0) ||\ 730 ((PIN) == PWR_WAKEUP_PIN6_HIGH_0) ||\ 731 ((PIN) == PWR_WAKEUP_PIN6_HIGH_1) ||\ 732 ((PIN) == PWR_WAKEUP_PIN6_HIGH_3) ||\ 733 ((PIN) == PWR_WAKEUP_PIN7_HIGH_1) ||\ 734 ((PIN) == PWR_WAKEUP_PIN7_HIGH_3) ||\ 735 ((PIN) == PWR_WAKEUP_PIN8_HIGH_1) ||\ 736 ((PIN) == PWR_WAKEUP_PIN8_HIGH_2) ||\ 737 ((PIN) == PWR_WAKEUP_PIN8_HIGH_3) ||\ 738 ((PIN) == PWR_WAKEUP_PIN1_LOW_0) ||\ 739 ((PIN) == PWR_WAKEUP_PIN3_LOW_1) ||\ 740 ((PIN) == PWR_WAKEUP_PIN4_LOW_0) ||\ 741 ((PIN) == PWR_WAKEUP_PIN6_LOW_0) ||\ 742 ((PIN) == PWR_WAKEUP_PIN6_LOW_1) ||\ 743 ((PIN) == PWR_WAKEUP_PIN6_LOW_3) ||\ 744 ((PIN) == PWR_WAKEUP_PIN7_LOW_1) ||\ 745 ((PIN) == PWR_WAKEUP_PIN7_LOW_3) ||\ 746 ((PIN) == PWR_WAKEUP_PIN8_LOW_1) ||\ 747 ((PIN) == PWR_WAKEUP_PIN8_LOW_2) ||\ 748 ((PIN) == PWR_WAKEUP_PIN8_LOW_3) ||\ 749 ((PIN) == PWR_WAKEUP_PIN1) ||\ 750 ((PIN) == PWR_WAKEUP_PIN3) ||\ 751 ((PIN) == PWR_WAKEUP_PIN4) ||\ 752 ((PIN) == PWR_WAKEUP_PIN6) ||\ 753 ((PIN) == PWR_WAKEUP_PIN7) ||\ 754 ((PIN) == PWR_WAKEUP_PIN8)) 755 #endif /* defined(STM32WBA50xx) */ 756 #if defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) 757 #if defined (STM32WBA55xx) 758 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1_HIGH_0) ||\ 759 ((PIN) == PWR_WAKEUP_PIN1_HIGH_1) ||\ 760 ((PIN) == PWR_WAKEUP_PIN2_HIGH_0) ||\ 761 ((PIN) == PWR_WAKEUP_PIN2_HIGH_1) ||\ 762 ((PIN) == PWR_WAKEUP_PIN3_HIGH_1) ||\ 763 ((PIN) == PWR_WAKEUP_PIN3_HIGH_2) ||\ 764 ((PIN) == PWR_WAKEUP_PIN4_HIGH_0) ||\ 765 ((PIN) == PWR_WAKEUP_PIN4_HIGH_1) ||\ 766 ((PIN) == PWR_WAKEUP_PIN5_HIGH_1) ||\ 767 ((PIN) == PWR_WAKEUP_PIN5_HIGH_2) ||\ 768 ((PIN) == PWR_WAKEUP_PIN6_HIGH_0) ||\ 769 ((PIN) == PWR_WAKEUP_PIN6_HIGH_1) ||\ 770 ((PIN) == PWR_WAKEUP_PIN6_HIGH_3) ||\ 771 ((PIN) == PWR_WAKEUP_PIN7_HIGH_0) ||\ 772 ((PIN) == PWR_WAKEUP_PIN7_HIGH_1) ||\ 773 ((PIN) == PWR_WAKEUP_PIN7_HIGH_3) ||\ 774 ((PIN) == PWR_WAKEUP_PIN8_HIGH_1) ||\ 775 ((PIN) == PWR_WAKEUP_PIN8_HIGH_2) ||\ 776 ((PIN) == PWR_WAKEUP_PIN8_HIGH_3) ||\ 777 ((PIN) == PWR_WAKEUP_PIN1_LOW_0) ||\ 778 ((PIN) == PWR_WAKEUP_PIN1_LOW_1) ||\ 779 ((PIN) == PWR_WAKEUP_PIN2_LOW_0) ||\ 780 ((PIN) == PWR_WAKEUP_PIN2_LOW_1) ||\ 781 ((PIN) == PWR_WAKEUP_PIN3_LOW_1) ||\ 782 ((PIN) == PWR_WAKEUP_PIN3_LOW_2) ||\ 783 ((PIN) == PWR_WAKEUP_PIN4_LOW_0) ||\ 784 ((PIN) == PWR_WAKEUP_PIN4_LOW_1) ||\ 785 ((PIN) == PWR_WAKEUP_PIN5_LOW_1) ||\ 786 ((PIN) == PWR_WAKEUP_PIN5_LOW_2) ||\ 787 ((PIN) == PWR_WAKEUP_PIN6_LOW_0) ||\ 788 ((PIN) == PWR_WAKEUP_PIN6_LOW_1) ||\ 789 ((PIN) == PWR_WAKEUP_PIN6_LOW_3) ||\ 790 ((PIN) == PWR_WAKEUP_PIN7_LOW_0) ||\ 791 ((PIN) == PWR_WAKEUP_PIN7_LOW_1) ||\ 792 ((PIN) == PWR_WAKEUP_PIN7_LOW_3) ||\ 793 ((PIN) == PWR_WAKEUP_PIN8_LOW_1) ||\ 794 ((PIN) == PWR_WAKEUP_PIN8_LOW_2) ||\ 795 ((PIN) == PWR_WAKEUP_PIN8_LOW_3) ||\ 796 ((PIN) == PWR_WAKEUP_PIN1) ||\ 797 ((PIN) == PWR_WAKEUP_PIN2) ||\ 798 ((PIN) == PWR_WAKEUP_PIN3) ||\ 799 ((PIN) == PWR_WAKEUP_PIN4) ||\ 800 ((PIN) == PWR_WAKEUP_PIN5) ||\ 801 ((PIN) == PWR_WAKEUP_PIN6) ||\ 802 ((PIN) == PWR_WAKEUP_PIN7) ||\ 803 ((PIN) == PWR_WAKEUP_PIN8)) 804 #else 805 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1_HIGH_0) ||\ 806 ((PIN) == PWR_WAKEUP_PIN1_HIGH_1) ||\ 807 ((PIN) == PWR_WAKEUP_PIN2_HIGH_1) ||\ 808 ((PIN) == PWR_WAKEUP_PIN3_HIGH_1) ||\ 809 ((PIN) == PWR_WAKEUP_PIN3_HIGH_2) ||\ 810 ((PIN) == PWR_WAKEUP_PIN4_HIGH_0) ||\ 811 ((PIN) == PWR_WAKEUP_PIN4_HIGH_1) ||\ 812 ((PIN) == PWR_WAKEUP_PIN5_HIGH_1) ||\ 813 ((PIN) == PWR_WAKEUP_PIN5_HIGH_2) ||\ 814 ((PIN) == PWR_WAKEUP_PIN6_HIGH_0) ||\ 815 ((PIN) == PWR_WAKEUP_PIN6_HIGH_1) ||\ 816 ((PIN) == PWR_WAKEUP_PIN6_HIGH_3) ||\ 817 ((PIN) == PWR_WAKEUP_PIN7_HIGH_0) ||\ 818 ((PIN) == PWR_WAKEUP_PIN7_HIGH_1) ||\ 819 ((PIN) == PWR_WAKEUP_PIN7_HIGH_3) ||\ 820 ((PIN) == PWR_WAKEUP_PIN8_HIGH_1) ||\ 821 ((PIN) == PWR_WAKEUP_PIN8_HIGH_2) ||\ 822 ((PIN) == PWR_WAKEUP_PIN8_HIGH_3) ||\ 823 ((PIN) == PWR_WAKEUP_PIN1_LOW_0) ||\ 824 ((PIN) == PWR_WAKEUP_PIN1_LOW_1) ||\ 825 ((PIN) == PWR_WAKEUP_PIN2_LOW_1) ||\ 826 ((PIN) == PWR_WAKEUP_PIN3_LOW_1) ||\ 827 ((PIN) == PWR_WAKEUP_PIN3_LOW_2) ||\ 828 ((PIN) == PWR_WAKEUP_PIN4_LOW_0) ||\ 829 ((PIN) == PWR_WAKEUP_PIN4_LOW_1) ||\ 830 ((PIN) == PWR_WAKEUP_PIN5_LOW_1) ||\ 831 ((PIN) == PWR_WAKEUP_PIN5_LOW_2) ||\ 832 ((PIN) == PWR_WAKEUP_PIN6_LOW_0) ||\ 833 ((PIN) == PWR_WAKEUP_PIN6_LOW_1) ||\ 834 ((PIN) == PWR_WAKEUP_PIN6_LOW_3) ||\ 835 ((PIN) == PWR_WAKEUP_PIN7_LOW_0) ||\ 836 ((PIN) == PWR_WAKEUP_PIN7_LOW_1) ||\ 837 ((PIN) == PWR_WAKEUP_PIN7_LOW_3) ||\ 838 ((PIN) == PWR_WAKEUP_PIN8_LOW_1) ||\ 839 ((PIN) == PWR_WAKEUP_PIN8_LOW_2) ||\ 840 ((PIN) == PWR_WAKEUP_PIN8_LOW_3) ||\ 841 ((PIN) == PWR_WAKEUP_PIN1) ||\ 842 ((PIN) == PWR_WAKEUP_PIN2) ||\ 843 ((PIN) == PWR_WAKEUP_PIN3) ||\ 844 ((PIN) == PWR_WAKEUP_PIN4) ||\ 845 ((PIN) == PWR_WAKEUP_PIN5) ||\ 846 ((PIN) == PWR_WAKEUP_PIN6) ||\ 847 ((PIN) == PWR_WAKEUP_PIN7) ||\ 848 ((PIN) == PWR_WAKEUP_PIN8)) 849 #endif /* defined (STM32WBA55xx) */ 850 #endif /* defined (STM32WBA52xx) || defined (STM32WBA54xx) || defined (STM32WBA55xx) */ 851 852 /* PVD level check macro */ 853 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1) || \ 854 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3) || \ 855 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5) || \ 856 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 857 858 /* PVD mode check macro */ 859 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ 860 ((MODE) == PWR_PVD_MODE_IT_RISING) ||\ 861 ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ 862 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\ 863 ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\ 864 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\ 865 ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING)) 866 867 /* Sleep mode entry check macro */ 868 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 869 870 /* Stop mode entry check macro */ 871 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 872 873 /* PWR items check macro */ 874 #define IS_PWR_ITEMS_ATTRIBUTES(ITEM) ((((ITEM) & (~PWR_ALL)) == 0U) && ((ITEM) != 0U)) 875 876 #if defined(PWR_PRIVCFGR_SPRIV) 877 #if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 878 /* PWR attribute check macro (Secure) */ 879 #define IS_PWR_ATTRIBUTES(ATTRIBUTES) ((((~(((ATTRIBUTES)& \ 880 0xF0U) >> 4U)) & ((ATTRIBUTES) & 0x0FU)) == 0U) && \ 881 (((ATTRIBUTES) & 0xFFFFFFCCU) == 0U)) 882 #else 883 /* PWR attribute check macro (NSecure) */ 884 #define IS_PWR_ATTRIBUTES(ATTRIBUTES) (((ATTRIBUTES) == PWR_NSEC_NPRIV) || ((ATTRIBUTES) == PWR_NSEC_PRIV)) 885 #endif /* __ARM_FEATURE_CMSE */ 886 #endif /* defined(PWR_PRIVCFGR_SPRIV) */ 887 888 /* PWR regulation VDDHPA input supply selection */ 889 #define IS_PWR_REGPASEL_SUPPLYSELECTION(SUPPLYSELECTION) (((SUPPLYSELECTION) == PWR_RADIO_REG_VDDRFPA) ||\ 890 ((SUPPLYSELECTION) == PWR_RADIO_REG_VDDHPA_VD11)) 891 /** 892 * @} 893 */ 894 895 /* Include PWR HAL Extended module */ 896 #include "stm32wbaxx_hal_pwr_ex.h" 897 898 /* Exported functions --------------------------------------------------------*/ 899 900 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 901 * @{ 902 */ 903 904 /** @addtogroup PWR_Exported_Functions_Group1 905 * @{ 906 */ 907 /* Initialization and de-initialization functions *****************************/ 908 void HAL_PWR_DeInit(void); 909 void HAL_PWR_EnableBkUpAccess(void); 910 void HAL_PWR_DisableBkUpAccess(void); 911 /** 912 * @} 913 */ 914 915 /** @addtogroup PWR_Exported_Functions_Group2 916 * @{ 917 */ 918 /* Programmable voltage detector functions ************************************/ 919 HAL_StatusTypeDef HAL_PWR_ConfigPVD(const PWR_PVDTypeDef *sConfigPVD); 920 void HAL_PWR_EnablePVD(void); 921 void HAL_PWR_DisablePVD(void); 922 923 /* Wake up pins configuration functions ***************************************/ 924 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPin); 925 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPin); 926 uint32_t HAL_PWR_GetClearWakeupSource(void); 927 928 /* Low power modes configuration functions ************************************/ 929 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 930 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 931 void HAL_PWR_EnterSTANDBYMode(void); 932 933 /* Sleep on exit and sev on pending configuration functions *******************/ 934 void HAL_PWR_EnableSleepOnExit(void); 935 void HAL_PWR_DisableSleepOnExit(void); 936 void HAL_PWR_EnableSEVOnPend(void); 937 void HAL_PWR_DisableSEVOnPend(void); 938 939 /* Interrupt handler functions ************************************************/ 940 void HAL_PWR_PVD_IRQHandler(void); 941 void HAL_PWR_PVD_Rising_Callback(void); 942 void HAL_PWR_PVD_Falling_Callback(void); 943 void HAL_PWR_WKUP_IRQHandler(void); 944 void HAL_PWR_WKUP1_Callback(void); 945 #if defined(PWR_WUCR1_WUPEN2) 946 void HAL_PWR_WKUP2_Callback(void); 947 #endif /* defined(PWR_WUCR1_WUPEN2) */ 948 void HAL_PWR_WKUP3_Callback(void); 949 void HAL_PWR_WKUP4_Callback(void); 950 #if defined(PWR_WUCR1_WUPEN5) 951 void HAL_PWR_WKUP5_Callback(void); 952 #endif /* defined(PWR_WUCR1_WUPEN5) */ 953 void HAL_PWR_WKUP6_Callback(void); 954 void HAL_PWR_WKUP7_Callback(void); 955 void HAL_PWR_WKUP8_Callback(void); 956 /** 957 * @} 958 */ 959 960 /** @addtogroup PWR_Exported_Functions_Group3 961 * @{ 962 */ 963 /* Privileges and security configuration functions ****************************/ 964 void HAL_PWR_ConfigAttributes(uint32_t Item, uint32_t Attributes); 965 HAL_StatusTypeDef HAL_PWR_GetConfigAttributes(uint32_t Item, uint32_t *pAttributes); 966 /** 967 * @} 968 */ 969 970 /** 971 * @} 972 */ 973 974 /** 975 * @} 976 */ 977 978 /** 979 * @} 980 */ 981 982 /** 983 * @} 984 */ 985 986 #ifdef __cplusplus 987 } 988 #endif /* __cplusplus */ 989 990 #endif /* STM32WBAxx_HAL_PWR_H */ 991 992
