1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32U5xx_HAL_UART_EX_H 22 #define STM32U5xx_HAL_UART_EX_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32u5xx_hal_def.h" 30 31 /** @addtogroup STM32U5xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup UARTEx 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief UART wake up from stop mode parameters 46 */ 47 typedef struct 48 { 49 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 50 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 51 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 52 be filled up. */ 53 54 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 55 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 56 57 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 58 } UART_WakeUpTypeDef; 59 60 /** 61 * @brief UART Autonomous mode parameters 62 */ 63 typedef struct 64 { 65 uint32_t AutonomousModeState; /*!< Specifies the autonomous mode state.This parameter can be a value of 66 @ref UARTEx_Autonomous_mode.*/ 67 68 uint32_t TriggerSelection; /*!< Specifies which trigger will activate the Transmission automatically. 69 This parameter can be a value of @ref UARTEx_Autonomous_Trigger_selection 70 or @ref LPUARTEx_Autonomous_Trigger_selection.*/ 71 72 uint32_t TriggerPolarity; /*!< Specifies the autonomous mode trigger signal polarity. 73 This parameter can be a value of @ref UARTEx_Autonomous_Trigger_Polarity */ 74 75 uint32_t DataSize; /*!< Specifies the transmitted data size in byte */ 76 77 uint32_t IdleFrame; /*!< Specifies whether the IDLE frame transmission is enabled or disabled. 78 This parameter can be a value of @ref UARTEx_Autonomous_IDLE_FRAME. */ 79 } UART_AutonomousModeConfTypeDef; 80 81 /** 82 * @} 83 */ 84 85 /* Exported constants --------------------------------------------------------*/ 86 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 87 * @{ 88 */ 89 90 /** @defgroup UARTEx_Word_Length UARTEx Word Length 91 * @{ 92 */ 93 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 94 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 95 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 96 /** 97 * @} 98 */ 99 100 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 101 * @{ 102 */ 103 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 104 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 105 /** 106 * @} 107 */ 108 109 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 110 * @brief UART FIFO mode 111 * @{ 112 */ 113 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 114 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 115 /** 116 * @} 117 */ 118 119 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 120 * @brief UART TXFIFO threshold level 121 * @{ 122 */ 123 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ 124 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ 125 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ 126 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ 127 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ 128 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ 129 /** 130 * @} 131 */ 132 133 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 134 * @brief UART RXFIFO threshold level 135 * @{ 136 */ 137 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ 138 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ 139 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ 140 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ 141 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ 142 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ 143 /** 144 * @} 145 */ 146 147 /** @defgroup UARTEx_Autonomous_mode UARTEx Autonomous Mode 148 * @brief UART Autonomous mode 149 * @{ 150 */ 151 #define UART_AUTONOMOUS_MODE_DISABLE 0x00000000U /*!< Autonomous mode disable */ 152 #define UART_AUTONOMOUS_MODE_ENABLE USART_AUTOCR_TRIGEN /*!< Autonomous mode enable */ 153 /** 154 * @} 155 */ 156 157 /** @defgroup UARTEx_Autonomous_Trigger_Polarity UARTEx Autonomous Trigger Polarity 158 * @brief UART Trigger polarity edge selection 159 * @{ 160 */ 161 #define UART_TRIG_POLARITY_RISING 0x00000000U /*!< UART triggered on rising edge */ 162 #define UART_TRIG_POLARITY_FALLING USART_AUTOCR_TRIGPOL /*!< UART triggered on falling edge */ 163 /** 164 * @} 165 */ 166 167 /** @defgroup UARTEx_Autonomous_IDLE_FRAME UARTEx Autonomous IDLE Frame 168 * @brief UART IDLE frame transmission 169 * @{ 170 */ 171 #define UART_IDLE_FRAME_ENABLE 0x00000000U /*!< IDLE Frame sent after enabling the transmitter */ 172 #define UART_IDLE_FRAME_DISABLE USART_AUTOCR_IDLEDIS /*!< IDLE Frame not sent after enabling the transmitter */ 173 /** 174 * @} 175 */ 176 177 /** @defgroup UARTEx_Autonomous_Trigger_selection UARTEx Autonomous trigger selection 178 * @brief UART Autonomous Trigger selection 179 * @{ 180 */ 181 #define UART_GPDMA1_CH0_TCF_TRG 0U /*!< UART GPDMA1 channel0 Internal Trigger */ 182 #define UART_GPDMA1_CH1_TCF_TRG 1U /*!< UART GPDMA1 channel1 Internal Trigger */ 183 #define UART_GPDMA1_CH2_TCF_TRG 2U /*!< UART GPDMA1 channel2 Internal Trigger */ 184 #define UART_GPDMA1_CH3_TCF_TRG 3U /*!< UART GPDMA1 channel3 Internal Trigger */ 185 #define UART_EXTI_LINE6_TRG 4U /*!< UART EXTI line 6 Internal Trigger */ 186 #define UART_EXTI_LINE9_TRG 5U /*!< UART EXTI line 9 Internal Trigger */ 187 #define UART_LPTIM1_OUT_TRG 6U /*!< UART LPTIM1 out Internal Trigger */ 188 #define UART_LPTIM2_OUT_TRG 7U /*!< UART LPTIM2 out Internal Trigger */ 189 #define UART_COMP1_OUT_TRG 8U /*!< UART COMP1 out Internal Trigger */ 190 #define UART_COMP2_OUT_TRG 9U /*!< UART COMP2 out Internal Trigger */ 191 #define UART_RTC_ALRA_TRG 10U /*!< UART RTC alarm Internal Trigger */ 192 #define UART_RTC_WUT_TRG 11U /*!< UART RTC wakeup Internal Trigger */ 193 /** 194 * @} 195 */ 196 197 /** @defgroup LPUARTEx_Autonomous_Trigger_selection LPUARTEx Autonomous trigger selection 198 * @brief LPUART Autonomous Trigger selection 199 * @{ 200 */ 201 #define LPUART_LPDMA1_CH0_TCF_TRG 0U /*!< LPUART LPDMA1 channel0 Internal Trigger */ 202 #define LPUART_LPDMA1_CH1_TCF_TRG 1U /*!< LPUART LPDMA1 channel1 Internal Trigger */ 203 #define LPUART_LPDMA1_CH2_TCF_TRG 2U /*!< LPUART LPDMA1 channel2 Internal Trigger */ 204 #define LPUART_LPDMA1_CH3_TCF_TRG 3U /*!< LPUART LPDMA1 channel3 Internal Trigger */ 205 #define LPUART_EXTI_LINE6_TRG 4U /*!< LPUART EXTI line 6 Internal Trigger */ 206 #define LPUART_EXTI_LINE8_TRG 5U /*!< LPUART EXTI line 8 Internal Trigger */ 207 #define LPUART_LPTIM1_OUT_TRG 6U /*!< LPUART LPTIM1 out Internal Trigger */ 208 #define LPUART_LPTIM3_OUT_TRG 7U /*!< LPUART LPTIM3 out Internal Trigger */ 209 #define LPUART_COMP1_OUT_TRG 8U /*!< LPUART COMP1 out Internal Trigger */ 210 #define LPUART_COMP2_OUT_TRG 9U /*!< LPUART COMP2 out Internal Trigger */ 211 #define LPUART_RTC_ALRA_TRG 10U /*!< LPUART RTC alarm Internal Trigger */ 212 #define LPUART_RTC_WUT_TRG 11U /*!< LPUART RTC wakeup Internal Trigger */ 213 /** 214 * @} 215 */ 216 217 /** 218 * @} 219 */ 220 221 /* Exported macros -----------------------------------------------------------*/ 222 /* Exported functions --------------------------------------------------------*/ 223 /** @addtogroup UARTEx_Exported_Functions 224 * @{ 225 */ 226 227 /** @addtogroup UARTEx_Exported_Functions_Group1 228 * @{ 229 */ 230 231 /* Initialization and de-initialization functions ****************************/ 232 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 233 uint32_t DeassertionTime); 234 235 /** 236 * @} 237 */ 238 239 /** @addtogroup UARTEx_Exported_Functions_Group2 240 * @{ 241 */ 242 243 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 244 245 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 246 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 247 248 /** 249 * @} 250 */ 251 252 /** @addtogroup UARTEx_Exported_Functions_Group3 253 * @{ 254 */ 255 256 /* Peripheral Control functions **********************************************/ 257 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 258 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 259 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 260 261 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 262 263 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 264 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 265 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 266 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 267 268 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, 269 uint32_t Timeout); 270 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 271 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 272 273 /* Autonomous Mode Control functions **********************************************/ 274 HAL_StatusTypeDef HAL_UARTEx_SetConfigAutonomousMode(UART_HandleTypeDef *huart, 275 UART_AutonomousModeConfTypeDef *sConfig); 276 HAL_StatusTypeDef HAL_UARTEx_GetConfigAutonomousMode(UART_HandleTypeDef *huart, 277 UART_AutonomousModeConfTypeDef *sConfig); 278 HAL_StatusTypeDef HAL_UARTEx_ClearConfigAutonomousMode(UART_HandleTypeDef *huart); 279 280 281 /** 282 * @} 283 */ 284 285 /** 286 * @} 287 */ 288 289 /* Private macros ------------------------------------------------------------*/ 290 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 291 * @{ 292 */ 293 294 /** @brief Report the UART clock source. 295 * @param __HANDLE__ specifies the UART Handle. 296 * @param __CLOCKSOURCE__ output variable. 297 * @retval UART clocking source, written in __CLOCKSOURCE__. 298 */ 299 #if defined(USART6) 300 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 301 do { \ 302 if((__HANDLE__)->Instance == USART1) \ 303 { \ 304 (__CLOCKSOURCE__) = RCC_PERIPHCLK_USART1; \ 305 } \ 306 else if((__HANDLE__)->Instance == USART2) \ 307 { \ 308 (__CLOCKSOURCE__) = RCC_PERIPHCLK_USART2; \ 309 } \ 310 else if((__HANDLE__)->Instance == USART3) \ 311 { \ 312 (__CLOCKSOURCE__) = RCC_PERIPHCLK_USART3; \ 313 } \ 314 else if((__HANDLE__)->Instance == UART4) \ 315 { \ 316 (__CLOCKSOURCE__) = RCC_PERIPHCLK_UART4; \ 317 } \ 318 else if((__HANDLE__)->Instance == UART5) \ 319 { \ 320 (__CLOCKSOURCE__) = RCC_PERIPHCLK_UART5; \ 321 } \ 322 else if((__HANDLE__)->Instance == USART6) \ 323 { \ 324 (__CLOCKSOURCE__) = RCC_PERIPHCLK_USART6; \ 325 } \ 326 else if((__HANDLE__)->Instance == LPUART1) \ 327 { \ 328 (__CLOCKSOURCE__) = RCC_PERIPHCLK_LPUART1; \ 329 } \ 330 else \ 331 { \ 332 (__CLOCKSOURCE__) = 0U; \ 333 } \ 334 } while(0U) 335 #else 336 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 337 do { \ 338 if((__HANDLE__)->Instance == USART1) \ 339 { \ 340 (__CLOCKSOURCE__) = RCC_PERIPHCLK_USART1; \ 341 } \ 342 else if((__HANDLE__)->Instance == USART2) \ 343 { \ 344 (__CLOCKSOURCE__) = RCC_PERIPHCLK_USART2; \ 345 } \ 346 else if((__HANDLE__)->Instance == USART3) \ 347 { \ 348 (__CLOCKSOURCE__) = RCC_PERIPHCLK_USART3; \ 349 } \ 350 else if((__HANDLE__)->Instance == UART4) \ 351 { \ 352 (__CLOCKSOURCE__) = RCC_PERIPHCLK_UART4; \ 353 } \ 354 else if((__HANDLE__)->Instance == UART5) \ 355 { \ 356 (__CLOCKSOURCE__) = RCC_PERIPHCLK_UART5; \ 357 } \ 358 else if((__HANDLE__)->Instance == LPUART1) \ 359 { \ 360 (__CLOCKSOURCE__) = RCC_PERIPHCLK_LPUART1; \ 361 } \ 362 else \ 363 { \ 364 (__CLOCKSOURCE__) = 0U; \ 365 } \ 366 } while(0U) 367 #endif /* USART6 */ 368 369 /** @brief Report the UART mask to apply to retrieve the received data 370 * according to the word length and to the parity bits activation. 371 * @note If PCE = 1, the parity bit is not included in the data extracted 372 * by the reception API(). 373 * This masking operation is not carried out in the case of 374 * DMA transfers. 375 * @param __HANDLE__ specifies the UART Handle. 376 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 377 */ 378 #define UART_MASK_COMPUTATION(__HANDLE__) \ 379 do { \ 380 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 381 { \ 382 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 383 { \ 384 (__HANDLE__)->Mask = 0x01FFU ; \ 385 } \ 386 else \ 387 { \ 388 (__HANDLE__)->Mask = 0x00FFU ; \ 389 } \ 390 } \ 391 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 392 { \ 393 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 394 { \ 395 (__HANDLE__)->Mask = 0x00FFU ; \ 396 } \ 397 else \ 398 { \ 399 (__HANDLE__)->Mask = 0x007FU ; \ 400 } \ 401 } \ 402 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 403 { \ 404 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 405 { \ 406 (__HANDLE__)->Mask = 0x007FU ; \ 407 } \ 408 else \ 409 { \ 410 (__HANDLE__)->Mask = 0x003FU ; \ 411 } \ 412 } \ 413 else \ 414 { \ 415 (__HANDLE__)->Mask = 0x0000U; \ 416 } \ 417 } while(0U) 418 419 /** 420 * @brief Ensure that UART frame length is valid. 421 * @param __LENGTH__ UART frame length. 422 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 423 */ 424 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 425 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 426 ((__LENGTH__) == UART_WORDLENGTH_9B)) 427 428 /** 429 * @brief Ensure that UART wake-up address length is valid. 430 * @param __ADDRESS__ UART wake-up address length. 431 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 432 */ 433 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 434 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 435 436 /** 437 * @brief Ensure that UART TXFIFO threshold level is valid. 438 * @param __THRESHOLD__ UART TXFIFO threshold level. 439 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 440 */ 441 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 442 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 443 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 444 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 445 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 446 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 447 448 /** 449 * @brief Ensure that UART RXFIFO threshold level is valid. 450 * @param __THRESHOLD__ UART RXFIFO threshold level. 451 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 452 */ 453 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 454 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 455 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 456 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 457 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 458 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 459 460 /** 461 * @brief Ensure that UART Trigger polarity state is valid. 462 * @param __POLARITY__ UART Trigger polarity. 463 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 464 */ 465 #define IS_UART_TRIGGER_POLARITY(__POLARITY__) (((__POLARITY__) == UART_TRIG_POLARITY_RISING) ||\ 466 ((__POLARITY__) == UART_TRIG_POLARITY_FALLING)) 467 468 /** 469 * @brief Ensure that UART IDLE Frame Transmit state is valid. 470 * @param __IDLE__ UART IDLE Frame Transmit state. 471 * @retval SET (__IDLE__ is valid) or RESET (__IDLE__ is invalid) 472 */ 473 #define IS_UART_IDLE_FRAME_TRANSMIT(__IDLE__) (((__IDLE__) == UART_IDLE_FRAME_ENABLE) ||\ 474 ((__IDLE__) == UART_IDLE_FRAME_DISABLE)) 475 476 /** 477 * @brief Ensure that UART Trigger source selection is valid. 478 * @param __SOURCE__ UART Trigger source selection. 479 * @retval SET (__SOURCE__ is valid) or RESET (__SOURCE__ is invalid) 480 */ 481 #define IS_UART_TRIGGER_SELECTION(__SOURCE__) ((__SOURCE__) <= 11U) 482 483 /** 484 * @brief Ensure that LPUART Trigger source selection is valid. 485 * @param __SOURCE__ LPUART Trigger source selection. 486 * @retval SET (__SOURCE__ is valid) or RESET (__SOURCE__ is invalid) 487 */ 488 #define IS_LPUART_TRIGGER_SELECTION(__SOURCE__) ((__SOURCE__) <= 11U) 489 490 /** 491 * @brief Ensure that the number of transferred data is valid. 492 * @param __SOURCE__ UART TX data size. 493 * @retval SET (__SOURCE__ is valid) or RESET (__SOURCE__ is invalid) 494 */ 495 #define IS_UART_TX_DATA_SIZE(__SOURCE__) ((__SOURCE__) <= 0xFFFFU) 496 497 /** 498 * @} 499 */ 500 501 /* Private functions ---------------------------------------------------------*/ 502 503 /** 504 * @} 505 */ 506 507 /** 508 * @} 509 */ 510 511 #ifdef __cplusplus 512 } 513 #endif 514 515 #endif /* STM32U5xx_HAL_UART_EX_H */ 516
