1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_gfxmmu.h 4 * @author MCD Application Team 5 * @brief Header file of GFXMMU HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U5xx_HAL_GFXMMU_H 21 #define STM32U5xx_HAL_GFXMMU_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32u5xx_hal_def.h" 29 30 #if defined(GFXMMU) 31 32 /** @addtogroup STM32U5xx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup GFXMMU 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup GFXMMU_Exported_Types GFXMMU Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief HAL GFXMMU states definition 47 */ 48 typedef enum 49 { 50 HAL_GFXMMU_STATE_RESET = 0x00U, /*!< GFXMMU not initialized. */ 51 HAL_GFXMMU_STATE_READY = 0x01U, /*!< GFXMMU initialized and ready for use. */ 52 } HAL_GFXMMU_StateTypeDef; 53 54 /** 55 * @brief GFXMMU buffers structure definition 56 */ 57 typedef struct 58 { 59 uint32_t Buf0Address; /*!< Physical address of buffer 0. */ 60 uint32_t Buf1Address; /*!< Physical address of buffer 1. */ 61 uint32_t Buf2Address; /*!< Physical address of buffer 2. */ 62 uint32_t Buf3Address; /*!< Physical address of buffer 3. */ 63 } GFXMMU_BuffersTypeDef; 64 65 #if defined(GFXMMU_CR_CE) 66 /** 67 * @brief GFXMMU cache and pre-fetch structure definition 68 */ 69 typedef struct 70 { 71 FunctionalState Activation; /*!< Cache and pre-fetch enable/disable. 72 @note: All following parameters are useful only if cache 73 and pre-fetch are enabled. */ 74 uint32_t CacheLock; /*!< Locking the cache to a buffer. 75 This parameter can be a value of @ref GFXMMU_CacheLock. */ 76 uint32_t CacheLockBuffer; /*!< Buffer on which the cache is locked. 77 This parameter can be a value of @ref GFXMMU_CacheLockBuffer. 78 @note: Useful only when lock of the cache is enabled. */ 79 uint32_t CacheForce; /*!< Forcing the cache regardless MPU attributes. 80 This parameter can be a value of @ref GFXMMU_CacheForce. 81 @note: Useful only when lock of the cache is enabled. */ 82 uint32_t OutterBufferability; /*!< Bufferability of an access generated by the GFXMMU cache. 83 This parameter can be a value of @ref GFXMMU_OutterBufferability. */ 84 uint32_t OutterCachability; /*!< Cachability of an access generated by the GFXMMU cache. 85 This parameter can be a value of @ref GFXMMU_OutterCachability. */ 86 uint32_t Prefetch; /*!< Pre-fetch enable/disable. 87 This parameter can be a value of @ref GFXMMU_Prefetch. */ 88 } GFXMMU_CachePrefetchTypeDef; 89 90 #endif /* GFXMMU_CR_CE */ 91 #if defined(GFXMMU_CR_ACE) 92 /** 93 * @brief GFXMMU address cache structure definition 94 */ 95 typedef struct 96 { 97 FunctionalState Activation; /*!< Address Cache and enable/disable. 98 @note: All following parameters are useful only if address 99 cache is enabled. */ 100 uint32_t AddressCacheLockBuffer; /*!< Buffer on which the address cache is locked. 101 This parameter can be a value of @ref GFXMMU_AddressCacheLockBuffer. 102 @note: Useful only when lock of the address cache is enabled. */ 103 } GFXMMU_AddressCacheTypeDef; 104 105 #endif /* GFXMMU_CR_ACE */ 106 /** 107 * @brief GFXMMU interrupts structure definition 108 */ 109 typedef struct 110 { 111 FunctionalState Activation; /*!< Interrupts enable/disable. */ 112 uint32_t UsedInterrupts; /*!< Interrupts used. 113 This parameter can be a values combination of @ref GFXMMU_Interrupts. 114 @note: Useful only when interrupts are enabled. */ 115 } GFXMMU_InterruptsTypeDef; 116 117 /** 118 * @brief GFXMMU init structure definition 119 */ 120 typedef struct 121 { 122 uint32_t BlocksPerLine; /*!< Number of blocks of 16 bytes per line. 123 This parameter can be a value of @ref GFXMMU_BlocksPerLine. */ 124 uint32_t DefaultValue; /*!< Value returned when virtual memory location not physically mapped. */ 125 GFXMMU_BuffersTypeDef Buffers; /*!< Physical buffers addresses. */ 126 #if defined(GFXMMU_CR_CE) 127 GFXMMU_CachePrefetchTypeDef CachePrefetch; /*!< Cache and pre-fetch parameters. */ 128 #endif /* GFXMMU_CR_CE */ 129 #if defined(GFXMMU_CR_ACE) 130 GFXMMU_AddressCacheTypeDef AddressCache; /*!< Address Cache parameters. */ 131 #endif /* GFXMMU_CR_ACE */ 132 GFXMMU_InterruptsTypeDef Interrupts; /*!< Interrupts parameters. */ 133 } GFXMMU_InitTypeDef; 134 135 /** 136 * @brief GFXMMU handle structure definition 137 */ 138 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 139 typedef struct __GFXMMU_HandleTypeDef 140 #else 141 typedef struct 142 #endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */ 143 { 144 GFXMMU_TypeDef *Instance; /*!< GFXMMU instance. */ 145 GFXMMU_InitTypeDef Init; /*!< GFXMMU init parameters. */ 146 HAL_GFXMMU_StateTypeDef State; /*!< GFXMMU state. */ 147 __IO uint32_t ErrorCode; /*!< GFXMMU error code. */ 148 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 149 void (*ErrorCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU error callback. */ 150 void (*MspInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP init callback. */ 151 void (*MspDeInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP de-init callback. */ 152 #endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */ 153 } GFXMMU_HandleTypeDef; 154 155 /** 156 * @brief GFXMMU LUT line structure definition 157 */ 158 typedef struct 159 { 160 uint32_t LineNumber; /*!< LUT line number. 161 This parameter must be a number between Min_Data = 0 and Max_Data = 1023. */ 162 uint32_t LineStatus; /*!< LUT line enable/disable. 163 This parameter can be a value of @ref GFXMMU_LutLineStatus. */ 164 uint32_t FirstVisibleBlock; /*!< First visible block on this line. 165 This parameter must be a number between Min_Data = 0 and Max_Data = 255. */ 166 uint32_t LastVisibleBlock; /*!< Last visible block on this line. 167 This parameter must be a number between Min_Data = 0 and Max_Data = 255. */ 168 int32_t LineOffset; /*!< Offset of block 0 of the current line in physical buffer. 169 This parameter must be a number between Min_Data = -4080 and Max_Data = 4190208. 170 @note: Line offset has to be computed with the following formula: 171 LineOffset = [(Blocks already used) - (1st visible block)]*BlockSize. */ 172 } GFXMMU_LutLineTypeDef; 173 174 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 175 /** 176 * @brief GFXMMU callback ID enumeration definition 177 */ 178 typedef enum 179 { 180 HAL_GFXMMU_ERROR_CB_ID = 0x00U, /*!< GFXMMU error callback ID. */ 181 HAL_GFXMMU_MSPINIT_CB_ID = 0x01U, /*!< GFXMMU MSP init callback ID. */ 182 HAL_GFXMMU_MSPDEINIT_CB_ID = 0x02U /*!< GFXMMU MSP de-init callback ID. */ 183 } HAL_GFXMMU_CallbackIDTypeDef; 184 185 /** 186 * @brief GFXMMU callback pointer definition 187 */ 188 typedef void (*pGFXMMU_CallbackTypeDef)(GFXMMU_HandleTypeDef *hgfxmmu); 189 #endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */ 190 191 /** 192 * @} 193 */ 194 /* End of exported types -----------------------------------------------------*/ 195 196 /* Exported constants --------------------------------------------------------*/ 197 /** @defgroup GFXMMU_Exported_Constants GFXMMU Exported Constants 198 * @{ 199 */ 200 201 /** @defgroup GFXMMU_BlocksPerLine GFXMMU blocks per line 202 * @{ 203 */ 204 #define GFXMMU_256BLOCKS 0x00000000U /*!< 256 blocks of 16 bytes per line */ 205 #define GFXMMU_192BLOCKS GFXMMU_CR_192BM /*!< 192 blocks of 16 bytes per line */ 206 /** 207 * @} 208 */ 209 210 /** @defgroup GFXMMU_CacheLock GFXMMU cache lock 211 * @{ 212 */ 213 #define GFXMMU_CACHE_LOCK_DISABLE 0x00000000U /*!< Cache not locked to a buffer */ 214 #define GFXMMU_CACHE_LOCK_ENABLE GFXMMU_CR_CL /*!< Cache locked to a buffer */ 215 /** 216 * @} 217 */ 218 219 /** @defgroup GFXMMU_CacheLockBuffer GFXMMU cache lock buffer 220 * @{ 221 */ 222 #define GFXMMU_CACHE_LOCK_BUFFER0 0x00000000U /*!< Cache locked to buffer 0 */ 223 #define GFXMMU_CACHE_LOCK_BUFFER1 GFXMMU_CR_CLB_0 /*!< Cache locked to buffer 1 */ 224 #define GFXMMU_CACHE_LOCK_BUFFER2 GFXMMU_CR_CLB_1 /*!< Cache locked to buffer 2 */ 225 #define GFXMMU_CACHE_LOCK_BUFFER3 GFXMMU_CR_CLB /*!< Cache locked to buffer 3 */ 226 /** 227 * @} 228 */ 229 230 /** @defgroup GFXMMU_CacheForce GFXMMU cache force 231 * @{ 232 */ 233 #define GFXMMU_CACHE_FORCE_DISABLE 0x00000000U /*!< Caching not forced */ 234 #define GFXMMU_CACHE_FORCE_ENABLE GFXMMU_CR_FC /*!< Caching forced */ 235 /** 236 * @} 237 */ 238 239 /** @defgroup GFXMMU_OutterBufferability GFXMMU outer bufferability 240 * @{ 241 */ 242 #define GFXMMU_OUTTER_BUFFERABILITY_DISABLE 0x00000000U /*!< No bufferable */ 243 #define GFXMMU_OUTTER_BUFFERABILITY_ENABLE GFXMMU_CR_OB /*!< Bufferable */ 244 /** 245 * @} 246 */ 247 248 /** @defgroup GFXMMU_OutterCachability GFXMMU outer cachability 249 * @{ 250 */ 251 #define GFXMMU_OUTTER_CACHABILITY_DISABLE 0x00000000U /*!< No cacheable */ 252 #define GFXMMU_OUTTER_CACHABILITY_ENABLE GFXMMU_CR_OC /*!< Cacheable */ 253 /** 254 * @} 255 */ 256 257 /** @defgroup GFXMMU_Prefetch GFXMMU pre-fetch 258 * @{ 259 */ 260 #define GFXMMU_PREFETCH_DISABLE GFXMMU_CR_PD /*!< Pre-fetch disable */ 261 #define GFXMMU_PREFETCH_ENABLE 0x00000000U /*!< Pre-fetch enable */ 262 /** 263 * @} 264 */ 265 266 /** @defgroup GFXMMU_Interrupts GFXMMU interrupts 267 * @{ 268 */ 269 #define GFXMMU_AHB_MASTER_ERROR_IT GFXMMU_CR_AMEIE /*!< AHB master error interrupt. */ 270 #define GFXMMU_BUFFER0_OVERFLOW_IT GFXMMU_CR_B0OIE /*!< Buffer 0 overflow interrupt. */ 271 #define GFXMMU_BUFFER1_OVERFLOW_IT GFXMMU_CR_B1OIE /*!< Buffer 1 overflow interrupt. */ 272 #define GFXMMU_BUFFER2_OVERFLOW_IT GFXMMU_CR_B2OIE /*!< Buffer 2 overflow interrupt. */ 273 #define GFXMMU_BUFFER3_OVERFLOW_IT GFXMMU_CR_B3OIE /*!< Buffer 3 overflow interrupt. */ 274 /** 275 * @} 276 */ 277 278 /** @defgroup GFXMMU_Error_Code GFXMMU Error Code 279 * @{ 280 */ 281 #define GFXMMU_ERROR_NONE 0x00000000U /*!< No error. */ 282 #define GFXMMU_ERROR_BUFFER0_OVERFLOW GFXMMU_SR_B0OF /*!< Buffer 0 overflow. */ 283 #define GFXMMU_ERROR_BUFFER1_OVERFLOW GFXMMU_SR_B1OF /*!< Buffer 1 overflow. */ 284 #define GFXMMU_ERROR_BUFFER2_OVERFLOW GFXMMU_SR_B2OF /*!< Buffer 2 overflow. */ 285 #define GFXMMU_ERROR_BUFFER3_OVERFLOW GFXMMU_SR_B3OF /*!< Buffer 3 overflow. */ 286 #define GFXMMU_ERROR_AHB_MASTER GFXMMU_SR_AMEF /*!< AHB master error. */ 287 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 288 #define GFXMMU_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error. */ 289 #endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */ 290 /** 291 * @} 292 */ 293 294 /** @defgroup GFXMMU_LutLineStatus GFXMMU LUT line status 295 * @{ 296 */ 297 #define GFXMMU_LUT_LINE_DISABLE 0x00000000U /*!< LUT line disabled. */ 298 #define GFXMMU_LUT_LINE_ENABLE GFXMMU_LUTxL_EN /*!< LUT line enabled. */ 299 /** 300 * @} 301 */ 302 /** @defgroup GFXMMU_CacheForceParam GFXMMU cache force parameter 303 * @{ 304 */ 305 #define GFXMMU_CACHE_FORCE_FLUSH GFXMMU_CCR_FF /*!< Force cache flush */ 306 #define GFXMMU_CACHE_FORCE_INVALIDATE GFXMMU_CCR_FI /*!< Force cache invalidate */ 307 /** 308 * @} 309 */ 310 311 #if defined(GFXMMU_CR_ACE) 312 /** @defgroup GFXMMU_AddressCacheLockBuffer GFXMMU address cache lock buffer 313 * @{ 314 */ 315 #define GFXMMU_ADDRESSCACHE_LOCK_BUFFER0 0x00000000U /*!< Address Cache locked to buffer 0 */ 316 #define GFXMMU_ADDRESSCACHE_LOCK_BUFFER1 GFXMMU_CR_ACLB_0 /*!< Address Cache locked to buffer 1 */ 317 #define GFXMMU_ADDRESSCACHE_LOCK_BUFFER2 GFXMMU_CR_ACLB_1 /*!< Address Cache locked to buffer 2 */ 318 #define GFXMMU_ADDRESSCACHE_LOCK_BUFFER3 GFXMMU_CR_ACLB /*!< Address Cache locked to buffer 3 */ 319 /** 320 * @} 321 */ 322 323 #endif /* GFXMMU_CR_ACE */ 324 /** 325 * @} 326 */ 327 /* End of exported constants -------------------------------------------------*/ 328 329 /* Exported macros -----------------------------------------------------------*/ 330 /** @defgroup GFXMMU_Exported_Macros GFXMMU Exported Macros 331 * @{ 332 */ 333 334 /** @brief Reset GFXMMU handle state. 335 * @param __HANDLE__ GFXMMU handle. 336 * @retval None 337 */ 338 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 339 #define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) do{ \ 340 (__HANDLE__)->State = HAL_GFXMMU_STATE_RESET; \ 341 (__HANDLE__)->MspInitCallback = NULL; \ 342 (__HANDLE__)->MspDeInitCallback = NULL; \ 343 } while(0) 344 #else 345 #define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_GFXMMU_STATE_RESET) 346 #endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */ 347 348 /** 349 * @} 350 */ 351 /* End of exported macros ----------------------------------------------------*/ 352 353 /* Exported functions --------------------------------------------------------*/ 354 /** @addtogroup GFXMMU_Exported_Functions GFXMMU Exported Functions 355 * @{ 356 */ 357 358 /** @addtogroup GFXMMU_Exported_Functions_Group1 Initialization and de-initialization functions 359 * @{ 360 */ 361 /* Initialization and de-initialization functions *****************************/ 362 HAL_StatusTypeDef HAL_GFXMMU_Init(GFXMMU_HandleTypeDef *hgfxmmu); 363 HAL_StatusTypeDef HAL_GFXMMU_DeInit(GFXMMU_HandleTypeDef *hgfxmmu); 364 void HAL_GFXMMU_MspInit(GFXMMU_HandleTypeDef *hgfxmmu); 365 void HAL_GFXMMU_MspDeInit(GFXMMU_HandleTypeDef *hgfxmmu); 366 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 367 /* GFXMMU callbacks register/unregister functions *****************************/ 368 HAL_StatusTypeDef HAL_GFXMMU_RegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu, 369 HAL_GFXMMU_CallbackIDTypeDef CallbackID, 370 pGFXMMU_CallbackTypeDef pCallback); 371 HAL_StatusTypeDef HAL_GFXMMU_UnRegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu, 372 HAL_GFXMMU_CallbackIDTypeDef CallbackID); 373 #endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */ 374 /** 375 * @} 376 */ 377 378 /** @addtogroup GFXMMU_Exported_Functions_Group2 Operations functions 379 * @{ 380 */ 381 /* Operation functions ********************************************************/ 382 HAL_StatusTypeDef HAL_GFXMMU_ConfigLut(const GFXMMU_HandleTypeDef *hgfxmmu, 383 uint32_t FirstLine, 384 uint32_t LinesNumber, 385 uint32_t Address); 386 387 HAL_StatusTypeDef HAL_GFXMMU_DisableLutLines(const GFXMMU_HandleTypeDef *hgfxmmu, 388 uint32_t FirstLine, 389 uint32_t LinesNumber); 390 391 HAL_StatusTypeDef HAL_GFXMMU_ConfigLutLine(const GFXMMU_HandleTypeDef *hgfxmmu, const GFXMMU_LutLineTypeDef *lutLine); 392 #if defined(GFXMMU_CR_CE) 393 394 HAL_StatusTypeDef HAL_GFXMMU_ConfigForceCache(GFXMMU_HandleTypeDef *hgfxmmu, uint32_t ForceParam); 395 396 HAL_StatusTypeDef HAL_GFXMMU_ModifyCachePrefetch(GFXMMU_HandleTypeDef *hgfxmmu, 397 const GFXMMU_CachePrefetchTypeDef *CachePrefetch); 398 #endif /* GFXMMU_CR_CE */ 399 400 HAL_StatusTypeDef HAL_GFXMMU_ModifyBuffers(GFXMMU_HandleTypeDef *hgfxmmu, const GFXMMU_BuffersTypeDef *Buffers); 401 #if defined(GFXMMU_CR_ACE) 402 HAL_StatusTypeDef HAL_GFXMMU_ModifyAddressCache(GFXMMU_HandleTypeDef *hgfxmmu, 403 const GFXMMU_AddressCacheTypeDef *AddressCache); 404 #endif /* GFXMMU_CR_ACE */ 405 406 void HAL_GFXMMU_IRQHandler(GFXMMU_HandleTypeDef *hgfxmmu); 407 408 void HAL_GFXMMU_ErrorCallback(GFXMMU_HandleTypeDef *hgfxmmu); 409 /** 410 * @} 411 */ 412 413 /** @defgroup GFXMMU_Exported_Functions_Group3 State functions 414 * @{ 415 */ 416 /* State function *************************************************************/ 417 HAL_GFXMMU_StateTypeDef HAL_GFXMMU_GetState(const GFXMMU_HandleTypeDef *hgfxmmu); 418 419 uint32_t HAL_GFXMMU_GetError(GFXMMU_HandleTypeDef *hgfxmmu); 420 /** 421 * @} 422 */ 423 424 /** 425 * @} 426 */ 427 /* End of exported functions -------------------------------------------------*/ 428 429 /* Private macros ------------------------------------------------------------*/ 430 /** @defgroup GFXMMU_Private_Macros GFXMMU Private Macros 431 * @{ 432 */ 433 #define IS_GFXMMU_BLOCKS_PER_LINE(VALUE) (((VALUE) == GFXMMU_256BLOCKS) || \ 434 ((VALUE) == GFXMMU_192BLOCKS)) 435 436 #define IS_GFXMMU_LUT_LINE_OFFSET(VALUE) (((VALUE) >= -4080) && ((VALUE) <= 4190208)) 437 438 #define IS_GFXMMU_BUFFER_ADDRESS(VALUE) (((VALUE) & 0xFU) == 0U) 439 440 #define IS_GFXMMU_CACHE_LOCK(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_DISABLE) || \ 441 ((VALUE) == GFXMMU_CACHE_LOCK_ENABLE)) 442 443 #define IS_GFXMMU_CACHE_LOCK_BUFFER(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_BUFFER0) || \ 444 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER1) || \ 445 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER2) || \ 446 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER3)) 447 448 #define IS_GFXMMU_CACHE_FORCE(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_DISABLE) || \ 449 ((VALUE) == GFXMMU_CACHE_FORCE_ENABLE)) 450 451 #define IS_GFXMMU_OUTTER_BUFFERABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_DISABLE) || \ 452 ((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_ENABLE)) 453 454 #define IS_GFXMMU_OUTTER_CACHABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_CACHABILITY_DISABLE) || \ 455 ((VALUE) == GFXMMU_OUTTER_CACHABILITY_ENABLE)) 456 457 #define IS_GFXMMU_PREFETCH(VALUE) (((VALUE) == GFXMMU_PREFETCH_DISABLE) || \ 458 ((VALUE) == GFXMMU_PREFETCH_ENABLE)) 459 460 #if defined(GFXMMU_CR_ACE) 461 #define IS_GFXMMU_ADDRESSCACHE_LOCK_BUFFER(VALUE) (((VALUE) == GFXMMU_ADDRESSCACHE_LOCK_BUFFER0) || \ 462 ((VALUE) == GFXMMU_ADDRESSCACHE_LOCK_BUFFER1) || \ 463 ((VALUE) == GFXMMU_ADDRESSCACHE_LOCK_BUFFER2) || \ 464 ((VALUE) == GFXMMU_ADDRESSCACHE_LOCK_BUFFER3)) 465 #endif /* GFXMMU_CR_ACE */ 466 467 #define IS_GFXMMU_CACHE_FORCE_ACTION(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_FLUSH) || \ 468 ((VALUE) == GFXMMU_CACHE_FORCE_INVALIDATE) || \ 469 ((VALUE) == (GFXMMU_CACHE_FORCE_FLUSH | GFXMMU_CACHE_FORCE_INVALIDATE))) 470 471 #define IS_GFXMMU_INTERRUPTS(VALUE) (((VALUE) & 0x1FU) != 0U) 472 473 #define IS_GFXMMU_LUT_LINE(VALUE) ((VALUE) < 1024U) 474 475 #define IS_GFXMMU_LUT_LINES_NUMBER(VALUE) (((VALUE) > 0U) && ((VALUE) <= 1024U)) 476 477 #define IS_GFXMMU_LUT_LINE_STATUS(VALUE) (((VALUE) == GFXMMU_LUT_LINE_DISABLE) || \ 478 ((VALUE) == GFXMMU_LUT_LINE_ENABLE)) 479 480 #define IS_GFXMMU_LUT_BLOCK(VALUE) ((VALUE) < 256U) 481 482 /** 483 * @} 484 */ 485 /* End of private macros -----------------------------------------------------*/ 486 487 /** 488 * @} 489 */ 490 491 /** 492 * @} 493 */ 494 #endif /* GFXMMU */ 495 #ifdef __cplusplus 496 } 497 #endif 498 499 #endif /* STM32U5xx_HAL_GFXMMU_H */ 500
