1 /* 2 * Copyright (c) 2024 Shen Xuyang <shenxuyang@shlinyuantech.com> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 #ifndef IST3931_DISPLAY_DRIVER_H__ 7 #define IST3931_DISPLAY_DRIVER_H__ 8 9 #define IST3931_CMD_NOP 0xe3 10 #define IST3931_CMD_IST_COMMAND_ENTRY 0x88 11 #define IST3931_CMD_EXIT_ENTRY 0xe3 12 #define IST3931_CMD_IST_COM_MAPPING 0x60 13 #define IST3931_CMD_POWER_CONTROL 0x2c 14 #define IST3931_CMD_BIAS 0x30 15 #define IST3931_CMD_CT 0xb1 16 #define IST3931_CMD_FRAME_CONTROL 0xb2 17 #define IST3931_CMD_SET_AX_ADD 0xc0 18 #define IST3931_CMD_SET_AY_ADD_LSB 0x00 19 #define IST3931_CMD_SET_AY_ADD_MSB 0x10 20 #define IST3931_CMD_SET_START_LINE_LSB 0x40 21 #define IST3931_CMD_SET_START_LINE_MSB 0x50 22 #define IST3931_CMD_OSC_CONTROL 0x2a 23 #define IST3931_CMD_DRIVER_DISPLAY_CONTROL 0x60 24 #define IST3931_CMD_SW_RESET 0x76 25 #define IST3931_CMD_SET_DUTY_LSB 0x90 26 #define IST3931_CMD_SET_DUTY_MSB 0xa0 27 #define IST3931_CMD_DISPLAY_ON_OFF 0x3c 28 #define IST3931_CMD_SLEEP_MODE 0x38 29 30 #define IST3931_CMD_BYTE 0x80 31 #define IST3931_DATA_BYTE 0xc0 32 #define IST3931_RESET_DELAY 50 33 #define IST3931_CMD_DELAY 10 34 #define IST3931_RAM_WIDTH 144 35 #define IST3931_RAM_HEIGHT 65 36 #endif /* _ZEPHYR_DRIVERS_DISPLAY_IST3931_H_ */ 37
