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Searched defs:IPCR1 (Results 1 – 25 of 74) sorted by relevance

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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h19564 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
33926 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h19580 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
33943 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h20532 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
35501 …__IO uint32_t IPCR1; /**< IP Command control register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h21864 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
36903 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h21866 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
40313 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h21317 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
39767 …__IO uint32_t IPCR1; /**< IP Command control register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h22242 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
37790 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h23028 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
41984 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h23097 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
41978 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h7261 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
DMIMXRT685S_cm33.h13363 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h13519 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h37709 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
66838 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
DMIMXRT1165_cm4.h37706 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
67771 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h13363 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h16118 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h39713 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
73236 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
DMIMXRT1166_cm7.h39716 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
72303 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h12999 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h12315 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h12315 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h48833 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
78022 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
DMIMXRT1175_cm4.h48830 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
78955 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h48833 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
78022 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm7.h50837 __IO uint32_t IPCR1; /**< IP Control Register 1, offset: 0xA4 */ member
83484 …__IO uint32_t IPCR1; /**< IP Command Control Register 1, offset: 0x94 … member

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