/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/qspi/ |
D | fsl_qspi.h | 292 __IO uint32_t IPCR; /*!< IP Configuration Register */ member
|
/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/ |
D | S32K344_QUADSPI.h | 79 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_QUADSPI.h | 81 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK80F25615/ |
D | MK80F25615.h | 18257 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK82F25615/ |
D | MK82F25615.h | 19230 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK27FA15/ |
D | MK27FA15.h | 17759 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK28FA15/ |
D | MK28FA15.h | 17761 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
D | MCIMX7U5_cm4.h | 25101 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
D | MCIMX7U3_cm4.h | 25100 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ7/ |
D | MIMX8MQ7_cm4.h | 46163 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ5/ |
D | MIMX8MQ5_cm4.h | 43990 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ6/ |
D | MIMX8MQ6_cm4.h | 46163 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD6/ |
D | MIMX8MD6_cm4.h | 46163 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD7/ |
D | MIMX8MD7_cm4.h | 46163 __IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8 */ member
|
/hal_nxp-3.5.0/imx/devices/MCIMX6X/ |
D | MCIMX6X_M4.h | 30416 …__IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8… member
|
/hal_nxp-3.5.0/imx/devices/MCIMX7D/ |
D | MCIMX7D_M4.h | 37614 …__IO uint32_t IPCR; /**< IP Configuration Register, offset: 0x8… member
|