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Searched defs:IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (Results 1 – 25 of 48) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h16555 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h19138 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h22601 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h22585 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h24988 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h23536 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h24321 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h25374 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h24990 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h26160 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h26159 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h34962 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h34960 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h34962 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_ca53.h34983 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
DMIMX8MN6_cm7.h34960 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h34962 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h34960 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h34643 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h34643 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h34643 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h34643 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h34643 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x40U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h45018 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x4U) macro
DMIMXRT1165_cm7.h45021 #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x4U) macro

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