1 /* ioapic_priv.h - private IOAPIC APIs */ 2 3 /* 4 * Copyright (c) 2012-2015 Wind River Systems, Inc. 5 * Copyright (c) 2015 Intel Corporation 6 * 7 * SPDX-License-Identifier: Apache-2.0 8 */ 9 10 #ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_IOAPIC_PRIV_H_ 11 #define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_IOAPIC_PRIV_H_ 12 13 /* IO APIC direct register offsets */ 14 15 #define IOAPIC_IND 0x00 /* Index Register */ 16 #define IOAPIC_DATA 0x10 /* IO window (data) - pc.h */ 17 #define IOAPIC_IRQPA 0x20 /* IRQ Pin Assertion Register */ 18 #define IOAPIC_EOI 0x40 /* EOI Register */ 19 20 /* IO APIC indirect register offset */ 21 22 #define IOAPIC_ID 0x00 /* IOAPIC ID */ 23 #define IOAPIC_VERS 0x01 /* IOAPIC Version */ 24 #define IOAPIC_ARB 0x02 /* IOAPIC Arbitration ID */ 25 #define IOAPIC_BOOT 0x03 /* IOAPIC Boot Configuration */ 26 #define IOAPIC_REDTBL 0x10 /* Redirection Table (24 * 64bit) */ 27 28 /* Interrupt delivery type */ 29 30 #define IOAPIC_DT_APIC 0x0 /* APIC serial bus */ 31 #define IOAPIC_DT_FS 0x1 /* Front side bus message*/ 32 33 /* Version register bits */ 34 35 #define IOAPIC_MRE_MASK 0x00ff0000 /* Max Red. entry mask */ 36 #define IOAPIC_MRE_POS 16 37 #define IOAPIC_PRQ 0x00008000 /* this has IRQ reg */ 38 #define IOAPIC_VERSION 0x000000ff /* version number */ 39 40 /* Redirection table entry bits: upper 32 bit */ 41 42 #define IOAPIC_DESTINATION 0xff000000 43 44 /* Redirection table entry bits: lower 32 bit */ 45 46 #define IOAPIC_VEC_MASK 0x000000ff 47 48 /* VTD related macros */ 49 50 #define IOAPIC_VTD_REMAP_FORMAT BIT(16) 51 /* We care only about the first 14 bits. 52 * The 15th bits is in the first 32bits of RTE but since 53 * we don't go up to that value, let's ignore it. 54 */ 55 #define IOAPIC_VTD_INDEX(index) (index << 17) 56 57 #endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_IOAPIC_PRIV_H_ */ 58
