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Searched defs:INTR_M (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_scb.h91 __IOM uint32_t INTR_M; /*!< 0x00000F00 Master interrupt request */ member
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_scb_v2.h93 __IOM uint32_t INTR_M; /*!< 0x00000F00 Master interrupt request */ member
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_scb_v4.h97 __IOM uint32_t INTR_M; /*!< 0x00000F00 Master interrupt request */ member