1 /* Copyright (c) 2022 Intel Corporation
2  * SPDX-License-Identifier: Apache-2.0
3  */
4 #ifndef ZEPHYR_SOC_INTEL_ADSP_ACE_IMR_LAYOUT_H_
5 #define ZEPHYR_SOC_INTEL_ADSP_ACE_IMR_LAYOUT_H_
6 
7 /* These structs and macros are from the ROM code header
8  * on cAVS platforms, please keep them immutable
9  */
10 
11 /*
12  * A magic that tells ROM to jump to imr_restore_vector instead of normal boot
13  */
14 #define ADSP_IMR_MAGIC_VALUE		0x02468ACE
15 #define IMR_LAYOUT_OFFSET               0x20000
16 #define IMR_LAYOUT_ADDRESS              (L3_MEM_BASE_ADDR + IMR_LAYOUT_OFFSET)
17 
18 struct imr_header {
19 	uint32_t adsp_imr_magic;
20 	uint32_t structure_version;
21 	uint32_t structure_size;
22 	uint32_t imr_state;
23 	uint32_t imr_size;
24 	void *imr_restore_vector;
25 	void *imr_auth_api_vector;
26 	uint8_t *imr_ram_storage;
27 };
28 
29 struct imr_state {
30 	struct imr_header header;
31 	uint8_t reserved[0x1000 - sizeof(struct imr_header)];
32 };
33 
34 struct imr_layout {
35 	struct imr_state    imr_state;
36 };
37 
38 #endif /* ZEPHYR_SOC_INTEL_ADSP_ACE_IMR_LAYOUT_H_ */
39