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Searched defs:IMR_BOOT_LDR_MANIFEST_BASE (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.4.0/soc/xtensa/intel_adsp/cavs/include/intel_tgl_adsp/
Dadsp_memory.h34 #define IMR_BOOT_LDR_MANIFEST_BASE 0xB0032000 macro
/Zephyr-Core-3.4.0/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/
Dadsp_memory.h46 #define IMR_BOOT_LDR_MANIFEST_BASE (L3_MEM_BASE_ADDR + IMR_BOOT_LDR_MANIFEST_OFFSET) macro
/Zephyr-Core-3.4.0/soc/xtensa/intel_adsp/ace/include/intel_ace20_lnl/
Dadsp_memory.h44 #define IMR_BOOT_LDR_MANIFEST_BASE (L3_MEM_BASE_ADDR + IMR_BOOT_LDR_MANIFEST_OFFSET) macro