1 /* 2 * Copyright (c) 2020 Teslabs Engineering S.L. 3 * Copyright (c) 2021 Krivorot Oleg <krivorot.oleg@gmail.com> 4 * Copyright (c) 2022 Konstantinos Papadopoulos <kostas.papadopulos@gmail.com> 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 */ 8 #ifndef ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9341_H_ 9 #define ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9341_H_ 10 11 #include <zephyr/device.h> 12 13 /* Commands/registers. */ 14 #define ILI9341_GAMSET 0x26 15 #define ILI9341_IFMODE 0xB0 16 #define ILI9341_FRMCTR1 0xB1 17 #define ILI9341_DISCTRL 0xB6 18 #define ILI9341_ETMOD 0xB7 19 #define ILI9341_PWCTRL1 0xC0 20 #define ILI9341_PWCTRL2 0xC1 21 #define ILI9341_VMCTRL1 0xC5 22 #define ILI9341_VMCTRL2 0xC7 23 #define ILI9341_PWCTRLA 0xCB 24 #define ILI9341_PWCTRLB 0xCF 25 #define ILI9341_PGAMCTRL 0xE0 26 #define ILI9341_NGAMCTRL 0xE1 27 #define ILI9341_TIMCTRLA 0xE8 28 #define ILI9341_TIMCTRLB 0xEA 29 #define ILI9341_PWSEQCTRL 0xED 30 #define ILI9341_ENABLE3G 0xF2 31 #define ILI9341_IFCTL 0xF6 32 #define ILI9341_PUMPRATIOCTRL 0xF7 33 34 /* Commands/registers length. */ 35 #define ILI9341_GAMSET_LEN 1U 36 #define ILI9341_IFMODE_LEN 1U 37 #define ILI9341_FRMCTR1_LEN 2U 38 #define ILI9341_DISCTRL_LEN 4U 39 #define ILI9341_PWCTRL1_LEN 1U 40 #define ILI9341_PWCTRL2_LEN 1U 41 #define ILI9341_VMCTRL1_LEN 2U 42 #define ILI9341_VMCTRL2_LEN 1U 43 #define ILI9341_PGAMCTRL_LEN 15U 44 #define ILI9341_NGAMCTRL_LEN 15U 45 #define ILI9341_PWCTRLA_LEN 5U 46 #define ILI9341_PWCTRLB_LEN 3U 47 #define ILI9341_PWSEQCTRL_LEN 4U 48 #define ILI9341_TIMCTRLA_LEN 3U 49 #define ILI9341_TIMCTRLB_LEN 2U 50 #define ILI9341_PUMPRATIOCTRL_LEN 1U 51 #define ILI9341_ENABLE3G_LEN 1U 52 #define ILI9341_IFCTL_LEN 3U 53 #define ILI9341_ETMOD_LEN 1U 54 55 /** X resolution (pixels). */ 56 #define ILI9341_X_RES 240U 57 /** Y resolution (pixels). */ 58 #define ILI9341_Y_RES 320U 59 60 /** ILI9341 registers to be initialized. */ 61 struct ili9341_regs { 62 uint8_t gamset[ILI9341_GAMSET_LEN]; 63 uint8_t ifmode[ILI9341_IFMODE_LEN]; 64 uint8_t frmctr1[ILI9341_FRMCTR1_LEN]; 65 uint8_t disctrl[ILI9341_DISCTRL_LEN]; 66 uint8_t pwctrl1[ILI9341_PWCTRL1_LEN]; 67 uint8_t pwctrl2[ILI9341_PWCTRL2_LEN]; 68 uint8_t vmctrl1[ILI9341_VMCTRL1_LEN]; 69 uint8_t vmctrl2[ILI9341_VMCTRL2_LEN]; 70 uint8_t pgamctrl[ILI9341_PGAMCTRL_LEN]; 71 uint8_t ngamctrl[ILI9341_NGAMCTRL_LEN]; 72 uint8_t pwctrla[ILI9341_PWCTRLA_LEN]; 73 uint8_t pwctrlb[ILI9341_PWCTRLB_LEN]; 74 uint8_t pwseqctrl[ILI9341_PWSEQCTRL_LEN]; 75 uint8_t timctrla[ILI9341_TIMCTRLA_LEN]; 76 uint8_t timctrlb[ILI9341_TIMCTRLB_LEN]; 77 uint8_t pumpratioctrl[ILI9341_PUMPRATIOCTRL_LEN]; 78 uint8_t enable3g[ILI9341_ENABLE3G_LEN]; 79 uint8_t ifctl[ILI9341_IFCTL_LEN]; 80 uint8_t etmod[ILI9341_ETMOD_LEN]; 81 }; 82 83 /* Initializer macro for ILI9341 registers. */ 84 #define ILI9341_REGS_INIT(n) \ 85 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), gamset) == ILI9341_GAMSET_LEN, \ 86 "ili9341: Error length gamma set (GAMSET) register"); \ 87 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), ifmode) == ILI9341_IFMODE_LEN, \ 88 "ili9341: Error length frame rate control (IFMODE) register"); \ 89 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), frmctr1) == ILI9341_FRMCTR1_LEN, \ 90 "ili9341: Error length frame rate control (FRMCTR1) register"); \ 91 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), disctrl) == ILI9341_DISCTRL_LEN, \ 92 "ili9341: Error length display function control (DISCTRL) register"); \ 93 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrl1) == ILI9341_PWCTRL1_LEN, \ 94 "ili9341: Error length power control 1 (PWCTRL1) register"); \ 95 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrl2) == ILI9341_PWCTRL2_LEN, \ 96 "ili9341: Error length power control 2 (PWCTRL2) register"); \ 97 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), vmctrl1) == ILI9341_VMCTRL1_LEN, \ 98 "ili9341: Error length VCOM control 1 (VMCTRL1) register"); \ 99 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), vmctrl2) == ILI9341_VMCTRL2_LEN, \ 100 "ili9341: Error length VCOM control 2 (VMCTRL2) register"); \ 101 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pgamctrl) == ILI9341_PGAMCTRL_LEN, \ 102 "ili9341: Error length positive gamma correction (PGAMCTRL) register"); \ 103 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), ngamctrl) == ILI9341_NGAMCTRL_LEN, \ 104 "ili9341: Error length negative gamma correction (NGAMCTRL) register"); \ 105 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrla) == ILI9341_PWCTRLA_LEN, \ 106 "ili9341: Error length power control A (PWCTRLA) register"); \ 107 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrlb) == ILI9341_PWCTRLB_LEN, \ 108 "ili9341: Error length power control B (PWCTRLB) register"); \ 109 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwseqctrl) == ILI9341_PWSEQCTRL_LEN, \ 110 "ili9341: Error length power on sequence control (PWSEQCTRL) register"); \ 111 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), timctrla) == ILI9341_TIMCTRLA_LEN, \ 112 "ili9341: Error length driver timing control A (TIMCTRLA) register"); \ 113 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), timctrlb) == ILI9341_TIMCTRLB_LEN, \ 114 "ili9341: Error length driver timing control B (TIMCTRLB) register"); \ 115 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pumpratioctrl) == \ 116 ILI9341_PUMPRATIOCTRL_LEN, \ 117 "ili9341: Error length Pump ratio control (PUMPRATIOCTRL) register"); \ 118 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), enable3g) == ILI9341_ENABLE3G_LEN, \ 119 "ili9341: Error length enable 3G (ENABLE3G) register"); \ 120 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), ifctl) == ILI9341_IFCTL_LEN, \ 121 "ili9341: Error length frame rate control (IFCTL) register"); \ 122 BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), etmod) == ILI9341_ETMOD_LEN, \ 123 "ili9341: Error length entry Mode Set (ETMOD) register"); \ 124 static const struct ili9341_regs ili9341_regs_##n = { \ 125 .gamset = DT_PROP(DT_INST(n, ilitek_ili9341), gamset), \ 126 .ifmode = DT_PROP(DT_INST(n, ilitek_ili9341), ifmode), \ 127 .frmctr1 = DT_PROP(DT_INST(n, ilitek_ili9341), frmctr1), \ 128 .disctrl = DT_PROP(DT_INST(n, ilitek_ili9341), disctrl), \ 129 .pwctrl1 = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrl1), \ 130 .pwctrl2 = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrl2), \ 131 .vmctrl1 = DT_PROP(DT_INST(n, ilitek_ili9341), vmctrl1), \ 132 .vmctrl2 = DT_PROP(DT_INST(n, ilitek_ili9341), vmctrl2), \ 133 .pgamctrl = DT_PROP(DT_INST(n, ilitek_ili9341), pgamctrl), \ 134 .ngamctrl = DT_PROP(DT_INST(n, ilitek_ili9341), ngamctrl), \ 135 .pwctrla = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrla), \ 136 .pwctrlb = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrlb), \ 137 .pwseqctrl = DT_PROP(DT_INST(n, ilitek_ili9341), pwseqctrl), \ 138 .timctrla = DT_PROP(DT_INST(n, ilitek_ili9341), timctrla), \ 139 .timctrlb = DT_PROP(DT_INST(n, ilitek_ili9341), timctrlb), \ 140 .pumpratioctrl = DT_PROP(DT_INST(n, ilitek_ili9341), pumpratioctrl), \ 141 .enable3g = DT_PROP(DT_INST(n, ilitek_ili9341), enable3g), \ 142 .ifctl = DT_PROP(DT_INST(n, ilitek_ili9341), ifctl), \ 143 .etmod = DT_PROP(DT_INST(n, ilitek_ili9341), etmod), \ 144 } 145 146 /** 147 * @brief Initialize ILI9341 registers with DT values. 148 * 149 * @param dev ILI9341 device instance 150 * @return 0 on success, errno otherwise. 151 */ 152 int ili9341_regs_init(const struct device *dev); 153 154 #endif /* ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9341_H_ */ 155
