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Searched defs:I3C_MDATACTRL_RXCOUNT_MASK (Results 1 – 25 of 34) sorted by relevance

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/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_I3C.h986 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC864/
DLPC864.h6240 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC865/
DLPC865.h6242 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h11670 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
DMIMXRT685S_cm33.h18411 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h18411 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h23849 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h21184 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
DMIMXRT595S_cm33.h28143 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h23849 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h28142 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h28139 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h23848 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h36128 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
DMCXN946_cm33_core1.h36128 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core1.h35701 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
DMCXN547_cm33_core0.h35701 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h35701 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
DMCXN546_cm33_core1.h35701 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core0.h36128 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
DMCXN947_cm33_core1.h36128 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h42731 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
DMIMX9352_ca55.h37915 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD3/
DMIMX8UD3_cm33.h20804 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD7/
DMIMX8UD7_cm33.h20804 #define I3C_MDATACTRL_RXCOUNT_MASK (0x1F000000U) macro

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