1 /**************************************************************************//**
2 * @file i2s.c
3 * @version V0.10
4 * @brief M480 I2S driver source file
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 * @copyright (C) 2016-2020 Nuvoton Technology Corp. All rights reserved.
8 *****************************************************************************/
9
10 #include <stdio.h>
11 #include "NuMicro.h"
12
13 /** @addtogroup Standard_Driver Standard Driver
14 @{
15 */
16
17 /** @addtogroup I2S_Driver I2S Driver
18 @{
19 */
20
21 /** @addtogroup I2S_EXPORTED_FUNCTIONS I2S Exported Functions
22 @{
23 */
24
25 static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s);
26
27 /**
28 * @brief This function is used to get I2S source clock frequency.
29 * @param[in] i2s is the base address of I2S module.
30 * @return I2S source clock frequency (Hz).
31 */
I2S_GetSourceClockFreq(I2S_T * i2s)32 static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
33 {
34 uint32_t u32Freq, u32ClkSrcSel;
35
36 /* get I2S selection clock source */
37 u32ClkSrcSel = CLK->CLKSEL3 & CLK_CLKSEL3_I2S0SEL_Msk;
38
39 switch (u32ClkSrcSel)
40 {
41 case CLK_CLKSEL3_I2S0SEL_HXT:
42 u32Freq = __HXT;
43 break;
44
45 case CLK_CLKSEL3_I2S0SEL_PLL:
46 u32Freq = CLK_GetPLLClockFreq();
47 break;
48
49 case CLK_CLKSEL3_I2S0SEL_HIRC:
50 u32Freq = __HIRC;
51 break;
52
53 case CLK_CLKSEL3_I2S0SEL_PCLK0:
54 u32Freq = (uint32_t)CLK_GetPCLK0Freq();
55 break;
56
57 default:
58 u32Freq = __HIRC;
59 break;
60 }
61
62 return u32Freq;
63 }
64
65 /**
66 * @brief This function configures some parameters of I2S interface for general purpose use.
67 * The sample rate may not be used from the parameter, it depends on system's clock settings,
68 * but real sample rate used by system will be returned for reference.
69 * @param[in] i2s is the base address of I2S module.
70 * @param[in] u32MasterSlave I2S operation mode. Valid values are:
71 * - \ref I2S_MODE_MASTER
72 * - \ref I2S_MODE_SLAVE
73 * @param[in] u32SampleRate Sample rate
74 * @param[in] u32WordWidth Data length. Valid values are:
75 * - \ref I2S_DATABIT_8
76 * - \ref I2S_DATABIT_16
77 * - \ref I2S_DATABIT_24
78 * - \ref I2S_DATABIT_32
79 * @param[in] u32MonoData: Set audio data to mono or not. Valid values are:
80 * - \ref I2S_ENABLE_MONO
81 * - \ref I2S_DISABLE_MONO
82 * @param[in] u32DataFormat: Data format. This is also used to select I2S or PCM(TDM) function. Valid values are:
83 * - \ref I2S_FORMAT_I2S
84 * - \ref I2S_FORMAT_I2S_MSB
85 * - \ref I2S_FORMAT_I2S_LSB
86 * - \ref I2S_FORMAT_PCM
87 * - \ref I2S_FORMAT_PCM_MSB
88 * - \ref I2S_FORMAT_PCM_LSB
89 * @return Real sample rate.
90 */
I2S_Open(I2S_T * i2s,uint32_t u32MasterSlave,uint32_t u32SampleRate,uint32_t u32WordWidth,uint32_t u32MonoData,uint32_t u32DataFormat)91 uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32MonoData, uint32_t u32DataFormat)
92 {
93 uint16_t u16Divider;
94 uint32_t u32BitRate, u32SrcClk;
95
96 SYS->IPRST1 |= SYS_IPRST1_I2S0RST_Msk;
97 SYS->IPRST1 &= ~SYS_IPRST1_I2S0RST_Msk;
98
99 i2s->CTL0 = u32MasterSlave | u32WordWidth | u32MonoData | u32DataFormat;
100 i2s->CTL1 = I2S_FIFO_TX_LEVEL_WORD_8 | I2S_FIFO_RX_LEVEL_WORD_8;
101
102 u32SrcClk = I2S_GetSourceClockFreq(i2s);
103
104 u32BitRate = u32SampleRate * (((u32WordWidth>>4U) & 0x3U) + 1U) * 16U;
105 //u16Divider = (uint16_t)((u32SrcClk/u32BitRate) >> 1U) - 1U;
106 u16Divider = (uint16_t)((((u32SrcClk * 10UL / u32BitRate) >> 1U) + 5UL) / 10UL) - 1U;
107 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_BCLKDIV_Msk) | ((uint32_t)u16Divider << 8U);
108
109 /* calculate real sample rate */
110 u32BitRate = u32SrcClk / (2U*((uint32_t)u16Divider+1U));
111 u32SampleRate = u32BitRate / ((((u32WordWidth>>4U) & 0x3U) + 1U) * 16U);
112
113 i2s->CTL0 |= I2S_CTL0_I2SEN_Msk;
114
115 return u32SampleRate;
116 }
117
118 /**
119 * @brief Disable I2S function and I2S clock.
120 * @param[in] i2s is the base address of I2S module.
121 * @return none
122 */
I2S_Close(I2S_T * i2s)123 void I2S_Close(I2S_T *i2s)
124 {
125 i2s->CTL0 &= ~I2S_CTL0_I2SEN_Msk;
126 }
127
128 /**
129 * @brief This function enables the interrupt according to the mask parameter.
130 * @param[in] i2s is the base address of I2S module.
131 * @param[in] u32Mask is the combination of all related interrupt enable bits.
132 * Each bit corresponds to a interrupt bit.
133 * @return none
134 */
I2S_EnableInt(I2S_T * i2s,uint32_t u32Mask)135 void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
136 {
137 i2s->IEN |= u32Mask;
138 }
139
140 /**
141 * @brief This function disables the interrupt according to the mask parameter.
142 * @param[in] i2s is the base address of I2S module.
143 * @param[in] u32Mask is the combination of all related interrupt enable bits.
144 * Each bit corresponds to a interrupt bit.
145 * @return none
146 */
I2S_DisableInt(I2S_T * i2s,uint32_t u32Mask)147 void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
148 {
149 i2s->IEN &= ~u32Mask;
150 }
151
152 /**
153 * @brief Enable MCLK .
154 * @param[in] i2s is the base address of I2S module.
155 * @param[in] u32BusClock is the target MCLK clock
156 * @return Actual MCLK clock
157 */
I2S_EnableMCLK(I2S_T * i2s,uint32_t u32BusClock)158 uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
159 {
160 uint8_t u8Divider;
161 uint32_t u32SrcClk, u32Reg, u32Clock;
162
163 u32SrcClk = I2S_GetSourceClockFreq(i2s);
164 if (u32BusClock == u32SrcClk)
165 {
166 u8Divider = 0U;
167 }
168 else
169 {
170 u8Divider = (uint8_t)(u32SrcClk/u32BusClock) >> 1U;
171 }
172
173 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_MCLKDIV_Msk) | u8Divider;
174
175 i2s->CTL0 |= I2S_CTL0_MCLKEN_Msk;
176
177 u32Reg = i2s->CLKDIV & I2S_CLKDIV_MCLKDIV_Msk;
178
179 if (u32Reg == 0U)
180 {
181 u32Clock = u32SrcClk;
182 }
183 else
184 {
185 u32Clock = ((u32SrcClk >> 1U) / u32Reg);
186 }
187
188 return u32Clock;
189 }
190
191 /**
192 * @brief Disable MCLK .
193 * @param[in] i2s is the base address of I2S module.
194 * @return none
195 */
I2S_DisableMCLK(I2S_T * i2s)196 void I2S_DisableMCLK(I2S_T *i2s)
197 {
198 i2s->CTL0 &= ~I2S_CTL0_MCLKEN_Msk;
199 }
200
201 /**
202 * @brief Configure FIFO threshold setting.
203 * @param[in] i2s The pointer of the specified I2S module.
204 * @param[in] u32TxThreshold Decides the TX FIFO threshold. It could be 0 ~ 7.
205 * @param[in] u32RxThreshold Decides the RX FIFO threshold. It could be 0 ~ 7.
206 * @return None
207 * @details Set TX FIFO threshold and RX FIFO threshold configurations.
208 */
I2S_SetFIFO(I2S_T * i2s,uint32_t u32TxThreshold,uint32_t u32RxThreshold)209 void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
210 {
211 i2s->CTL1 = ((i2s->CTL1 & ~(I2S_CTL1_TXTH_Msk | I2S_CTL1_RXTH_Msk)) |
212 (u32TxThreshold << I2S_CTL1_TXTH_Pos) |
213 (u32RxThreshold << I2S_CTL1_RXTH_Pos));
214 }
215
216
217 /**
218 * @brief Configure PCM(TDM) function parameters, such as channel width, channel number and sync pulse width
219 * @param[in] i2s The pointer of the specified I2S module.
220 * @param[in] u32ChannelWidth Channel width. Valid values are:
221 * - \ref I2S_TDM_WIDTH_8BIT
222 * - \ref I2S_TDM_WIDTH_16BIT
223 * - \ref I2S_TDM_WIDTH_24BIT
224 * - \ref I2S_TDM_WIDTH_32BIT
225 * @param[in] u32ChannelNum Channel number. Valid values are:
226 * - \ref I2S_TDM_2CH
227 * - \ref I2S_TDM_4CH
228 * - \ref I2S_TDM_6CH
229 * - \ref I2S_TDM_8CH
230 * @param[in] u32SyncWidth Width for sync pulse. Valid values are:
231 * - \ref I2S_TDM_SYNC_ONE_BCLK
232 * - \ref I2S_TDM_SYNC_ONE_CHANNEL
233 * @return None
234 * @details Set TX FIFO threshold and RX FIFO threshold configurations.
235 */
I2S_ConfigureTDM(I2S_T * i2s,uint32_t u32ChannelWidth,uint32_t u32ChannelNum,uint32_t u32SyncWidth)236 void I2S_ConfigureTDM(I2S_T *i2s, uint32_t u32ChannelWidth, uint32_t u32ChannelNum, uint32_t u32SyncWidth)
237 {
238 i2s->CTL0 = ((i2s->CTL0 & ~(I2S_CTL0_TDMCHNUM_Msk | I2S_CTL0_CHWIDTH_Msk | I2S_CTL0_PCMSYNC_Msk)) |
239 (u32ChannelWidth << I2S_CTL0_CHWIDTH_Pos) |
240 (u32ChannelNum << I2S_CTL0_TDMCHNUM_Pos) |
241 (u32SyncWidth << I2S_CTL0_PCMSYNC_Pos));
242 }
243
244 /*@}*/ /* end of group I2S_EXPORTED_FUNCTIONS */
245
246 /*@}*/ /* end of group I2S_Driver */
247
248 /*@}*/ /* end of group Standard_Driver */
249
250 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
251
