1 /*
2  *  Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  *  Redistribution and use in source and binary forms, with or without
5  *  modification, are permitted provided that the following conditions
6  *  are met:
7  *
8  *    Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  *
11  *    Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the
14  *    distribution.
15  *
16  *    Neither the name of Texas Instruments Incorporated nor the names of
17  *    its contributors may be used to endorse or promote products derived
18  *    from this software without specific prior written permission.
19  *
20  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  *
32  */
33 //*****************************************************************************
34 //
35 //  i2c.h
36 //
37 //  Prototypes for the I2C Driver.
38 //
39 //*****************************************************************************
40 
41 #ifndef __DRIVERLIB_I2C_H__
42 #define __DRIVERLIB_I2C_H__
43 
44 //*****************************************************************************
45 //
46 // If building with a C++ compiler, make all of the definitions in this header
47 // have a C binding.
48 //
49 //*****************************************************************************
50 #ifdef __cplusplus
51 extern "C"
52 {
53 #endif
54 
55 //*****************************************************************************
56 //
57 // Defines for the API.
58 //
59 //*****************************************************************************
60 
61 //*****************************************************************************
62 //
63 // Interrupt defines.
64 //
65 //*****************************************************************************
66 #define I2C_INT_MASTER          0x00000001
67 #define I2C_INT_SLAVE           0x00000002
68 
69 //*****************************************************************************
70 //
71 // I2C Master commands.
72 //
73 //*****************************************************************************
74 #define I2C_MASTER_CMD_SINGLE_SEND                                            \
75                                 0x00000007
76 #define I2C_MASTER_CMD_SINGLE_RECEIVE                                         \
77                                 0x00000007
78 #define I2C_MASTER_CMD_BURST_SEND_START                                       \
79                                 0x00000003
80 #define I2C_MASTER_CMD_BURST_SEND_CONT                                        \
81                                 0x00000001
82 #define I2C_MASTER_CMD_BURST_SEND_FINISH                                      \
83                                 0x00000005
84 #define I2C_MASTER_CMD_BURST_SEND_STOP                                        \
85                                 0x00000004
86 #define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP                                  \
87                                 0x00000004
88 #define I2C_MASTER_CMD_BURST_RECEIVE_START                                    \
89                                 0x0000000b
90 #define I2C_MASTER_CMD_BURST_RECEIVE_CONT                                     \
91                                 0x00000009
92 #define I2C_MASTER_CMD_BURST_RECEIVE_FINISH                                   \
93                                 0x00000005
94 #define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP                               \
95                                 0x00000004
96 #define I2C_MASTER_CMD_QUICK_COMMAND                                          \
97                                 0x00000027
98 #define I2C_MASTER_CMD_HS_MASTER_CODE_SEND                                    \
99                                 0x00000013
100 #define I2C_MASTER_CMD_FIFO_SINGLE_SEND                                       \
101                                 0x00000046
102 #define I2C_MASTER_CMD_FIFO_SINGLE_RECEIVE                                    \
103                                 0x00000046
104 #define I2C_MASTER_CMD_FIFO_BURST_SEND_START                                  \
105                                 0x00000042
106 #define I2C_MASTER_CMD_FIFO_BURST_SEND_CONT                                   \
107                                 0x00000040
108 #define I2C_MASTER_CMD_FIFO_BURST_SEND_FINISH                                 \
109                                 0x00000044
110 #define I2C_MASTER_CMD_FIFO_BURST_SEND_ERROR_STOP                             \
111                                 0x00000004
112 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_START                               \
113                                 0x0000004a
114 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_CONT                                \
115                                 0x00000048
116 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_FINISH                              \
117                                 0x00000044
118 #define I2C_MASTER_CMD_FIFO_BURST_RECEIVE_ERROR_STOP                          \
119                                 0x00000004
120 
121 //*****************************************************************************
122 //
123 // I2C Master glitch filter configuration.
124 //
125 //*****************************************************************************
126 #define I2C_MASTER_GLITCH_FILTER_DISABLED                                     \
127                                 0
128 #define I2C_MASTER_GLITCH_FILTER_1                                            \
129                                 0x00010000
130 #define I2C_MASTER_GLITCH_FILTER_2                                            \
131                                 0x00020000
132 #define I2C_MASTER_GLITCH_FILTER_3                                            \
133                                 0x00030000
134 #define I2C_MASTER_GLITCH_FILTER_4                                            \
135                                 0x00040000
136 #define I2C_MASTER_GLITCH_FILTER_8                                            \
137                                 0x00050000
138 #define I2C_MASTER_GLITCH_FILTER_16                                           \
139                                 0x00060000
140 #define I2C_MASTER_GLITCH_FILTER_32                                           \
141                                 0x00070000
142 
143 //*****************************************************************************
144 //
145 // I2C Master error status.
146 //
147 //*****************************************************************************
148 #define I2C_MASTER_ERR_NONE     0
149 #define I2C_MASTER_ERR_ADDR_ACK 0x00000004
150 #define I2C_MASTER_ERR_DATA_ACK 0x00000008
151 #define I2C_MASTER_ERR_ARB_LOST 0x00000010
152 #define I2C_MASTER_ERR_CLK_TOUT 0x00000080
153 
154 //*****************************************************************************
155 //
156 // I2C Slave action requests
157 //
158 //*****************************************************************************
159 #define I2C_SLAVE_ACT_NONE      0
160 #define I2C_SLAVE_ACT_RREQ      0x00000001  // Master has sent data
161 #define I2C_SLAVE_ACT_TREQ      0x00000002  // Master has requested data
162 #define I2C_SLAVE_ACT_RREQ_FBR  0x00000005  // Master has sent first byte
163 #define I2C_SLAVE_ACT_OWN2SEL   0x00000008  // Master requested secondary slave
164 #define I2C_SLAVE_ACT_QCMD      0x00000010  // Master has sent a Quick Command
165 #define I2C_SLAVE_ACT_QCMD_DATA 0x00000020  // Master Quick Command value
166 
167 //*****************************************************************************
168 //
169 // Miscellaneous I2C driver definitions.
170 //
171 //*****************************************************************************
172 #define I2C_MASTER_MAX_RETRIES  1000        // Number of retries
173 
174 //*****************************************************************************
175 //
176 // I2C Master interrupts.
177 //
178 //*****************************************************************************
179 #define I2C_MASTER_INT_RX_FIFO_FULL                                           \
180                                 0x00000800  // RX FIFO Full Interrupt
181 #define I2C_MASTER_INT_TX_FIFO_EMPTY                                          \
182                                 0x00000400  // TX FIFO Empty Interrupt
183 #define I2C_MASTER_INT_RX_FIFO_REQ                                            \
184                                 0x00000200  // RX FIFO Request Interrupt
185 #define I2C_MASTER_INT_TX_FIFO_REQ                                            \
186                                 0x00000100  // TX FIFO Request Interrupt
187 #define I2C_MASTER_INT_ARB_LOST                                               \
188                                 0x00000080  // Arb Lost Interrupt
189 #define I2C_MASTER_INT_STOP     0x00000040  // Stop Condition Interrupt
190 #define I2C_MASTER_INT_START    0x00000020  // Start Condition Interrupt
191 #define I2C_MASTER_INT_NACK     0x00000010  // Addr/Data NACK Interrupt
192 #define I2C_MASTER_INT_TX_DMA_DONE                                            \
193                                 0x00000008  // TX DMA Complete Interrupt
194 #define I2C_MASTER_INT_RX_DMA_DONE                                            \
195                                 0x00000004  // RX DMA Complete Interrupt
196 #define I2C_MASTER_INT_TIMEOUT  0x00000002  // Clock Timeout Interrupt
197 #define I2C_MASTER_INT_DATA     0x00000001  // Data Interrupt
198 
199 //*****************************************************************************
200 //
201 // I2C Slave interrupts.
202 //
203 //*****************************************************************************
204 #define I2C_SLAVE_INT_RX_FIFO_FULL                                            \
205                                 0x00000100  // RX FIFO Full Interrupt
206 #define I2C_SLAVE_INT_TX_FIFO_EMPTY                                           \
207                                 0x00000080  // TX FIFO Empty Interrupt
208 #define I2C_SLAVE_INT_RX_FIFO_REQ                                             \
209                                 0x00000040  // RX FIFO Request Interrupt
210 #define I2C_SLAVE_INT_TX_FIFO_REQ                                             \
211                                 0x00000020  // TX FIFO Request Interrupt
212 #define I2C_SLAVE_INT_TX_DMA_DONE                                             \
213                                 0x00000010  // TX DMA Complete Interrupt
214 #define I2C_SLAVE_INT_RX_DMA_DONE                                             \
215                                 0x00000008  // RX DMA Complete Interrupt
216 #define I2C_SLAVE_INT_STOP      0x00000004  // Stop Condition Interrupt
217 #define I2C_SLAVE_INT_START     0x00000002  // Start Condition Interrupt
218 #define I2C_SLAVE_INT_DATA      0x00000001  // Data Interrupt
219 
220 //*****************************************************************************
221 //
222 // I2C Slave FIFO configuration macros.
223 //
224 //*****************************************************************************
225 #define I2C_SLAVE_TX_FIFO_ENABLE                                              \
226                                 0x00000002
227 #define I2C_SLAVE_RX_FIFO_ENABLE                                              \
228                                 0x00000004
229 
230 //*****************************************************************************
231 //
232 // I2C FIFO configuration macros.
233 //
234 //*****************************************************************************
235 #define I2C_FIFO_CFG_TX_MASTER  0x00000000
236 #define I2C_FIFO_CFG_TX_SLAVE   0x00008000
237 #define I2C_FIFO_CFG_RX_MASTER  0x00000000
238 #define I2C_FIFO_CFG_RX_SLAVE   0x80000000
239 #define I2C_FIFO_CFG_TX_MASTER_DMA                                            \
240                                 0x00002000
241 #define I2C_FIFO_CFG_TX_SLAVE_DMA                                             \
242                                 0x0000a000
243 #define I2C_FIFO_CFG_RX_MASTER_DMA                                            \
244                                 0x20000000
245 #define I2C_FIFO_CFG_RX_SLAVE_DMA                                             \
246                                 0xa0000000
247 #define I2C_FIFO_CFG_TX_NO_TRIG 0x00000000
248 #define I2C_FIFO_CFG_TX_TRIG_1  0x00000001
249 #define I2C_FIFO_CFG_TX_TRIG_2  0x00000002
250 #define I2C_FIFO_CFG_TX_TRIG_3  0x00000003
251 #define I2C_FIFO_CFG_TX_TRIG_4  0x00000004
252 #define I2C_FIFO_CFG_TX_TRIG_5  0x00000005
253 #define I2C_FIFO_CFG_TX_TRIG_6  0x00000006
254 #define I2C_FIFO_CFG_TX_TRIG_7  0x00000007
255 #define I2C_FIFO_CFG_TX_TRIG_8  0x00000008
256 #define I2C_FIFO_CFG_RX_NO_TRIG 0x00000000
257 #define I2C_FIFO_CFG_RX_TRIG_1  0x00010000
258 #define I2C_FIFO_CFG_RX_TRIG_2  0x00020000
259 #define I2C_FIFO_CFG_RX_TRIG_3  0x00030000
260 #define I2C_FIFO_CFG_RX_TRIG_4  0x00040000
261 #define I2C_FIFO_CFG_RX_TRIG_5  0x00050000
262 #define I2C_FIFO_CFG_RX_TRIG_6  0x00060000
263 #define I2C_FIFO_CFG_RX_TRIG_7  0x00070000
264 #define I2C_FIFO_CFG_RX_TRIG_8  0x00080000
265 
266 //*****************************************************************************
267 //
268 // I2C FIFO status.
269 //
270 //*****************************************************************************
271 #define I2C_FIFO_RX_BELOW_TRIG_LEVEL                                          \
272                                 0x00040000
273 #define I2C_FIFO_RX_FULL        0x00020000
274 #define I2C_FIFO_RX_EMPTY       0x00010000
275 #define I2C_FIFO_TX_BELOW_TRIG_LEVEL                                          \
276                                 0x00000004
277 #define I2C_FIFO_TX_FULL        0x00000002
278 #define I2C_FIFO_TX_EMPTY       0x00000001
279 
280 //*****************************************************************************
281 //
282 // Prototypes for the APIs.
283 //
284 //*****************************************************************************
285 extern void I2CIntRegister(uint32_t ui32Base, void(pfnHandler)(void));
286 extern void I2CIntUnregister(uint32_t ui32Base);
287 extern void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
288 extern void I2CTxFIFOFlush(uint32_t ui32Base);
289 extern void I2CRxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config);
290 extern void I2CRxFIFOFlush(uint32_t ui32Base);
291 extern uint32_t I2CFIFOStatus(uint32_t ui32Base);
292 extern void I2CFIFODataPut(uint32_t ui32Base, uint8_t ui8Data);
293 extern uint32_t I2CFIFODataPutNonBlocking(uint32_t ui32Base,
294                                           uint8_t ui8Data);
295 extern uint32_t I2CFIFODataGet(uint32_t ui32Base);
296 extern uint32_t I2CFIFODataGetNonBlocking(uint32_t ui32Base,
297                                           uint8_t *pui8Data);
298 extern void I2CMasterBurstLengthSet(uint32_t ui32Base,
299                                     uint8_t ui8Length);
300 extern uint32_t I2CMasterBurstCountGet(uint32_t ui32Base);
301 extern void I2CMasterGlitchFilterConfigSet(uint32_t ui32Base,
302                                            uint32_t ui32Config);
303 extern void I2CSlaveFIFOEnable(uint32_t ui32Base, uint32_t ui32Config);
304 extern void I2CSlaveFIFODisable(uint32_t ui32Base);
305 extern bool I2CMasterBusBusy(uint32_t ui32Base);
306 extern bool I2CMasterBusy(uint32_t ui32Base);
307 extern void I2CMasterControl(uint32_t ui32Base, uint32_t ui32Cmd);
308 extern uint32_t I2CMasterDataGet(uint32_t ui32Base);
309 extern void I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data);
310 extern void I2CMasterDisable(uint32_t ui32Base);
311 extern void I2CMasterEnable(uint32_t ui32Base);
312 extern uint32_t I2CMasterErr(uint32_t ui32Base);
313 extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk,
314                                 bool bFast);
315 extern void I2CMasterIntClear(uint32_t ui32Base);
316 extern void I2CMasterIntDisable(uint32_t ui32Base);
317 extern void I2CMasterIntEnable(uint32_t ui32Base);
318 extern bool I2CMasterIntStatus(uint32_t ui32Base, bool bMasked);
319 extern void I2CMasterIntEnableEx(uint32_t ui32Base,
320                                  uint32_t ui32IntFlags);
321 extern void I2CMasterIntDisableEx(uint32_t ui32Base,
322                                   uint32_t ui32IntFlags);
323 extern uint32_t I2CMasterIntStatusEx(uint32_t ui32Base,
324                                        bool bMasked);
325 extern void I2CMasterIntClearEx(uint32_t ui32Base,
326                                 uint32_t ui32IntFlags);
327 extern void I2CMasterTimeoutSet(uint32_t ui32Base, uint32_t ui32Value);
328 extern void I2CSlaveACKOverride(uint32_t ui32Base, bool bEnable);
329 extern void I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK);
330 extern uint32_t I2CMasterLineStateGet(uint32_t ui32Base);
331 extern void I2CMasterSlaveAddrSet(uint32_t ui32Base,
332                                   uint8_t ui8SlaveAddr,
333                                   bool bReceive);
334 extern uint32_t I2CSlaveDataGet(uint32_t ui32Base);
335 extern void I2CSlaveDataPut(uint32_t ui32Base, uint8_t ui8Data);
336 extern void I2CSlaveDisable(uint32_t ui32Base);
337 extern void I2CSlaveEnable(uint32_t ui32Base);
338 extern void I2CSlaveInit(uint32_t ui32Base, uint8_t ui8SlaveAddr);
339 extern void I2CSlaveAddressSet(uint32_t ui32Base, uint8_t ui8AddrNum,
340                                  uint8_t ui8SlaveAddr);
341 extern void I2CSlaveIntClear(uint32_t ui32Base);
342 extern void I2CSlaveIntDisable(uint32_t ui32Base);
343 extern void I2CSlaveIntEnable(uint32_t ui32Base);
344 extern void I2CSlaveIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags);
345 extern void I2CSlaveIntDisableEx(uint32_t ui32Base,
346                                  uint32_t ui32IntFlags);
347 extern void I2CSlaveIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags);
348 extern bool I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked);
349 extern uint32_t I2CSlaveIntStatusEx(uint32_t ui32Base,
350                                       bool bMasked);
351 extern uint32_t I2CSlaveStatus(uint32_t ui32Base);
352 
353 //*****************************************************************************
354 //
355 // Mark the end of the C bindings section for C++ compilers.
356 //
357 //*****************************************************************************
358 #ifdef __cplusplus
359 }
360 #endif
361 
362 #endif // __DRIVERLIB_I2C_H__
363