1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_i2c.h 4 * @author MCD Application Team 5 * @brief Header file of I2C HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32U5xx_HAL_I2C_H 22 #define STM32U5xx_HAL_I2C_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32u5xx_hal_def.h" 30 31 /** @addtogroup STM32U5xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup I2C 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup I2C_Exported_Types I2C Exported Types 41 * @{ 42 */ 43 44 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition 45 * @brief I2C Configuration Structure definition 46 * @{ 47 */ 48 typedef struct 49 { 50 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. 51 This parameter calculated by referring to I2C initialization section 52 in Reference manual */ 53 54 uint32_t OwnAddress1; /*!< Specifies the first device own address. 55 This parameter can be a 7-bit or 10-bit address. */ 56 57 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 58 This parameter can be a value of @ref I2C_ADDRESSING_MODE */ 59 60 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 61 This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ 62 63 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 64 This parameter can be a 7-bit address. */ 65 66 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing 67 mode is selected. 68 This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ 69 70 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 71 This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ 72 73 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 74 This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ 75 76 } I2C_InitTypeDef; 77 78 /** 79 * @} 80 */ 81 82 /** @defgroup HAL_state_structure_definition HAL state structure definition 83 * @brief HAL State structure definition 84 * @note HAL I2C State value coding follow below described bitmap :\n 85 * b7-b6 Error information\n 86 * 00 : No Error\n 87 * 01 : Abort (Abort user request on going)\n 88 * 10 : Timeout\n 89 * 11 : Error\n 90 * b5 Peripheral initialization status\n 91 * 0 : Reset (peripheral not initialized)\n 92 * 1 : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n 93 * b4 (not used)\n 94 * x : Should be set to 0\n 95 * b3\n 96 * 0 : Ready or Busy (No Listen mode ongoing)\n 97 * 1 : Listen (peripheral in Address Listen Mode)\n 98 * b2 Intrinsic process state\n 99 * 0 : Ready\n 100 * 1 : Busy (peripheral busy with some configuration or internal operations)\n 101 * b1 Rx state\n 102 * 0 : Ready (no Rx operation ongoing)\n 103 * 1 : Busy (Rx operation ongoing)\n 104 * b0 Tx state\n 105 * 0 : Ready (no Tx operation ongoing)\n 106 * 1 : Busy (Tx operation ongoing) 107 * @{ 108 */ 109 typedef enum 110 { 111 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 112 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 113 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 114 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 115 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 116 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 117 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 118 process is ongoing */ 119 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 120 process is ongoing */ 121 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 122 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 123 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ 124 125 } HAL_I2C_StateTypeDef; 126 127 /** 128 * @} 129 */ 130 131 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 132 * @brief HAL Mode structure definition 133 * @note HAL I2C Mode value coding follow below described bitmap :\n 134 * b7 (not used)\n 135 * x : Should be set to 0\n 136 * b6\n 137 * 0 : None\n 138 * 1 : Memory (HAL I2C communication is in Memory Mode)\n 139 * b5\n 140 * 0 : None\n 141 * 1 : Slave (HAL I2C communication is in Slave Mode)\n 142 * b4\n 143 * 0 : None\n 144 * 1 : Master (HAL I2C communication is in Master Mode)\n 145 * b3-b2-b1-b0 (not used)\n 146 * xxxx : Should be set to 0000 147 * @{ 148 */ 149 typedef enum 150 { 151 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ 152 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ 153 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ 154 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ 155 156 } HAL_I2C_ModeTypeDef; 157 158 /** 159 * @} 160 */ 161 162 /** @defgroup I2C_Error_Code_definition I2C Error Code definition 163 * @brief I2C Error Code definition 164 * @{ 165 */ 166 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ 167 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ 168 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ 169 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ 170 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ 171 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 172 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ 173 #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ 174 #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */ 175 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 176 #define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ 177 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 178 #define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */ 179 /** 180 * @} 181 */ 182 183 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition 184 * @brief I2C handle Structure definition 185 * @{ 186 */ 187 typedef struct __I2C_HandleTypeDef 188 { 189 I2C_TypeDef *Instance; /*!< I2C registers base address */ 190 191 I2C_InitTypeDef Init; /*!< I2C communication parameters */ 192 193 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ 194 195 uint16_t XferSize; /*!< I2C transfer size */ 196 197 __IO uint16_t XferCount; /*!< I2C transfer counter */ 198 199 __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can 200 be a value of @ref I2C_XFEROPTIONS */ 201 202 __IO uint32_t PreviousState; /*!< I2C communication Previous state */ 203 204 HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); 205 /*!< I2C transfer IRQ handler function pointer */ 206 207 #if defined(HAL_DMA_MODULE_ENABLED) 208 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ 209 210 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ 211 212 #endif /*HAL_DMA_MODULE_ENABLED*/ 213 214 HAL_LockTypeDef Lock; /*!< I2C locking object */ 215 216 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ 217 218 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ 219 220 __IO uint32_t ErrorCode; /*!< I2C Error code */ 221 222 __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ 223 224 __IO uint32_t Devaddress; /*!< I2C Target device address */ 225 226 __IO uint32_t Memaddress; /*!< I2C Target memory address */ 227 228 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 229 void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 230 /*!< I2C Master Tx Transfer completed callback */ 231 void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 232 /*!< I2C Master Rx Transfer completed callback */ 233 void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 234 /*!< I2C Slave Tx Transfer completed callback */ 235 void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 236 /*!< I2C Slave Rx Transfer completed callback */ 237 void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 238 /*!< I2C Listen Complete callback */ 239 void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 240 /*!< I2C Memory Tx Transfer completed callback */ 241 void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 242 /*!< I2C Memory Rx Transfer completed callback */ 243 void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); 244 /*!< I2C Error callback */ 245 void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 246 /*!< I2C Abort callback */ 247 248 void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 249 /*!< I2C Slave Address Match callback */ 250 251 void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); 252 /*!< I2C Msp Init callback */ 253 void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); 254 /*!< I2C Msp DeInit callback */ 255 256 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 257 } I2C_HandleTypeDef; 258 259 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 260 /** 261 * @brief HAL I2C Callback ID enumeration definition 262 */ 263 typedef enum 264 { 265 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */ 266 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */ 267 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */ 268 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */ 269 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */ 270 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */ 271 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */ 272 HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */ 273 HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */ 274 275 HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */ 276 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */ 277 278 } HAL_I2C_CallbackIDTypeDef; 279 280 /** 281 * @brief HAL I2C Callback pointer definition 282 */ 283 typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); 284 /*!< pointer to an I2C callback function */ 285 typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, 286 uint16_t AddrMatchCode); 287 /*!< pointer to an I2C Address Match callback function */ 288 289 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 290 /** 291 * @} 292 */ 293 294 /** 295 * @} 296 */ 297 /* Exported constants --------------------------------------------------------*/ 298 299 /** @defgroup I2C_Exported_Constants I2C Exported Constants 300 * @{ 301 */ 302 303 /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options 304 * @{ 305 */ 306 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) 307 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 308 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 309 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 310 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 311 #define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE) 312 313 /* List of XferOptions in usage of : 314 * 1- Restart condition in all use cases (direction change or not) 315 */ 316 #define I2C_OTHER_FRAME (0x000000AAU) 317 #define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U) 318 /** 319 * @} 320 */ 321 322 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode 323 * @{ 324 */ 325 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U) 326 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U) 327 /** 328 * @} 329 */ 330 331 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode 332 * @{ 333 */ 334 #define I2C_DUALADDRESS_DISABLE (0x00000000U) 335 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN 336 /** 337 * @} 338 */ 339 340 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks 341 * @{ 342 */ 343 #define I2C_OA2_NOMASK ((uint8_t)0x00U) 344 #define I2C_OA2_MASK01 ((uint8_t)0x01U) 345 #define I2C_OA2_MASK02 ((uint8_t)0x02U) 346 #define I2C_OA2_MASK03 ((uint8_t)0x03U) 347 #define I2C_OA2_MASK04 ((uint8_t)0x04U) 348 #define I2C_OA2_MASK05 ((uint8_t)0x05U) 349 #define I2C_OA2_MASK06 ((uint8_t)0x06U) 350 #define I2C_OA2_MASK07 ((uint8_t)0x07U) 351 /** 352 * @} 353 */ 354 355 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode 356 * @{ 357 */ 358 #define I2C_GENERALCALL_DISABLE (0x00000000U) 359 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN 360 /** 361 * @} 362 */ 363 364 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode 365 * @{ 366 */ 367 #define I2C_NOSTRETCH_DISABLE (0x00000000U) 368 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH 369 /** 370 * @} 371 */ 372 373 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size 374 * @{ 375 */ 376 #define I2C_MEMADD_SIZE_8BIT (0x00000001U) 377 #define I2C_MEMADD_SIZE_16BIT (0x00000002U) 378 /** 379 * @} 380 */ 381 382 /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View 383 * @{ 384 */ 385 #define I2C_DIRECTION_TRANSMIT (0x00000000U) 386 #define I2C_DIRECTION_RECEIVE (0x00000001U) 387 /** 388 * @} 389 */ 390 391 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode 392 * @{ 393 */ 394 #define I2C_RELOAD_MODE I2C_CR2_RELOAD 395 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND 396 #define I2C_SOFTEND_MODE (0x00000000U) 397 /** 398 * @} 399 */ 400 401 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode 402 * @{ 403 */ 404 #define I2C_NO_STARTSTOP (0x00000000U) 405 #define I2C_GENERATE_NO_START_READ (uint32_t)(0x80000000U | I2C_CR2_RD_WRN) 406 #define I2C_GENERATE_NO_START_WRITE (uint32_t)(0x80000000U) 407 #define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) 408 #define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) 409 #define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) 410 /** 411 * @} 412 */ 413 414 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition 415 * @brief I2C Interrupt definition 416 * Elements values convention: 0xXXXXXXXX 417 * - XXXXXXXX : Interrupt control mask 418 * @{ 419 */ 420 #define I2C_IT_ERRI I2C_CR1_ERRIE 421 #define I2C_IT_TCI I2C_CR1_TCIE 422 #define I2C_IT_STOPI I2C_CR1_STOPIE 423 #define I2C_IT_NACKI I2C_CR1_NACKIE 424 #define I2C_IT_ADDRI I2C_CR1_ADDRIE 425 #define I2C_IT_RXI I2C_CR1_RXIE 426 #define I2C_IT_TXI I2C_CR1_TXIE 427 /** 428 * @} 429 */ 430 431 /** @defgroup I2C_Flag_definition I2C Flag definition 432 * @{ 433 */ 434 #define I2C_FLAG_TXE I2C_ISR_TXE 435 #define I2C_FLAG_TXIS I2C_ISR_TXIS 436 #define I2C_FLAG_RXNE I2C_ISR_RXNE 437 #define I2C_FLAG_ADDR I2C_ISR_ADDR 438 #define I2C_FLAG_AF I2C_ISR_NACKF 439 #define I2C_FLAG_STOPF I2C_ISR_STOPF 440 #define I2C_FLAG_TC I2C_ISR_TC 441 #define I2C_FLAG_TCR I2C_ISR_TCR 442 #define I2C_FLAG_BERR I2C_ISR_BERR 443 #define I2C_FLAG_ARLO I2C_ISR_ARLO 444 #define I2C_FLAG_OVR I2C_ISR_OVR 445 #define I2C_FLAG_PECERR I2C_ISR_PECERR 446 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT 447 #define I2C_FLAG_ALERT I2C_ISR_ALERT 448 #define I2C_FLAG_BUSY I2C_ISR_BUSY 449 #define I2C_FLAG_DIR I2C_ISR_DIR 450 /** 451 * @} 452 */ 453 454 /** 455 * @} 456 */ 457 458 /* Exported macros -----------------------------------------------------------*/ 459 460 /** @defgroup I2C_Exported_Macros I2C Exported Macros 461 * @{ 462 */ 463 464 /** @brief Reset I2C handle state. 465 * @param __HANDLE__ specifies the I2C Handle. 466 * @retval None 467 */ 468 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 469 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ 470 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ 471 (__HANDLE__)->MspInitCallback = NULL; \ 472 (__HANDLE__)->MspDeInitCallback = NULL; \ 473 } while(0) 474 #else 475 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) 476 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 477 478 /** @brief Enable the specified I2C interrupt. 479 * @param __HANDLE__ specifies the I2C Handle. 480 * @param __INTERRUPT__ specifies the interrupt source to enable. 481 * This parameter can be one of the following values: 482 * @arg @ref I2C_IT_ERRI Errors interrupt enable 483 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 484 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 485 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 486 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 487 * @arg @ref I2C_IT_RXI RX interrupt enable 488 * @arg @ref I2C_IT_TXI TX interrupt enable 489 * 490 * @retval None 491 */ 492 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 493 494 /** @brief Disable the specified I2C interrupt. 495 * @param __HANDLE__ specifies the I2C Handle. 496 * @param __INTERRUPT__ specifies the interrupt source to disable. 497 * This parameter can be one of the following values: 498 * @arg @ref I2C_IT_ERRI Errors interrupt enable 499 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 500 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 501 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 502 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 503 * @arg @ref I2C_IT_RXI RX interrupt enable 504 * @arg @ref I2C_IT_TXI TX interrupt enable 505 * 506 * @retval None 507 */ 508 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 509 510 /** @brief Check whether the specified I2C interrupt source is enabled or not. 511 * @param __HANDLE__ specifies the I2C Handle. 512 * @param __INTERRUPT__ specifies the I2C interrupt source to check. 513 * This parameter can be one of the following values: 514 * @arg @ref I2C_IT_ERRI Errors interrupt enable 515 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 516 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 517 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 518 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 519 * @arg @ref I2C_IT_RXI RX interrupt enable 520 * @arg @ref I2C_IT_TXI TX interrupt enable 521 * 522 * @retval The new state of __INTERRUPT__ (SET or RESET). 523 */ 524 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \ 525 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 526 527 /** @brief Check whether the specified I2C flag is set or not. 528 * @param __HANDLE__ specifies the I2C Handle. 529 * @param __FLAG__ specifies the flag to check. 530 * This parameter can be one of the following values: 531 * @arg @ref I2C_FLAG_TXE Transmit data register empty 532 * @arg @ref I2C_FLAG_TXIS Transmit interrupt status 533 * @arg @ref I2C_FLAG_RXNE Receive data register not empty 534 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 535 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 536 * @arg @ref I2C_FLAG_STOPF STOP detection flag 537 * @arg @ref I2C_FLAG_TC Transfer complete (master mode) 538 * @arg @ref I2C_FLAG_TCR Transfer complete reload 539 * @arg @ref I2C_FLAG_BERR Bus error 540 * @arg @ref I2C_FLAG_ARLO Arbitration lost 541 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 542 * @arg @ref I2C_FLAG_PECERR PEC error in reception 543 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 544 * @arg @ref I2C_FLAG_ALERT SMBus alert 545 * @arg @ref I2C_FLAG_BUSY Bus busy 546 * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) 547 * 548 * @retval The new state of __FLAG__ (SET or RESET). 549 */ 550 #define I2C_FLAG_MASK (0x0001FFFFU) 551 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \ 552 (__FLAG__)) == (__FLAG__)) ? SET : RESET) 553 554 /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit. 555 * @param __HANDLE__ specifies the I2C Handle. 556 * @param __FLAG__ specifies the flag to clear. 557 * This parameter can be any combination of the following values: 558 * @arg @ref I2C_FLAG_TXE Transmit data register empty 559 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 560 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 561 * @arg @ref I2C_FLAG_STOPF STOP detection flag 562 * @arg @ref I2C_FLAG_BERR Bus error 563 * @arg @ref I2C_FLAG_ARLO Arbitration lost 564 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 565 * @arg @ref I2C_FLAG_PECERR PEC error in reception 566 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 567 * @arg @ref I2C_FLAG_ALERT SMBus alert 568 * 569 * @retval None 570 */ 571 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \ 572 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \ 573 ((__HANDLE__)->Instance->ICR = (__FLAG__))) 574 575 /** @brief Enable the specified I2C peripheral. 576 * @param __HANDLE__ specifies the I2C Handle. 577 * @retval None 578 */ 579 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 580 581 /** @brief Disable the specified I2C peripheral. 582 * @param __HANDLE__ specifies the I2C Handle. 583 * @retval None 584 */ 585 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 586 587 /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. 588 * @param __HANDLE__ specifies the I2C Handle. 589 * @retval None 590 */ 591 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) 592 /** 593 * @} 594 */ 595 596 /* Include I2C HAL Extended module */ 597 #include "stm32u5xx_hal_i2c_ex.h" 598 599 /* Exported functions --------------------------------------------------------*/ 600 /** @addtogroup I2C_Exported_Functions 601 * @{ 602 */ 603 604 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions 605 * @{ 606 */ 607 /* Initialization and de-initialization functions******************************/ 608 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); 609 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); 610 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); 611 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); 612 613 /* Callbacks Register/UnRegister functions ***********************************/ 614 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 615 HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, 616 pI2C_CallbackTypeDef pCallback); 617 HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID); 618 619 HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback); 620 HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); 621 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 622 /** 623 * @} 624 */ 625 626 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions 627 * @{ 628 */ 629 /* IO operation functions ****************************************************/ 630 /******* Blocking mode: Polling */ 631 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 632 uint16_t Size, uint32_t Timeout); 633 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 634 uint16_t Size, uint32_t Timeout); 635 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 636 uint32_t Timeout); 637 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 638 uint32_t Timeout); 639 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 640 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 641 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 642 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 643 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, 644 uint32_t Timeout); 645 646 /******* Non-Blocking mode: Interrupt */ 647 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 648 uint16_t Size); 649 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 650 uint16_t Size); 651 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 652 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 653 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 654 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 655 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 656 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 657 658 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 659 uint16_t Size, uint32_t XferOptions); 660 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 661 uint16_t Size, uint32_t XferOptions); 662 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 663 uint32_t XferOptions); 664 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 665 uint32_t XferOptions); 666 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); 667 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); 668 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); 669 670 #if defined(HAL_DMA_MODULE_ENABLED) 671 /******* Non-Blocking mode: DMA */ 672 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 673 uint16_t Size); 674 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 675 uint16_t Size); 676 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 677 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 678 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 679 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 680 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 681 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 682 683 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 684 uint16_t Size, uint32_t XferOptions); 685 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 686 uint16_t Size, uint32_t XferOptions); 687 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 688 uint32_t XferOptions); 689 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 690 uint32_t XferOptions); 691 #endif /*HAL_DMA_MODULE_ENABLED*/ 692 /** 693 * @} 694 */ 695 696 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 697 * @{ 698 */ 699 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 700 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); 701 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); 702 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); 703 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); 704 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); 705 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); 706 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 707 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); 708 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); 709 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); 710 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); 711 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); 712 /** 713 * @} 714 */ 715 716 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 717 * @{ 718 */ 719 /* Peripheral State, Mode and Error functions *********************************/ 720 HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c); 721 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c); 722 uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c); 723 724 /** 725 * @} 726 */ 727 728 /** 729 * @} 730 */ 731 732 /* Private constants ---------------------------------------------------------*/ 733 /** @defgroup I2C_Private_Constants I2C Private Constants 734 * @{ 735 */ 736 737 /** 738 * @} 739 */ 740 741 /* Private macros ------------------------------------------------------------*/ 742 /** @defgroup I2C_Private_Macro I2C Private Macros 743 * @{ 744 */ 745 746 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ 747 ((MODE) == I2C_ADDRESSINGMODE_10BIT)) 748 749 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ 750 ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) 751 752 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ 753 ((MASK) == I2C_OA2_MASK01) || \ 754 ((MASK) == I2C_OA2_MASK02) || \ 755 ((MASK) == I2C_OA2_MASK03) || \ 756 ((MASK) == I2C_OA2_MASK04) || \ 757 ((MASK) == I2C_OA2_MASK05) || \ 758 ((MASK) == I2C_OA2_MASK06) || \ 759 ((MASK) == I2C_OA2_MASK07)) 760 761 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ 762 ((CALL) == I2C_GENERALCALL_ENABLE)) 763 764 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ 765 ((STRETCH) == I2C_NOSTRETCH_ENABLE)) 766 767 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ 768 ((SIZE) == I2C_MEMADD_SIZE_16BIT)) 769 770 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ 771 ((MODE) == I2C_AUTOEND_MODE) || \ 772 ((MODE) == I2C_SOFTEND_MODE)) 773 774 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ 775 ((REQUEST) == I2C_GENERATE_START_READ) || \ 776 ((REQUEST) == I2C_GENERATE_START_WRITE) || \ 777 ((REQUEST) == I2C_GENERATE_NO_START_READ) || \ 778 ((REQUEST) == I2C_GENERATE_NO_START_WRITE)|| \ 779 ((REQUEST) == I2C_NO_STARTSTOP)) 780 781 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ 782 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ 783 ((REQUEST) == I2C_NEXT_FRAME) || \ 784 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ 785 ((REQUEST) == I2C_LAST_FRAME) || \ 786 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \ 787 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) 788 789 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \ 790 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) 791 792 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \ 793 (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \ 794 I2C_CR2_NBYTES | I2C_CR2_RELOAD | \ 795 I2C_CR2_RD_WRN))) 796 797 #define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \ 798 >> 16U)) 799 #define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \ 800 >> 16U)) 801 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) 802 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)) 803 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)) 804 805 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 806 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) 807 808 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \ 809 (uint16_t)(0xFF00U))) >> 8U))) 810 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 811 812 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \ 813 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ 814 (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \ 815 (~I2C_CR2_RD_WRN)) : \ 816 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ 817 (I2C_CR2_ADD10) | (I2C_CR2_START)) & \ 818 (~I2C_CR2_RD_WRN))) 819 820 #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \ 821 ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) 822 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) 823 /** 824 * @} 825 */ 826 827 /* Private Functions ---------------------------------------------------------*/ 828 /** @defgroup I2C_Private_Functions I2C Private Functions 829 * @{ 830 */ 831 /* Private functions are defined in stm32u5xx_hal_i2c.c file */ 832 /** 833 * @} 834 */ 835 836 /** 837 * @} 838 */ 839 840 /** 841 * @} 842 */ 843 844 #ifdef __cplusplus 845 } 846 #endif 847 848 849 #endif /* STM32U5xx_HAL_I2C_H */ 850
