1 /*
2 * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6 /**
7 * test environment UT_T2_I2C:
8 * please prepare two ESP32-WROVER-KIT board.
9 * Then connect GPIO18 and GPIO18, GPIO19 and GPIO19 between these two boards.
10 */
11 #include <stdio.h>
12 #include <string.h>
13 #include "unity.h"
14 #include "test_utils.h"
15 #include "unity_config.h"
16 #include "driver/i2c.h"
17 #include "esp_attr.h"
18 #include "esp_log.h"
19 #include "soc/gpio_periph.h"
20 #include "soc/i2c_periph.h"
21 #include "esp_system.h"
22 #include "soc/uart_struct.h"
23 #include "driver/periph_ctrl.h"
24 #include "esp_rom_gpio.h"
25 #include "hal/gpio_hal.h"
26 #include "hal/uart_ll.h"
27
28
29 #define DATA_LENGTH 512 /*!<Data buffer length for test buffer*/
30 #define RW_TEST_LENGTH 129 /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
31 #define DELAY_TIME_BETWEEN_ITEMS_MS 1234 /*!< delay time between different test items */
32
33 #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
34 #define I2C_SLAVE_SCL_IO 5 /*!<gpio number for i2c slave clock */
35 #define I2C_SLAVE_SDA_IO 6 /*!<gpio number for i2c slave data */
36 #else
37 #define I2C_SLAVE_SCL_IO 19 /*!<gpio number for i2c slave clock */
38 #define I2C_SLAVE_SDA_IO 18 /*!<gpio number for i2c slave data */
39 #endif
40
41 #define I2C_SLAVE_NUM I2C_NUM_0 /*!<I2C port number for slave dev */
42 #define I2C_SLAVE_TX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
43 #define I2C_SLAVE_RX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
44
45 #if CONFIG_IDF_TARGET_ESP32C3
46 #define I2C_MASTER_SCL_IO 5 /*!<gpio number for i2c master clock */
47 #define I2C_MASTER_SDA_IO 6 /*!<gpio number for i2c master data */
48 #elif CONFIG_IDF_TARGET_ESP32S3
49 #define I2C_MASTER_SCL_IO 2 /*!<gpio number for i2c master clock */
50 #define I2C_MASTER_SDA_IO 1 /*!<gpio number for i2c master data */
51 #else
52 #define I2C_MASTER_SCL_IO 19 /*!< gpio number for I2C master clock */
53 #define I2C_MASTER_SDA_IO 18 /*!< gpio number for I2C master data */
54 #endif
55
56 #define I2C_MASTER_NUM I2C_NUM_0 /*!< I2C port number for master dev */
57 #define I2C_MASTER_TX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
58 #define I2C_MASTER_RX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
59 #define I2C_MASTER_FREQ_HZ 100000 /*!< I2C master clock frequency */
60
61 #define ESP_SLAVE_ADDR 0x28 /*!< ESP32 slave address, you can set any 7bit value */
62 #define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
63 #define READ_BIT I2C_MASTER_READ /*!< I2C master read */
64 #define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
65 #define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
66 #define ACK_VAL 0x0 /*!< I2C ack value */
67 #define NACK_VAL 0x1 /*!< I2C nack value */
68
69 #define PULSE_IO 19
70 #define PCNT_INPUT_IO 4
71 #define PCNT_CTRL_FLOATING_IO 5
72 #define HIGHEST_LIMIT 10000
73 #define LOWEST_LIMIT -10000
74
75 static DRAM_ATTR i2c_dev_t *const I2C[SOC_I2C_NUM] = { &I2C0,
76 #if SOC_I2C_NUM > 1
77 &I2C1,
78 #endif
79 };
80
81
82
i2c_master_write_slave(i2c_port_t i2c_num,uint8_t * data_wr,size_t size)83 static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
84 {
85 i2c_cmd_handle_t cmd = i2c_cmd_link_create();
86 i2c_master_start(cmd);
87 TEST_ESP_OK(i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN));
88 TEST_ESP_OK(i2c_master_write(cmd, data_wr, size, ACK_CHECK_EN));
89 TEST_ESP_OK(i2c_master_stop(cmd));
90 esp_err_t ret = i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
91 i2c_cmd_link_delete(cmd);
92 return ret;
93 }
94
i2c_master_init(void)95 static i2c_config_t i2c_master_init(void)
96 {
97 i2c_config_t conf_master = {
98 .mode = I2C_MODE_MASTER,
99 .sda_pullup_en = GPIO_PULLUP_ENABLE,
100 .scl_pullup_en = GPIO_PULLUP_ENABLE,
101 .master.clk_speed = I2C_MASTER_FREQ_HZ,
102 .sda_io_num = I2C_MASTER_SDA_IO,
103 .scl_io_num = I2C_MASTER_SCL_IO,
104 .clk_flags = 0,
105 };
106 return conf_master;
107 }
108
i2c_slave_init(void)109 static i2c_config_t i2c_slave_init(void)
110 {
111 i2c_config_t conf_slave = {
112 .mode = I2C_MODE_SLAVE,
113 .sda_io_num = I2C_SLAVE_SDA_IO,
114 .scl_io_num = I2C_SLAVE_SCL_IO,
115 .sda_pullup_en = GPIO_PULLUP_ENABLE,
116 .scl_pullup_en = GPIO_PULLUP_ENABLE,
117 .slave.addr_10bit_en = 0,
118 .slave.slave_addr = ESP_SLAVE_ADDR,
119 };
120 return conf_slave;
121 }
122
123 TEST_CASE("I2C i2c_set_pin() fails if sda and scl gpios are same", "[i2c]")
124 {
125 TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, i2c_set_pin(0, 0, 0, true, true , I2C_MODE_SLAVE));
126 }
127
128 TEST_CASE("I2C config test", "[i2c]")
129 {
130 // master test
131 i2c_config_t conf_master = i2c_master_init();
132 gpio_pullup_t sda_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
133 gpio_pullup_t scl_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
134
135 for (int i = 0; i < 2; i++) {
136 for (int j = 0; j < 2; j++) {
137 conf_master.sda_pullup_en = sda_pull_up_en[i];
138 conf_master.scl_pullup_en = scl_pull_up_en[j];
139 TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
140 I2C_MASTER_RX_BUF_DISABLE,
141 I2C_MASTER_TX_BUF_DISABLE, 0));
142 TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
143 TEST_ASSERT_EQUAL_INT32(I2C[I2C_MASTER_NUM]->ctr.ms_mode, 1);
144 TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
145 }
146 }
147
148 // slave test
149 i2c_config_t conf_slave = i2c_slave_init();
150 for (int i = 0; i < 2; i++) {
151 for (int j = 0; j < 2; j++) {
152 conf_slave.sda_pullup_en = sda_pull_up_en[i];
153 conf_slave.scl_pullup_en = scl_pull_up_en[j];
154 TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
155 I2C_SLAVE_RX_BUF_LEN,
156 I2C_SLAVE_TX_BUF_LEN, 0));
157 TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
158 TEST_ASSERT_EQUAL_INT32(I2C[I2C_SLAVE_NUM] -> ctr.ms_mode, 0);
159 TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
160 }
161 }
162
163
164 }
165
166 TEST_CASE("I2C set and get period test", "[i2c]")
167 {
168 int high_period, low_period;
169 i2c_config_t conf_master = i2c_master_init();
170 TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
171 I2C_MASTER_RX_BUF_DISABLE,
172 I2C_MASTER_TX_BUF_DISABLE, 0));
173 TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
174
175 TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V, I2C_SCL_HIGH_PERIOD_V));
176 TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
177 TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, high_period);
178 TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, low_period);
179
180 TEST_ASSERT_NOT_NULL((void *)i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V + 1, I2C_SCL_HIGH_PERIOD_V + 1));
181
182 TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, 300, 400));
183 TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
184 TEST_ASSERT_EQUAL_INT(300, high_period);
185 TEST_ASSERT_EQUAL_INT(400, low_period);
186 TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
187 }
188
189 TEST_CASE("I2C config FIFO test", "[i2c]")
190 {
191 i2c_config_t conf_slave = i2c_slave_init();
192 TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
193 I2C_SLAVE_RX_BUF_LEN,
194 I2C_SLAVE_TX_BUF_LEN, 0));
195 TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
196 TEST_ASSERT_BIT_LOW(1, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
197 TEST_ESP_OK(i2c_reset_tx_fifo(I2C_SLAVE_NUM));
198 TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
199
200 TEST_ESP_OK(i2c_reset_rx_fifo(I2C_SLAVE_NUM));
201 TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.rx_fifo_rst);
202 TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
203 }
204
205 TEST_CASE("I2C timing test", "[i2c]")
206 {
207 int test_setup_time, test_data_time, test_stop_time, test_hold_time;
208 uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
209 i2c_config_t conf_master = i2c_master_init();
210 TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
211 I2C_MASTER_RX_BUF_DISABLE,
212 I2C_MASTER_TX_BUF_DISABLE, 0));
213 TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
214
215 TEST_ESP_OK(i2c_set_start_timing(I2C_MASTER_NUM, 50, 60));
216 TEST_ESP_OK(i2c_set_data_timing(I2C_MASTER_NUM, 80, 60));
217 TEST_ESP_OK(i2c_set_stop_timing(I2C_MASTER_NUM, 100, 60));
218
219 for (int i = 0; i < DATA_LENGTH; i++) {
220 data_wr[i] = i;
221 }
222 i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
223 TEST_ESP_OK(i2c_get_start_timing(I2C_MASTER_NUM, &test_setup_time, &test_hold_time));
224 TEST_ESP_OK(i2c_get_data_timing(I2C_MASTER_NUM, &test_data_time, &test_hold_time));
225 TEST_ESP_OK(i2c_get_stop_timing(I2C_MASTER_NUM, &test_stop_time, &test_hold_time));
226 TEST_ASSERT_EQUAL_INT32(50, test_setup_time);
227 TEST_ASSERT_EQUAL_INT32(80, test_data_time);
228 TEST_ASSERT_EQUAL_INT32(100, test_stop_time);
229 TEST_ASSERT_EQUAL_INT32(60, test_hold_time);
230 free(data_wr);
231 i2c_driver_delete(I2C_MASTER_NUM);
232 }
233
234 TEST_CASE("I2C data mode test", "[i2c]")
235 {
236 uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
237 i2c_trans_mode_t test_tx_trans_mode, test_rx_trans_mode;
238 i2c_config_t conf_master = i2c_master_init();
239 TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
240 I2C_MASTER_RX_BUF_DISABLE,
241 I2C_MASTER_TX_BUF_DISABLE, 0));
242 TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
243 for (int i = 0; i < DATA_LENGTH; i++) {
244 data_wr[i] = i;
245 }
246 TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_LSB_FIRST, I2C_DATA_MODE_LSB_FIRST));
247 TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
248 TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_tx_trans_mode);
249 TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_rx_trans_mode);
250 i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
251 TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_MSB_FIRST, I2C_DATA_MODE_MSB_FIRST));
252 TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
253 TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_tx_trans_mode);
254 TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_rx_trans_mode);
255 i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
256 free(data_wr);
257 i2c_driver_delete(I2C_MASTER_NUM);
258 }
259
260
261 TEST_CASE("I2C driver memory leaking check", "[i2c]")
262 {
263 esp_err_t ret;
264
265 int size = esp_get_free_heap_size();
266 for (uint32_t i = 0; i <= 1000; i++) {
267 ret = i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
268 I2C_SLAVE_RX_BUF_LEN,
269 I2C_SLAVE_TX_BUF_LEN, 0);
270 TEST_ASSERT(ret == ESP_OK);
271 vTaskDelay(10 / portTICK_RATE_MS);
272 i2c_driver_delete(I2C_SLAVE_NUM);
273 TEST_ASSERT(ret == ESP_OK);
274 }
275
276 TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
277 }
278
279 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
280
281 // print the reading buffer
disp_buf(uint8_t * buf,int len)282 static void disp_buf(uint8_t *buf, int len)
283 {
284 int i;
285 for (i = 0; i < len; i++) {
286 printf("%02x ", buf[i]);
287 if (( i + 1 ) % 16 == 0) {
288 printf("\n");
289 }
290 }
291 printf("\n");
292 }
293
i2c_master_write_test(void)294 static void i2c_master_write_test(void)
295 {
296 uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
297 int i;
298
299 i2c_config_t conf_master = i2c_master_init();
300 TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
301
302 TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
303 I2C_MASTER_RX_BUF_DISABLE,
304 I2C_MASTER_TX_BUF_DISABLE, 0));
305 unity_wait_for_signal("i2c slave init finish");
306
307 unity_send_signal("master write");
308 for (i = 0; i < DATA_LENGTH / 2; i++) {
309 data_wr[i] = i;
310 }
311 i2c_master_write_slave(I2C_MASTER_NUM, data_wr, DATA_LENGTH / 2);
312 disp_buf(data_wr, i + 1);
313 free(data_wr);
314 unity_wait_for_signal("ready to delete");
315 TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
316 }
317
i2c_slave_read_test(void)318 static void i2c_slave_read_test(void)
319 {
320 uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
321 int size_rd = 0;
322 int len = 0;
323
324 i2c_config_t conf_slave = i2c_slave_init();
325 TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
326 TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
327 I2C_SLAVE_RX_BUF_LEN,
328 I2C_SLAVE_TX_BUF_LEN, 0));
329 unity_send_signal("i2c slave init finish");
330
331 unity_wait_for_signal("master write");
332 while (1) {
333 len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, DATA_LENGTH, 10000 / portTICK_RATE_MS);
334 if (len == 0) {
335 break;
336 }
337 size_rd += len;
338 }
339 disp_buf(data_rd, size_rd);
340 for (int i = 0; i < size_rd; i++) {
341 TEST_ASSERT(data_rd[i] == i);
342 }
343 free(data_rd);
344 unity_send_signal("ready to delete");
345 TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
346 }
347
348 TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_test, i2c_slave_read_test);
349
master_read_slave_test(void)350 static void master_read_slave_test(void)
351 {
352 uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
353 memset(data_rd, 0, DATA_LENGTH);
354 i2c_config_t conf_master = i2c_master_init();
355 TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
356 TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
357 I2C_MASTER_RX_BUF_DISABLE,
358 I2C_MASTER_TX_BUF_DISABLE, 0));
359 unity_wait_for_signal("i2c slave init finish");
360
361 i2c_cmd_handle_t cmd = i2c_cmd_link_create();
362 i2c_master_start(cmd);
363 i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
364
365 unity_send_signal("slave write");
366 unity_wait_for_signal("master read");
367 i2c_master_read(cmd, data_rd, RW_TEST_LENGTH-1, ACK_VAL);
368 i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH-1, NACK_VAL);
369 i2c_master_stop(cmd);
370 i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
371 i2c_cmd_link_delete(cmd);
372 vTaskDelay(100 / portTICK_RATE_MS);
373 for (int i = 0; i < RW_TEST_LENGTH; i++) {
374 printf("%d\n", data_rd[i]);
375 TEST_ASSERT(data_rd[i]==i);
376 }
377 free(data_rd);
378 unity_send_signal("ready to delete");
379 i2c_driver_delete(I2C_MASTER_NUM);
380 }
381
slave_write_buffer_test(void)382 static void slave_write_buffer_test(void)
383 {
384 uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
385 int size_rd;
386
387 i2c_config_t conf_slave = i2c_slave_init();
388 TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
389 TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
390 I2C_SLAVE_RX_BUF_LEN,
391 I2C_SLAVE_TX_BUF_LEN, 0));
392 unity_send_signal("i2c slave init finish");
393
394 unity_wait_for_signal("slave write");
395 for (int i = 0; i < DATA_LENGTH / 2; i++) {
396 data_wr[i] = i;
397 }
398 size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
399 disp_buf(data_wr, size_rd);
400 unity_send_signal("master read");
401 unity_wait_for_signal("ready to delete");
402 free(data_wr);
403 i2c_driver_delete(I2C_SLAVE_NUM);
404 }
405
406
407 TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", master_read_slave_test, slave_write_buffer_test);
408
409 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32)
i2c_master_write_read_test(void)410 static void i2c_master_write_read_test(void)
411 {
412 uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
413 memset(data_rd, 0, DATA_LENGTH);
414 uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
415
416 i2c_config_t conf_master = i2c_master_init();
417 TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
418 TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
419 I2C_MASTER_RX_BUF_DISABLE,
420 I2C_MASTER_TX_BUF_DISABLE, 0));
421 unity_wait_for_signal("i2c slave init finish");
422 i2c_cmd_handle_t cmd = i2c_cmd_link_create();
423 i2c_master_start(cmd);
424 i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
425
426 unity_send_signal("slave write");
427 unity_wait_for_signal("master read and write");
428 i2c_master_read(cmd, data_rd, RW_TEST_LENGTH, ACK_VAL);
429 i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH, NACK_VAL);
430 i2c_master_stop(cmd);
431 i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
432 i2c_cmd_link_delete(cmd);
433 vTaskDelay(100 / portTICK_RATE_MS);
434 disp_buf(data_rd, RW_TEST_LENGTH);
435 for (int i = 0; i < RW_TEST_LENGTH; i++) {
436 TEST_ASSERT(data_rd[i] == i/2);
437 }
438
439 for (int i = 0; i < DATA_LENGTH; i++) {
440 data_wr[i] = i % 3;
441 }
442
443 vTaskDelay(100 / portTICK_RATE_MS);
444 i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
445 free(data_wr);
446 free(data_rd);
447 unity_send_signal("slave read");
448 unity_wait_for_signal("ready to delete");
449 i2c_driver_delete(I2C_MASTER_NUM);
450 }
451
i2c_slave_read_write_test(void)452 static void i2c_slave_read_write_test(void)
453 {
454 uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
455 memset(data_rd, 0, DATA_LENGTH);
456 uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
457 int size_rd;
458
459 i2c_config_t conf_slave = i2c_slave_init();
460 TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
461 TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
462 I2C_SLAVE_RX_BUF_LEN,
463 I2C_SLAVE_TX_BUF_LEN, 0));
464 unity_send_signal("i2c slave init finish");
465 unity_wait_for_signal("slave write");
466
467 for (int i = 0; i < DATA_LENGTH / 2; i++) {
468 data_wr[i] = i/2;
469 }
470 size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
471 disp_buf(data_wr, size_rd);
472 unity_send_signal("master read and write");
473 unity_wait_for_signal("slave read");
474 size_rd = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd, RW_TEST_LENGTH, 1000 / portTICK_RATE_MS);
475 printf("slave read data is:\n");
476 disp_buf(data_rd, size_rd);
477 for (int i = 0; i < RW_TEST_LENGTH; i++) {
478 TEST_ASSERT(data_rd[i] == i % 3);
479 }
480 free(data_wr);
481 free(data_rd);
482 unity_send_signal("ready to delete");
483 i2c_driver_delete(I2C_SLAVE_NUM);
484 }
485
486 TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
487
i2c_master_repeat_write(void)488 static void i2c_master_repeat_write(void)
489 {
490 uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
491 int times = 3;
492
493 i2c_config_t conf_master = i2c_master_init();
494 TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
495
496 TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
497 I2C_MASTER_RX_BUF_DISABLE,
498 I2C_MASTER_TX_BUF_DISABLE, 0));
499 unity_wait_for_signal("i2c slave init finish");
500
501 for (int j = 0; j < times; j++) {
502 for (int i = 0; i < DATA_LENGTH; i++) {
503 data_wr[i] = j + i;
504 }
505 i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
506 disp_buf(data_wr, RW_TEST_LENGTH);
507 }
508 free(data_wr);
509 unity_send_signal("master write");
510 unity_wait_for_signal("ready to delete");
511 i2c_driver_delete(I2C_MASTER_NUM);
512 }
513
i2c_slave_repeat_read(void)514 static void i2c_slave_repeat_read(void)
515 {
516 int size_rd = 0;
517 int times = 3;
518 uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH * 3);
519
520 i2c_config_t conf_slave = i2c_slave_init();
521 TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
522 TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
523 I2C_SLAVE_RX_BUF_LEN,
524 I2C_SLAVE_TX_BUF_LEN, 0));
525 unity_send_signal("i2c slave init finish");
526 unity_wait_for_signal("master write");
527
528 while (1) {
529 int len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, RW_TEST_LENGTH * 3, 10000 / portTICK_RATE_MS);
530 if (len == 0) {
531 break;
532 }
533 size_rd += len;
534 }
535 disp_buf(data_rd, size_rd);
536 for (int j = 0; j < times; j++) {
537 for (int i = 0; i < RW_TEST_LENGTH; i++) {
538 printf("data: %d, %d\n", data_rd[j * RW_TEST_LENGTH + i], (i % 129 + j));
539 TEST_ASSERT(data_rd[j * RW_TEST_LENGTH + i] == (i % 129 + j));
540 }
541 }
542 free(data_rd);
543 unity_send_signal("ready to delete");
544 i2c_driver_delete(I2C_SLAVE_NUM);
545 }
546
547 TEST_CASE_MULTIPLE_DEVICES("I2C repeat write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_repeat_write, i2c_slave_repeat_read);
548
549
550 #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
551 #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
552
553 static volatile bool exit_flag;
554 static bool test_read_func;
555
test_task(void * pvParameters)556 static void test_task(void *pvParameters)
557 {
558 xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
559
560 uint8_t *data = (uint8_t *) malloc(DATA_LENGTH);
561 i2c_config_t conf_slave = i2c_slave_init();
562 TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
563 I2C_SLAVE_RX_BUF_LEN,
564 I2C_SLAVE_TX_BUF_LEN, 0));
565 TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
566 while (exit_flag == false) {
567 if (test_read_func) {
568 i2c_slave_read_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
569 } else {
570 i2c_slave_write_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
571 }
572 vTaskDelay(10/portTICK_RATE_MS);
573 }
574
575 free(data);
576 xSemaphoreGive(*sema);
577 vTaskDelete(NULL);
578 }
579
580 TEST_CASE("test i2c_slave_read_buffer is not blocked when ticks_to_wait=0", "[i2c]")
581 {
582 xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
583 exit_flag = false;
584
585 test_read_func = true;
586 xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
587
588 printf("Waiting for 5 sec\n");
589 vTaskDelay(5000 / portTICK_PERIOD_MS);
590 exit_flag = true;
591 if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
592 vSemaphoreDelete(exit_sema);
593 } else {
594 TEST_FAIL_MESSAGE("i2c_slave_read_buffer is blocked");
595 }
596 TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
597 }
598
599 TEST_CASE("test i2c_slave_write_buffer is not blocked when ticks_to_wait=0", "[i2c]")
600 {
601 xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
602 exit_flag = false;
603
604 test_read_func = false;
605 xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
606
607 printf("Waiting for 5 sec\n");
608 vTaskDelay(5000 / portTICK_PERIOD_MS);
609 exit_flag = true;
610 if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
611 vSemaphoreDelete(exit_sema);
612 } else {
613 TEST_FAIL_MESSAGE("i2c_slave_write_buffer is blocked");
614 }
615 TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
616 }
617
618 TEST_CASE("I2C general API test", "[i2c]")
619 {
620 #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
621 #define I2C_TEST_TIME 0x3ff
622 #else
623 #define I2C_TEST_TIME 0x1f
624 #endif
625 const int i2c_num = 0;
626 i2c_config_t conf_master = {
627 .mode = I2C_MODE_MASTER,
628 .sda_pullup_en = GPIO_PULLUP_ENABLE,
629 .scl_pullup_en = GPIO_PULLUP_ENABLE,
630 .master.clk_speed = I2C_MASTER_FREQ_HZ,
631 .sda_io_num = I2C_MASTER_SDA_IO,
632 .scl_io_num = I2C_MASTER_SCL_IO,
633 };
634 TEST_ESP_OK(i2c_param_config( i2c_num, &conf_master));
635 int time_get0, time_get1;
636 for(int i = 10; i < I2C_TEST_TIME; i++) {
637 //set period test
638 TEST_ESP_OK(i2c_set_period(i2c_num, i, i));
639 TEST_ESP_OK(i2c_get_period(i2c_num, &time_get0, &time_get1));
640 TEST_ASSERT((time_get0 == i) && (time_get1 == i));
641 //set start timing test
642 TEST_ESP_OK(i2c_set_start_timing(i2c_num, i, i));
643 TEST_ESP_OK(i2c_get_start_timing(i2c_num, &time_get0, &time_get1));
644 TEST_ASSERT((time_get0 == i) && (time_get1 == i));
645 //set stop timing test
646 TEST_ESP_OK(i2c_set_stop_timing(i2c_num, i, i));
647 TEST_ESP_OK(i2c_get_stop_timing(i2c_num, &time_get0, &time_get1));
648 TEST_ASSERT((time_get0 == i) && (time_get1 == i));
649 //set data timing test
650 TEST_ESP_OK(i2c_set_data_timing(i2c_num, i, i));
651 TEST_ESP_OK(i2c_get_data_timing(i2c_num, &time_get0, &time_get1));
652 TEST_ASSERT((time_get0 == i) && (time_get1 == i));
653 //set time out test
654 TEST_ESP_OK(i2c_set_timeout(i2c_num, i));
655 TEST_ESP_OK(i2c_get_timeout(i2c_num, &time_get0));
656 TEST_ASSERT(time_get0 == i);
657 }
658 }
659
660 #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
661 //Init uart baud rate detection
uart_aut_baud_det_init(int rxd_io_num)662 static void uart_aut_baud_det_init(int rxd_io_num)
663 {
664 gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[rxd_io_num], PIN_FUNC_GPIO);
665 gpio_set_direction(rxd_io_num, GPIO_MODE_INPUT_OUTPUT);
666 esp_rom_gpio_connect_out_signal(rxd_io_num, I2CEXT1_SCL_OUT_IDX, 0, 0);
667 esp_rom_gpio_connect_in_signal(rxd_io_num, U1RXD_IN_IDX, 0);
668 periph_module_enable(PERIPH_UART1_MODULE);
669 /* Reset all the bits */
670 uart_ll_disable_intr_mask(&UART1, ~0);
671 uart_ll_clr_intsts_mask(&UART1, ~0);
672 uart_ll_set_autobaud_en(&UART1, true);
673 }
674
675 //Calculate I2C scl freq
i2c_scl_freq_cal(void)676 static void i2c_scl_freq_cal(void)
677 {
678 const int i2c_source_clk_freq = 80000000;
679 const float i2c_cource_clk_period = 0.0125;
680 int edg_cnt = uart_ll_get_rxd_edge_cnt(&UART1);
681 int pospulse_cnt = uart_ll_get_pos_pulse_cnt(&UART1);
682 int negpulse_cnt = uart_ll_get_neg_pulse_cnt(&UART1);
683 int high_period_cnt = uart_ll_get_high_pulse_cnt(&UART1);
684 int low_period_cnt = uart_ll_get_low_pulse_cnt(&UART1);
685 if(edg_cnt != 542) {
686 printf("\nedg_cnt != 542, test fail\n");
687 return;
688 }
689 printf("\nDetected SCL frequency: %d Hz\n", i2c_source_clk_freq / ((pospulse_cnt + negpulse_cnt) / 2) );
690
691 printf("\nSCL high period %.3f (us), SCL low_period %.3f (us)\n\n", (float)(i2c_cource_clk_period * high_period_cnt), (float)(i2c_cource_clk_period * low_period_cnt));
692 uart_ll_set_autobaud_en(&UART1, false);
693 periph_module_disable(PERIPH_UART1_MODULE);
694 }
695
696 TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]")
697 {
698 //Use the UART baud rate detection function to detect the I2C SCL frequency.
699 const int i2c_num = 1;
700 const int uart1_rxd_io = 5;
701 i2c_config_t conf_master = {
702 .mode = I2C_MODE_MASTER,
703 .sda_pullup_en = GPIO_PULLUP_ENABLE,
704 .scl_pullup_en = GPIO_PULLUP_ENABLE,
705 .master.clk_speed = 400000,
706 .sda_io_num = I2C_MASTER_SDA_IO,
707 .scl_io_num = I2C_MASTER_SCL_IO,
708 };
709 uint8_t *data = (uint8_t *)malloc(30);
710 TEST_ESP_OK(i2c_param_config( i2c_num, &conf_master));
711 TEST_ESP_OK(i2c_driver_install(i2c_num, I2C_MODE_MASTER, 0, 0, 0));
712 memset(data, 0, 0);
713 uart_aut_baud_det_init(uart1_rxd_io);
714 i2c_cmd_handle_t cmd = i2c_cmd_link_create();
715 i2c_master_start(cmd);
716 i2c_master_write(cmd, data, 30, ACK_CHECK_DIS);
717 i2c_master_stop(cmd);
718 i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
719 i2c_cmd_link_delete(cmd);
720 i2c_scl_freq_cal();
721 free(data);
722 TEST_ESP_OK(i2c_driver_delete(i2c_num));
723 }
724
725 #endif // TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
726
