1 /*
2 * Copyright 2020-2023 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 /**
8 * @file Lcu_Ip_Hw_Access.c
9 *
10 * @version 3.0.0
11 *
12 * @brief AUTOSAR Mcl - Lcu Ip driver source file.
13 * @details
14 *
15 * @addtogroup LCU_IP_DRIVER LCU IP Driver
16 * @{
17 */
18
19 #ifdef __cplusplus
20 extern "C"{
21 #endif
22
23 #include "Lcu_Ip_Hw_Access.h"
24
25 /*==================================================================================================
26 SOURCE FILE VERSION INFORMATION
27 ==================================================================================================*/
28 #define LCU_IP_HW_ACCESS_VENDOR_ID_C 43
29 #define LCU_IP_HW_ACCESS_AR_RELEASE_MAJOR_VERSION_C 4
30 #define LCU_IP_HW_ACCESS_AR_RELEASE_MINOR_VERSION_C 7
31 #define LCU_IP_HW_ACCESS_AR_RELEASE_REVISION_VERSION_C 0
32 #define LCU_IP_HW_ACCESS_SW_MAJOR_VERSION_C 3
33 #define LCU_IP_HW_ACCESS_SW_MINOR_VERSION_C 0
34 #define LCU_IP_HW_ACCESS_SW_PATCH_VERSION_C 0
35
36 /*==================================================================================================
37 FILE VERSION CHECKS
38 ==================================================================================================*/
39 /* Check if Lcu_Ip_Hw_Access.c file and Lcu_Ip_Hw_Access.h file are of the same vendor */
40 #if (LCU_IP_HW_ACCESS_VENDOR_ID_C != LCU_IP_HW_ACCESS_VENDOR_ID)
41 #error "Lcu_Ip_Hw_Access.c and Lcu_Ip_Hw_Access.h have different vendor ids"
42 #endif
43
44 /* Check if Lcu_Ip_Hw_Access.c file and Lcu_Ip_Hw_Access.h file are of the same Autosar version */
45 #if ((LCU_IP_HW_ACCESS_AR_RELEASE_MAJOR_VERSION_C != LCU_IP_HW_ACCESS_AR_RELEASE_MAJOR_VERSION) || \
46 (LCU_IP_HW_ACCESS_AR_RELEASE_MINOR_VERSION_C != LCU_IP_HW_ACCESS_AR_RELEASE_MINOR_VERSION) || \
47 (LCU_IP_HW_ACCESS_AR_RELEASE_REVISION_VERSION_C != LCU_IP_HW_ACCESS_AR_RELEASE_REVISION_VERSION) \
48 )
49 #error "AutoSar Version Numbers of Lcu_Ip_Hw_Access.c and Lcu_Ip_Hw_Access.h are different"
50 #endif
51
52 /* Check if Lcu_Ip_Hw_Access.c file and Lcu_Ip_Hw_Access.h file are of the same Software version */
53 #if ((LCU_IP_HW_ACCESS_SW_MAJOR_VERSION_C != LCU_IP_HW_ACCESS_SW_MAJOR_VERSION) || \
54 (LCU_IP_HW_ACCESS_SW_MINOR_VERSION_C != LCU_IP_HW_ACCESS_SW_MINOR_VERSION) || \
55 (LCU_IP_HW_ACCESS_SW_PATCH_VERSION_C != LCU_IP_HW_ACCESS_SW_PATCH_VERSION) \
56 )
57 #error "Software Version Numbers of Lcu_Ip_Hw_Access.c and Lcu_Ip_Hw_Access.h are different"
58 #endif
59
60 #if (STD_ON == LCU_IP_IS_AVAILABLE)
61 /*==================================================================================================
62 * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
63 ==================================================================================================*/
64
65 /*==================================================================================================
66 * LOCAL MACROS
67 ==================================================================================================*/
68
69 /*==================================================================================================
70 * LOCAL CONSTANTS
71 ==================================================================================================*/
72
73 /*==================================================================================================
74 * LOCAL VARIABLES
75 ==================================================================================================*/
76 #define MCL_START_SEC_VAR_INIT_UNSPECIFIED_NO_CACHEABLE
77 #include "Mcl_MemMap.h"
78
79 LCU_Type * const Lcu_Ip_paxBaseInst[LCU_INSTANCE_COUNT] = IP_LCU_BASE_PTRS;
80
81 #define MCL_STOP_SEC_VAR_INIT_UNSPECIFIED_NO_CACHEABLE
82 #include "Mcl_MemMap.h"
83
84 #define MCL_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
85 #include "Mcl_MemMap.h"
86
87 VAR_SEC_NOCACHE(Lcu_Ip_paxHwOutputState) static Lcu_Ip_HwOutputStateType * Lcu_Ip_paxHwOutputState[LCU_INSTANCE_COUNT][LCU_LC_COUNT][LCU_NUM_OUTPUT_PER_LC];
88
89 VAR_SEC_NOCACHE(Lcu_Ip_au8OperationMode) static uint8 Lcu_Ip_au8OperationMode[LCU_INSTANCE_COUNT];
90
91 #define MCL_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
92 #include "Mcl_MemMap.h"
93
94 /*==================================================================================================
95 * GLOBAL CONSTANTS
96 ==================================================================================================*/
97
98 /*==================================================================================================
99 * GLOBAL VARIABLES
100 ==================================================================================================*/
101
102 /*==================================================================================================
103 * LOCAL FUNCTION PROTOTYPES
104 ==================================================================================================*/
105 #define MCL_START_SEC_CODE
106 #include "Mcl_MemMap.h"
107
108 static void HwAcc_Lcu_AsyncGetLogicInput (const uint8 LcuId, const uint8 HwLcInputId, uint8 * const Value);
109
110 static void HwAcc_Lcu_AsyncGetSwOverrideInput (const uint8 LcuId, const uint8 HwLcInputId, uint8 * const Value);
111
112 static void HwAcc_Lcu_AsyncGetLogicOutput(const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value);
113
114 static void HwAcc_Lcu_AsyncGetForceOutput(const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value);
115
116 static void HwAcc_Lcu_AsyncGetForceStatus(const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value);
117
118 static void HwAcc_Lcu_AsyncGetCombineForce (const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value);
119
120 static void HwAcc_Lcu_AsyncGetLutStatus(const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value);
121
122 #define MCL_STOP_SEC_CODE
123 #include "Mcl_MemMap.h"
124
125 /*==================================================================================================
126 * LOCAL FUNCTIONS
127 ==================================================================================================*/
128
129 /*==================================================================================================
130 * GLOBAL FUNCTIONS
131 ==================================================================================================*/
132
133 /*==================================================================================================
134 * LCU INSTANCE INSTANCE FUNCTIONS
135 ==================================================================================================*/
136 #define MCL_START_SEC_CODE
137 #include "Mcl_MemMap.h"
138
139 /* Input Configuration */
HwAcc_Lcu_AsyncSetInputMuxSelect(const uint8 LcuId,const uint8 HwLcInputId,uint8 MaskValue)140 void HwAcc_Lcu_AsyncSetInputMuxSelect(const uint8 LcuId, const uint8 HwLcInputId, uint8 MaskValue)
141 {
142 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
143 PtBase->MUXSEL[HwLcInputId] = LCU_MUXSEL_MUXSEL(MaskValue);
144 }
145
HwAcc_Lcu_AsyncSetInputSwOverrideValue(const uint8 LcuId,const uint8 HwLcInputId,uint8 MaskValue)146 void HwAcc_Lcu_AsyncSetInputSwOverrideValue(const uint8 LcuId, const uint8 HwLcInputId, uint8 MaskValue)
147 {
148 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
149 uint32 Reg = PtBase->SWVALUE;
150
151 /* Register access */
152 Reg &= ~(uint32)((uint32)1U << HwLcInputId);
153 Reg |= LCU_SWVALUE_SWVALUE((uint32)((uint32)MaskValue << HwLcInputId));
154 PtBase->SWVALUE = Reg;
155 }
156
HwAcc_Lcu_AsyncSetInputSwSyncMode(const uint8 LcuId,const uint8 HwLcInputId,uint8 MaskValue)157 void HwAcc_Lcu_AsyncSetInputSwSyncMode(const uint8 LcuId, const uint8 HwLcInputId, uint8 MaskValue)
158 {
159 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
160 uint8 LcId = LCU_IP_MAPPING_INPUT_TO_LC(HwLcInputId);
161 uint32 Reg = PtBase->LC[LcId].SCTRL;
162 uint8 HwInput = LCU_IP_MAPPING_INTPUT_ID_TO_HW_INPUT(HwLcInputId);
163
164 /* Register access */
165
166 Reg &= ~(uint32)((uint32)1U << HwInput);
167 Reg |= LCU_SCTRL_SW_MODE((uint32)((uint32)MaskValue << HwInput));
168 PtBase->LC[LcId].SCTRL = Reg;
169 }
170
HwAcc_Lcu_AsyncSetInputSwOverrideEnable(const uint8 LcuId,const uint8 HwLcInputId,uint8 MaskValue)171 void HwAcc_Lcu_AsyncSetInputSwOverrideEnable(const uint8 LcuId, const uint8 HwLcInputId, uint8 MaskValue)
172 {
173 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
174 uint32 Reg = PtBase->SWEN;
175
176 /* Register access */
177
178 Reg &= ~(uint32)((uint32)1U << HwLcInputId);
179 Reg |= LCU_SWEN_SWEN((uint8)((MaskValue & LCU_SWEN_SWEN_MASK) << HwLcInputId));
180 PtBase->SWEN = Reg;
181 }
182
183 /* Output Configuration */
HwAcc_Lcu_AsyncSetOutputEnable(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)184 boolean HwAcc_Lcu_AsyncSetOutputEnable(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
185 {
186 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
187 uint32 Reg = PtBase->OUTEN;
188
189 /* Register access */
190
191 Reg &= ~(uint32)((uint32)1U << HwLcOutputId);
192 Reg |= LCU_OUTEN_OUTEN((uint16)((MaskValue & LCU_OUTEN_OUTEN_MASK) << HwLcOutputId));
193 PtBase->OUTEN = Reg;
194
195 return TRUE;
196 }
197
HwAcc_Lcu_AsyncSetOutputDebugMode(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)198 boolean HwAcc_Lcu_AsyncSetOutputDebugMode(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
199 {
200 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
201 uint32 Reg = PtBase->DBGEN;
202
203 /* Register access */
204 Reg &= ~(uint32)((uint32)1U << HwLcOutputId);
205 Reg |= LCU_DBGEN_DBGEN((uint32)((uint32)MaskValue << HwLcOutputId));
206 PtBase->DBGEN = Reg;
207
208 return TRUE;
209 }
210
HwAcc_Lcu_AsyncSetOutputForceInputSensitivity(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)211 boolean HwAcc_Lcu_AsyncSetOutputForceInputSensitivity(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
212 {
213 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
214 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
215 uint32 Reg = PtBase->LC[LcId].FCTRL;
216 uint32 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
217
218 /* Register access */
219 Reg &= ~(uint32)(LCU_FCTRL_FORCE_SENSE_MASK(HwOutput));
220 Reg |= LCU_FCTRL_FORCE_SENSE(HwOutput, MaskValue);
221 PtBase->LC[LcId].FCTRL = Reg;
222
223 return TRUE;
224 }
225
HwAcc_Lcu_AsyncSetOutputForceClearingMode(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)226 boolean HwAcc_Lcu_AsyncSetOutputForceClearingMode(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
227 {
228 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
229 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
230 uint32 Reg = PtBase->LC[LcId].FCTRL;
231 uint32 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
232
233 /* Register access */
234 Reg &= ~(uint32)(LCU_FCTRL_FORCE_MODE_MASK(HwOutput));
235 Reg |= LCU_FCTRL_FORCE_MODE(HwOutput, MaskValue);
236 PtBase->LC[LcId].FCTRL = Reg;
237
238 return TRUE;
239 }
240
HwAcc_Lcu_AsyncSetOutputForceSyncSelect(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)241 boolean HwAcc_Lcu_AsyncSetOutputForceSyncSelect(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
242 {
243 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
244 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
245 uint32 Reg = PtBase->LC[LcId].FCTRL;
246 uint32 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
247
248 /* Register access */
249 Reg &= ~(uint32)(LCU_FCTRL_SYNC_SEL_MASK(HwOutput));
250 Reg |= LCU_FCTRL_SYNC_SEL(HwOutput, MaskValue);
251 PtBase->LC[LcId].FCTRL = Reg;
252
253 return TRUE;
254 }
255
HwAcc_Lcu_AsyncSetOutputPolarity(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)256 boolean HwAcc_Lcu_AsyncSetOutputPolarity(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
257 {
258 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
259 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
260 uint32 Reg = PtBase->LC[LcId].OUTPOL;
261 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
262
263 /* Register access */
264 Reg &= ~(uint32)((uint32)1U << HwOutput);
265 Reg |= LCU_OUTPOL_OUTPOL((uint32)((uint32)MaskValue << HwOutput));
266 PtBase->LC[LcId].OUTPOL = Reg;
267
268 return TRUE;
269 }
270
HwAcc_Lcu_AsyncClearOutputForceEvent(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)271 boolean HwAcc_Lcu_AsyncClearOutputForceEvent(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
272 {
273 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
274 uint8 HwOutput = HwLcOutputId;
275 (void)MaskValue;
276
277 /* Register access */
278 PtBase->FORCESTS = LCU_FORCESTS_FORCESTS((uint32)1U << HwOutput);
279
280 return TRUE;
281 }
282
HwAcc_Lcu_AsyncSetOutputForceDma(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)283 boolean HwAcc_Lcu_AsyncSetOutputForceDma(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
284 {
285 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
286 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
287 uint32 Reg = PtBase->LC[LcId].INTDMAEN;
288 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
289
290 /* Register access */
291 Reg &= ~(uint32)(((uint32)1U << HwOutput) << LCU_INTDMAEN_FORCE_DMA_EN_SHIFT);
292 Reg |= LCU_INTDMAEN_FORCE_DMA_EN(((uint32)((uint32)MaskValue << HwOutput)));
293 PtBase->LC[LcId].INTDMAEN = Reg;
294
295 return TRUE;
296 }
297
HwAcc_Lcu_AsyncSetOutputForceInt(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)298 boolean HwAcc_Lcu_AsyncSetOutputForceInt(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
299 {
300 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
301 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
302 uint32 Reg = PtBase->LC[LcId].INTDMAEN;
303 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
304 boolean ReturnValue = TRUE;
305
306 /* Register access */
307 if (Lcu_Ip_au8OperationMode[LcuId] == LCU_IP_POLLING_MODE)
308 {
309 ReturnValue = FALSE;
310 }
311 else
312 {
313 Reg &= ~(uint32)(((uint32)1U << HwOutput) << LCU_INTDMAEN_FORCE_INT_EN_SHIFT);
314 Reg |= LCU_INTDMAEN_FORCE_INT_EN(((uint32)((uint32)MaskValue << HwOutput)));
315 PtBase->LC[LcId].INTDMAEN = Reg;
316 }
317 return ReturnValue;
318 }
319
HwAcc_Lcu_AsyncSetOutputLutDma(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)320 boolean HwAcc_Lcu_AsyncSetOutputLutDma(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
321 {
322 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
323 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
324 uint32 Reg = PtBase->LC[LcId].INTDMAEN;
325 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
326
327 /* Register access */
328 Reg &= ~(uint32)((uint32)1U << HwOutput);
329 Reg |= LCU_INTDMAEN_LUT_DMA_EN(((uint32)((uint32)MaskValue << HwOutput)));
330 PtBase->LC[LcId].INTDMAEN = Reg;
331
332 return TRUE;
333 }
334
HwAcc_Lcu_AsyncSetOutputLutInt(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)335 boolean HwAcc_Lcu_AsyncSetOutputLutInt(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
336 {
337 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
338 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
339 uint32 Reg = PtBase->LC[LcId].INTDMAEN;
340 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
341 boolean ReturnValue = TRUE;
342
343 /* Register access */
344 if (Lcu_Ip_au8OperationMode[LcuId] == LCU_IP_POLLING_MODE)
345 {
346 ReturnValue = FALSE;
347 }
348 else
349 {
350 Reg &= ~(uint32)((uint32)1U << HwOutput);
351 Reg |= LCU_INTDMAEN_LUT_INT_EN(((uint32)((uint32)MaskValue << HwOutput)));
352 PtBase->LC[LcId].INTDMAEN = Reg;
353 }
354 return ReturnValue;
355 }
356
HwAcc_Lcu_AsyncSetOutputFallFilter(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)357 boolean HwAcc_Lcu_AsyncSetOutputFallFilter(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
358 {
359 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
360 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
361 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
362 uint32 Reg = PtBase->LC[LcId].FILT[HwOutput];
363
364 /* Register access */
365 Reg &= ~(LCU_FILT_LUT_FALL_FILT_MASK);
366 Reg |= LCU_FILT_LUT_FALL_FILT(MaskValue);
367 PtBase->LC[LcId].FILT[HwOutput] = Reg;
368
369 return TRUE;
370 }
371
HwAcc_Lcu_AsyncSetOutputRiseFilter(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)372 boolean HwAcc_Lcu_AsyncSetOutputRiseFilter(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
373 {
374 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
375 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
376 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
377 uint32 Reg = PtBase->LC[LcId].FILT[HwOutput];
378
379 /* Register access */
380 Reg &= ~(LCU_FILT_LUT_RISE_FILT_MASK);
381 Reg |= LCU_FILT_LUT_RISE_FILT(MaskValue);
382 PtBase->LC[LcId].FILT[HwOutput] = Reg;
383
384 return TRUE;
385 }
386
HwAcc_Lcu_AsyncSetOutputLutControl(const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)387 boolean HwAcc_Lcu_AsyncSetOutputLutControl(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
388 {
389 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
390 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
391 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
392
393 /* Register access */
394 PtBase->LC[LcId].LUTCTRL[HwOutput] = LCU_LUTCTRL_LUTCTRL(MaskValue);
395
396 return TRUE;
397 }
398
HwAcc_Lcu_AsyncGetCombineForceInput(const uint8 LcuId,const uint8 HwLcOutputId)399 uint8 HwAcc_Lcu_AsyncGetCombineForceInput(const uint8 LcuId, const uint8 HwLcOutputId)
400 {
401 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
402 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
403 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
404 uint32 Reg = PtBase->LC[LcId].FFILT;
405 uint8 Mask = 1U << HwOutput;
406 uint8 ReturnValue = (uint8) ((Reg & LCU_FFILT_COMB_FORCE_MASK) >> LCU_FFILT_COMB_FORCE_SHIFT);
407
408 /* Register access */
409 ReturnValue = (uint8)((ReturnValue & Mask) >> HwOutput);
410 return ReturnValue;
411 }
412
HwAcc_Lcu_SetForceFilter(const uint8 LcuId,const uint8 LcId,uint8 MaskValue)413 void HwAcc_Lcu_SetForceFilter(const uint8 LcuId, const uint8 LcId, uint8 MaskValue)
414 {
415 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
416 uint32 Reg = PtBase->LC[LcId].FFILT;
417
418 /* Register access */
419 Reg &= ~(LCU_FFILT_FORCE_FILT_MASK);
420 Reg |= LCU_FFILT_FORCE_FILT(MaskValue);
421 PtBase->LC[LcId].FFILT = Reg;
422 }
423
HwAcc_Lcu_SetForcePolarity(const uint8 LcuId,const uint8 LcId,uint8 MaskValue)424 void HwAcc_Lcu_SetForcePolarity(const uint8 LcuId, const uint8 LcId, uint8 MaskValue)
425 {
426 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
427 uint32 Reg = PtBase->LC[LcId].FFILT;
428
429 /* Register access */
430 Reg &= ~(LCU_FFILT_FORCE_POL_MASK);
431 Reg |= LCU_FFILT_FORCE_POL(MaskValue);
432 PtBase->LC[LcId].FFILT = Reg;
433 }
434
HwAcc_Lcu_SetCombineEnable(const uint8 LcuId,const uint8 LcId,uint8 MaskValue)435 void HwAcc_Lcu_SetCombineEnable(const uint8 LcuId, const uint8 LcId, uint8 MaskValue)
436 {
437 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
438 uint32 Reg = PtBase->LC[LcId].FFILT;
439
440 /* Register access */
441 Reg &= ~(LCU_FFILT_COMB_EN_MASK);
442 Reg |= LCU_FFILT_COMB_EN(MaskValue);
443 PtBase->LC[LcId].FFILT = Reg;
444 }
445
HwAcc_Lcu_SetSwSyncSelect(const uint8 LcuId,const uint8 LcId,uint8 MaskValue)446 void HwAcc_Lcu_SetSwSyncSelect(const uint8 LcuId, const uint8 LcId, uint8 MaskValue)
447 {
448 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
449 uint32 Reg = PtBase->LC[LcId].SCTRL;
450
451 /* Register access */
452 Reg &= ~(LCU_SCTRL_SW_SYNC_SEL_MASK);
453 Reg |= LCU_SCTRL_SW_SYNC_SEL(MaskValue);
454 PtBase->LC[LcId].SCTRL = Reg;
455 }
456
HwAcc_Lcu_SetWriteProtect(const uint8 LcuId)457 void HwAcc_Lcu_SetWriteProtect(const uint8 LcuId)
458 {
459 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
460
461 /* Register access */
462 PtBase->CFG |= LCU_CFG_WP_MASK;
463 }
464
HwAcc_Lcu_GetWriteProtect(const uint8 LcuId)465 Lcu_Ip_ReturnType HwAcc_Lcu_GetWriteProtect(const uint8 LcuId)
466 {
467 Lcu_Ip_ReturnType ReturnValue = LCU_IP_STATUS_SUCCESS;
468 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
469 uint32 Reg = PtBase->CFG;
470
471 /* Register access */
472 if(0U != (Reg & LCU_CFG_WP_MASK))
473 {
474 ReturnValue = LCU_IP_STATUS_PROTECTED;
475 }
476 return ReturnValue;
477 }
478
479
480 #if (STD_ON == LCU_IP_ASYNC_FUNC_IS_AVAILABLE)
HwAcc_Lcu_AsyncSetInputList(const uint32 Parameter,const uint8 LcuId,const uint8 HwLcInputId,uint8 MaskValue)481 void HwAcc_Lcu_AsyncSetInputList(const uint32 Parameter, const uint8 LcuId, const uint8 HwLcInputId, uint8 MaskValue)
482 {
483 /* Function pointer */
484 static void (*fpHwAcc_Lcu_SetInputList[])(const uint8 LcuId, const uint8 HwLcInputId, uint8 MaskValue) =
485 {
486 HwAcc_Lcu_AsyncSetInputMuxSelect,
487 HwAcc_Lcu_AsyncSetInputSwSyncMode,
488 HwAcc_Lcu_AsyncSetInputSwOverrideEnable,
489 HwAcc_Lcu_AsyncSetInputSwOverrideValue,
490 };
491 fpHwAcc_Lcu_SetInputList[Parameter](LcuId, HwLcInputId, MaskValue);
492 }
493
HwAcc_Lcu_AsyncSetOutputList(const uint32 Parameter,const uint8 LcuId,const uint8 HwLcOutputId,uint16 MaskValue)494 boolean HwAcc_Lcu_AsyncSetOutputList(const uint32 Parameter, const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue)
495 {
496 /* Function pointer */
497 static boolean (*fpHwAcc_Lcu_SetOutputList[])(const uint8 LcuId, const uint8 HwLcOutputId, uint16 MaskValue) =
498 {
499 HwAcc_Lcu_AsyncSetOutputDebugMode,
500 HwAcc_Lcu_AsyncSetOutputEnable,
501 HwAcc_Lcu_AsyncSetOutputLutControl,
502 HwAcc_Lcu_AsyncSetOutputRiseFilter,
503 HwAcc_Lcu_AsyncSetOutputFallFilter,
504 HwAcc_Lcu_AsyncSetOutputForceDma,
505 HwAcc_Lcu_AsyncSetOutputLutDma,
506 HwAcc_Lcu_AsyncSetOutputForceInt,
507 HwAcc_Lcu_AsyncSetOutputLutInt,
508 HwAcc_Lcu_AsyncSetOutputPolarity,
509 HwAcc_Lcu_AsyncSetOutputForceInputSensitivity,
510 HwAcc_Lcu_AsyncSetOutputForceClearingMode,
511 HwAcc_Lcu_AsyncSetOutputForceSyncSelect,
512 HwAcc_Lcu_AsyncClearOutputForceEvent,
513 };
514 return fpHwAcc_Lcu_SetOutputList[Parameter](LcuId, HwLcOutputId, MaskValue);
515 }
516 #endif /* #if (STD_ON == LCU_IP_ASYNC_FUNC_IS_AVAILABLE) */
517
HwAcc_Lcu_SetHwOutputSetState(const uint8 LcuId,const uint8 HwLcOutputId,Lcu_Ip_HwOutputStateType * SetState)518 void HwAcc_Lcu_SetHwOutputSetState(const uint8 LcuId, const uint8 HwLcOutputId, Lcu_Ip_HwOutputStateType * SetState)
519 {
520 /* Register access */
521 uint8 HwLogicCell = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
522 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
523 Lcu_Ip_paxHwOutputState[LcuId][HwLogicCell][HwOutput] = SetState;
524 }
525
HwAcc_Lcu_SetHwOutputCallbackState(const uint8 LcuId,const uint8 HwLcOutputId,Lcu_Ip_Callback IntCallback)526 void HwAcc_Lcu_SetHwOutputCallbackState(const uint8 LcuId, const uint8 HwLcOutputId, Lcu_Ip_Callback IntCallback)
527 {
528 /* Register access */
529 uint8 HwLogicCell = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
530 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
531
532 Lcu_Ip_paxHwOutputState[LcuId][HwLogicCell][HwOutput]->Callback = IntCallback;
533 }
534
HwAcc_Lcu_GetHwOutputStatePointer(const uint8 LcuId,const uint8 LcId,const uint8 OutputId)535 Lcu_Ip_HwOutputStateType * HwAcc_Lcu_GetHwOutputStatePointer(const uint8 LcuId, const uint8 LcId, const uint8 OutputId)
536 {
537 /* Register access */
538 return Lcu_Ip_paxHwOutputState[LcuId][LcId][OutputId];
539 }
540
541 /* Set Status Register to reset value */
HwAcc_Lcu_AsyncClearAllForceEvent(uint8 LcuId,uint8 LcId)542 void HwAcc_Lcu_AsyncClearAllForceEvent(uint8 LcuId, uint8 LcId)
543 {
544 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
545 uint32 Reg = PtBase->LC[LcId].STS;
546
547 /* Register access */
548 Reg |= LCU_STS_FORCESTS_MASK;
549 PtBase->LC[LcId].STS = Reg;
550 }
551
HwAcc_Lcu_AsyncClearAllLutEvent(uint8 LcuId,uint8 LcId)552 void HwAcc_Lcu_AsyncClearAllLutEvent(uint8 LcuId, uint8 LcId)
553 {
554 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
555 uint32 Reg = PtBase->LC[LcId].STS;
556
557 /* Register access */
558 Reg |= LCU_STS_LUT_STS_MASK;
559 PtBase->LC[LcId].STS = Reg;
560 }
561
HwAcc_Lcu_AsyncGetLogicInput(const uint8 LcuId,const uint8 HwLcInputId,uint8 * const Value)562 static void HwAcc_Lcu_AsyncGetLogicInput (const uint8 LcuId, const uint8 HwLcInputId, uint8 * const Value)
563 {
564 /* Register access */
565 *Value = (uint8)((Lcu_Ip_paxBaseInst[LcuId]->LCIN >> HwLcInputId) & 1U);
566 }
567
HwAcc_Lcu_AsyncGetSwOverrideInput(const uint8 LcuId,const uint8 HwLcInputId,uint8 * const Value)568 static void HwAcc_Lcu_AsyncGetSwOverrideInput (const uint8 LcuId, const uint8 HwLcInputId, uint8 * const Value)
569 {
570 /* Register access */
571 *Value = (uint8)((Lcu_Ip_paxBaseInst[LcuId]->SWOUT >> HwLcInputId) & 1U);
572 }
573
HwAcc_Lcu_AsyncGetLogicOutput(const uint8 LcuId,const uint8 HwLcOutputId,uint8 * const Value)574 static void HwAcc_Lcu_AsyncGetLogicOutput(const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value)
575 {
576 /* Register access */
577 *Value = (uint8)((Lcu_Ip_paxBaseInst[LcuId]->LCOUT >> HwLcOutputId) & 1U);
578 }
579
HwAcc_Lcu_AsyncGetForceOutput(const uint8 LcuId,const uint8 HwLcOutputId,uint8 * const Value)580 static void HwAcc_Lcu_AsyncGetForceOutput(const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value)
581 {
582 /* Register access */
583 *Value = (uint8)((Lcu_Ip_paxBaseInst[LcuId]->FORCEOUT >> HwLcOutputId) & 1U);
584 }
HwAcc_Lcu_AsyncGetForceStatus(const uint8 LcuId,const uint8 HwLcOutputId,uint8 * const Value)585 static void HwAcc_Lcu_AsyncGetForceStatus(const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value)
586 {
587 /* Register access */
588 *Value = (uint8)((Lcu_Ip_paxBaseInst[LcuId]->FORCESTS >> HwLcOutputId) & 1U);
589 }
590
HwAcc_Lcu_AsyncGetCombineForce(const uint8 LcuId,const uint8 HwLcOutputId,uint8 * const Value)591 static void HwAcc_Lcu_AsyncGetCombineForce (const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value)
592 {
593 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
594 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
595 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
596 uint32 Reg = PtBase->LC[LcId].FFILT;
597 uint8 Mask = 1U << HwOutput;
598 uint8 ReturnValue = (uint8) ((Reg & LCU_FFILT_COMB_FORCE_MASK) >> LCU_FFILT_COMB_FORCE_SHIFT);
599
600 /* Register access */
601 *Value = (uint8)((ReturnValue & Mask) >> HwOutput);
602
603 }
604
HwAcc_Lcu_AsyncGetLutStatus(const uint8 LcuId,const uint8 HwLcOutputId,uint8 * const Value)605 static void HwAcc_Lcu_AsyncGetLutStatus(const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value)
606 {
607 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
608 uint8 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
609
610 /* Register access */
611 *Value = (uint8)((Lcu_Ip_paxBaseInst[LcuId]->LC[LcId].STS >> HwOutput) & 1U);
612 }
613
HwAcc_Lcu_AsynGetInputInfo(const uint8 Param,const uint8 LcuId,const uint8 HwLcInputId,uint8 * const Value)614 void HwAcc_Lcu_AsynGetInputInfo(const uint8 Param, const uint8 LcuId, const uint8 HwLcInputId, uint8 * const Value)
615 {
616 /* Function pointer */
617 static void (*fpHwAcc_Lcu_AsynGetInputInfo[])(const uint8 LcuId, const uint8 HwLcInputId, uint8 * const Value) =
618 {
619 HwAcc_Lcu_AsyncGetLogicInput,
620 HwAcc_Lcu_AsyncGetSwOverrideInput,
621 };
622 fpHwAcc_Lcu_AsynGetInputInfo[Param](LcuId, HwLcInputId, Value);
623 }
624
HwAcc_Lcu_AsynGetOutputInfo(const uint8 Param,const uint8 LcuId,const uint8 HwLcOutputId,uint8 * const Value)625 void HwAcc_Lcu_AsynGetOutputInfo(const uint8 Param, const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value)
626 {
627 /* Function pointer */
628 static void (*fpHwAcc_Lcu_AsynGetOutputInfo[])(const uint8 LcuId, const uint8 HwLcOutputId, uint8 * const Value) =
629 {
630 HwAcc_Lcu_AsyncGetLogicOutput,
631 HwAcc_Lcu_AsyncGetForceOutput,
632 HwAcc_Lcu_AsyncGetForceStatus,
633 HwAcc_Lcu_AsyncGetLutStatus,
634 HwAcc_Lcu_AsyncGetCombineForce,
635 };
636 fpHwAcc_Lcu_AsynGetOutputInfo[Param](LcuId, HwLcOutputId, Value);
637 }
638
HwAcc_Lcu_SetInstanceOperationMode(const uint8 LucId,const uint8 OperationMode)639 void HwAcc_Lcu_SetInstanceOperationMode(const uint8 LucId, const uint8 OperationMode)
640 {
641 /* Register access */
642 Lcu_Ip_au8OperationMode[LucId] = OperationMode;
643 }
644
645 /*==================================================================================================
646 * LC Force Control (FCTRL) - REGISTER ACCESS
647 ==================================================================================================*/
HwAcc_Lcu_SetLcForceControl(const uint8 LcuId,const uint8 HwLcOutputId,const Lcu_Ip_LogicOutputConfigType * const pConfig)648 void HwAcc_Lcu_SetLcForceControl(const uint8 LcuId, const uint8 HwLcOutputId, const Lcu_Ip_LogicOutputConfigType * const pConfig)
649 {
650 LCU_Type * PtBase = Lcu_Ip_paxBaseInst[LcuId];
651 uint8 LcId = LCU_IP_MAPPING_OUTPUT_TO_LC(HwLcOutputId);
652 uint32 Reg = PtBase->LC[LcId].FCTRL;
653 uint32 HwOutput = LCU_IP_MAPPING_OUTPUT_ID_TO_HW_OUTPUT(HwLcOutputId);
654
655 Reg &= ~(uint32)(LCU_FCTRL_FORCE_SENSE_MASK(HwOutput));
656 Reg |= LCU_FCTRL_FORCE_SENSE(HwOutput, pConfig->ForceSignalSel);
657
658 Reg &= ~(uint32)(LCU_FCTRL_FORCE_MODE_MASK(HwOutput));
659 Reg |= LCU_FCTRL_FORCE_MODE(HwOutput, pConfig->ClearForceMode);
660
661 Reg &= ~(uint32)(LCU_FCTRL_SYNC_SEL_MASK(HwOutput));
662 Reg |= LCU_FCTRL_SYNC_SEL(HwOutput, pConfig->ForceSyncSel);
663
664 PtBase->LC[LcId].FCTRL = Reg;
665 }
666
667 #define MCL_STOP_SEC_CODE
668 #include "Mcl_MemMap.h"
669
670 #endif /* #if (STD_ON == LCU_IP_IS_AVAILABLE) */
671
672 #ifdef __cplusplus
673 }
674 #endif
675
676 /** @} */
677
